exec: Change cpu_abort() argument to CPUState

Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-09-03 17:38:47 +02:00
parent bb0e627a84
commit a47dddd734
41 changed files with 301 additions and 206 deletions

View file

@ -132,6 +132,7 @@ void m68k_cpu_init_gdb(M68kCPU *cpu)
void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
int flags;
uint32_t src;
uint32_t dest;
@ -204,7 +205,7 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
flags |= CCF_C;
break;
default:
cpu_abort(env, "Bad CC_OP %d", cc_op);
cpu_abort(CPU(cpu), "Bad CC_OP %d", cc_op);
}
env->cc_op = CC_OP_FLAGS;
env->cc_dest = flags;
@ -212,6 +213,8 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
switch (reg) {
case 0x02: /* CACR */
env->cacr = val;
@ -225,7 +228,7 @@ void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
break;
/* TODO: Implement control registers. */
default:
cpu_abort(env, "Unimplemented control register write 0x%x = 0x%x\n",
cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n",
reg, val);
}
}

View file

@ -461,7 +461,7 @@ void do_m68k_semihosting(CPUM68KState *env, int nr)
#endif
return;
default:
cpu_abort(env, "Unsupported semihosting syscall %d\n", nr);
cpu_abort(CPU(m68k_env_get_cpu(env)), "Unsupported semihosting syscall %d\n", nr);
result = 0;
}
failed:

View file

@ -881,8 +881,10 @@ DISAS_INSN(undef_fpu)
DISAS_INSN(undef)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
gen_exception(s, s->pc - 2, EXCP_UNSUPPORTED);
cpu_abort(env, "Illegal instruction: %04x @ %08x", insn, s->pc - 2);
cpu_abort(CPU(cpu), "Illegal instruction: %04x @ %08x", insn, s->pc - 2);
}
DISAS_INSN(mulw)
@ -2082,12 +2084,14 @@ DISAS_INSN(wddata)
DISAS_INSN(wdebug)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
if (IS_USER(s)) {
gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
return;
}
/* TODO: Implement wdebug. */
cpu_abort(env, "WDEBUG not implemented");
cpu_abort(CPU(cpu), "WDEBUG not implemented");
}
DISAS_INSN(trap)
@ -2461,14 +2465,18 @@ DISAS_INSN(fbcc)
DISAS_INSN(frestore)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
/* TODO: Implement frestore. */
cpu_abort(env, "FRESTORE not implemented");
cpu_abort(CPU(cpu), "FRESTORE not implemented");
}
DISAS_INSN(fsave)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
/* TODO: Implement fsave. */
cpu_abort(env, "FSAVE not implemented");
cpu_abort(CPU(cpu), "FSAVE not implemented");
}
static inline TCGv gen_mac_extract_word(DisasContext *s, TCGv val, int upper)