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target/loongarch: Add CHECK_SXE maccro for check LSX enable

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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-4-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2023-05-04 20:27:29 +08:00
parent a0c9400a5b
commit a3f3db5cda
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GPG key ID: 40A2FFF239263EDF
3 changed files with 15 additions and 0 deletions
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2
target/loongarch/cpu.c
View file

@ -52,6 +52,7 @@ static const char * const excp_names[] = {
[EXCCODE_FPE] = "Floating Point Exception", [EXCCODE_FPE] = "Floating Point Exception",
[EXCCODE_DBP] = "Debug breakpoint", [EXCCODE_DBP] = "Debug breakpoint",
[EXCCODE_BCE] = "Bound Check Exception", [EXCCODE_BCE] = "Bound Check Exception",
[EXCCODE_SXD] = "128 bit vector instructions Disable exception",
}; };
const char *loongarch_exception_name(int32_t exception) const char *loongarch_exception_name(int32_t exception)
@ -187,6 +188,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
case EXCCODE_FPD: case EXCCODE_FPD:
case EXCCODE_FPE: case EXCCODE_FPE:
case EXCCODE_BCE: case EXCCODE_BCE:
case EXCCODE_SXD:
env->CSR_BADV = env->pc; env->CSR_BADV = env->pc;
QEMU_FALLTHROUGH; QEMU_FALLTHROUGH;
case EXCCODE_ADEM: case EXCCODE_ADEM:

2
target/loongarch/cpu.h
View file

@ -419,6 +419,7 @@ static inline int cpu_mmu_index(CPULoongArchState *env, bool ifetch)
#define HW_FLAGS_PLV_MASK R_CSR_CRMD_PLV_MASK /* 0x03 */ #define HW_FLAGS_PLV_MASK R_CSR_CRMD_PLV_MASK /* 0x03 */
#define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */ #define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */
#define HW_FLAGS_EUEN_FPE 0x04 #define HW_FLAGS_EUEN_FPE 0x04
#define HW_FLAGS_EUEN_SXE 0x08
static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, static inline void cpu_get_tb_cpu_state(CPULoongArchState *env,
target_ulong *pc, target_ulong *pc,
@ -429,6 +430,7 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env,
*cs_base = 0; *cs_base = 0;
*flags = env->CSR_CRMD & (R_CSR_CRMD_PLV_MASK | R_CSR_CRMD_PG_MASK); *flags = env->CSR_CRMD & (R_CSR_CRMD_PLV_MASK | R_CSR_CRMD_PG_MASK);
*flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, FPE) * HW_FLAGS_EUEN_FPE; *flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, FPE) * HW_FLAGS_EUEN_FPE;
*flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE) * HW_FLAGS_EUEN_SXE;
} }
void loongarch_cpu_list(void); void loongarch_cpu_list(void);

11
target/loongarch/insn_trans/trans_lsx.c.inc
View file

@ -3,3 +3,14 @@
* LSX translate functions * LSX translate functions
* Copyright (c) 2022-2023 Loongson Technology Corporation Limited * Copyright (c) 2022-2023 Loongson Technology Corporation Limited
*/ */
#ifndef CONFIG_USER_ONLY
#define CHECK_SXE do { \
if ((ctx->base.tb->flags & HW_FLAGS_EUEN_SXE) == 0) { \
generate_exception(ctx, EXCCODE_SXD); \
return true; \
} \
} while (0)
#else
#define CHECK_SXE
#endif