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aspeed: Integrate HACE

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Add the hash and crypto engine model to the Aspeed socs.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20210409000253.1475587-3-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Joel Stanley 2021-05-01 10:03:51 +02:00 • committed by Cédric Le Goater
parent c5475b3f9a
commit a3888d757a
4 changed files with 34 additions and 1 deletions
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docs/system/arm/aspeed.rst
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@ -60,7 +60,6 @@ Missing devices
* PWM and Fan Controller
* Slave GPIO Controller
* Super I/O Controller
* Hash/Crypto Engine
* PCI-Express 1 Controller
* Graphic Display Controller
* PECI Controller