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ppc/pnv: Add P10 quad xscom model
Add a PnvQuad class for the P10 powernv machine. No xscoms are implemented yet, but this allows them to be added. The size is reduced to avoid the quad region from overlapping with the core region. address-space: xscom-0 0000000000000000-00000003ffffffff (prio 0, i/o): xscom-0 0000000100000000-00000001000fffff (prio 0, i/o): xscom-quad.0 0000000100108000-0000000100907fff (prio 0, i/o): xscom-core.3 0000000100110000-000000010090ffff (prio 0, i/o): xscom-core.2 0000000100120000-000000010091ffff (prio 0, i/o): xscom-core.1 0000000100140000-000000010093ffff (prio 0, i/o): xscom-core.0 Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-ID: <20230704054204.168547-4-joel@jms.id.au> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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3 changed files with 56 additions and 2 deletions
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@ -1669,7 +1669,7 @@ static void pnv_chip_power10_quad_realize(Pnv10Chip *chip10, Error **errp)
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PnvQuad *eq = &chip10->quads[i];
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pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4],
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PNV_QUAD_TYPE_NAME("power9"));
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PNV_QUAD_TYPE_NAME("power10"));
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pnv_xscom_add_subregion(chip, PNV10_XSCOM_EQ_BASE(eq->quad_id),
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&eq->xscom_regs);
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