rust: pl011: wrap registers with BqlRefCell

This is a step towards making memory ops use a shared reference to the
device type; it's not yet possible due to the calls to character device
functions.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2025-01-25 00:28:09 +01:00
parent 49bfe63f29
commit a1ab4eed8d
2 changed files with 32 additions and 22 deletions

View file

@ -109,14 +109,14 @@ pub struct PL011Registers {
} }
#[repr(C)] #[repr(C)]
#[derive(Debug, qemu_api_macros::Object, qemu_api_macros::offsets)] #[derive(qemu_api_macros::Object, qemu_api_macros::offsets)]
/// PL011 Device Model in QEMU /// PL011 Device Model in QEMU
pub struct PL011State { pub struct PL011State {
pub parent_obj: ParentField<SysBusDevice>, pub parent_obj: ParentField<SysBusDevice>,
pub iomem: MemoryRegion, pub iomem: MemoryRegion,
#[doc(alias = "chr")] #[doc(alias = "chr")]
pub char_backend: CharBackend, pub char_backend: CharBackend,
pub regs: PL011Registers, pub regs: BqlRefCell<PL011Registers>,
/// QEMU interrupts /// QEMU interrupts
/// ///
/// ```text /// ```text
@ -528,6 +528,7 @@ impl PL011State {
} }
} }
#[allow(clippy::needless_pass_by_ref_mut)]
pub fn read(&mut self, offset: hwaddr, _size: u32) -> ControlFlow<u64, u64> { pub fn read(&mut self, offset: hwaddr, _size: u32) -> ControlFlow<u64, u64> {
let mut update_irq = false; let mut update_irq = false;
let result = match RegisterOffset::try_from(offset) { let result = match RegisterOffset::try_from(offset) {
@ -539,7 +540,7 @@ impl PL011State {
// qemu_log_mask(LOG_GUEST_ERROR, "pl011_read: Bad offset 0x%x\n", (int)offset); // qemu_log_mask(LOG_GUEST_ERROR, "pl011_read: Bad offset 0x%x\n", (int)offset);
ControlFlow::Break(0) ControlFlow::Break(0)
} }
Ok(field) => match self.regs.read(field) { Ok(field) => match self.regs.borrow_mut().read(field) {
ControlFlow::Break(value) => ControlFlow::Break(value.into()), ControlFlow::Break(value) => ControlFlow::Break(value.into()),
ControlFlow::Continue(value) => { ControlFlow::Continue(value) => {
update_irq = true; update_irq = true;
@ -570,7 +571,10 @@ impl PL011State {
} }
} }
update_irq = self.regs.write(field, value as u32, &mut self.char_backend); update_irq = self
.regs
.borrow_mut()
.write(field, value as u32, &mut self.char_backend);
} else { } else {
eprintln!("write bad offset {offset} value {value}"); eprintln!("write bad offset {offset} value {value}");
} }
@ -581,24 +585,30 @@ impl PL011State {
pub fn can_receive(&self) -> bool { pub fn can_receive(&self) -> bool {
// trace_pl011_can_receive(s->lcr, s->read_count, r); // trace_pl011_can_receive(s->lcr, s->read_count, r);
let regs = &self.regs; let regs = self.regs.borrow();
regs.read_count < regs.fifo_depth() regs.read_count < regs.fifo_depth()
} }
pub fn receive(&mut self, ch: u32) { pub fn receive(&self, ch: u32) {
let regs = &mut self.regs; let mut regs = self.regs.borrow_mut();
let update_irq = !regs.loopback_enabled() && regs.put_fifo(ch); let update_irq = !regs.loopback_enabled() && regs.put_fifo(ch);
// Release the BqlRefCell before calling self.update()
drop(regs);
if update_irq { if update_irq {
self.update(); self.update();
} }
} }
pub fn event(&mut self, event: QEMUChrEvent) { pub fn event(&self, event: QEMUChrEvent) {
let mut update_irq = false; let mut update_irq = false;
let regs = &mut self.regs; let mut regs = self.regs.borrow_mut();
if event == QEMUChrEvent::CHR_EVENT_BREAK && !regs.loopback_enabled() { if event == QEMUChrEvent::CHR_EVENT_BREAK && !regs.loopback_enabled() {
update_irq = regs.put_fifo(registers::Data::BREAK.into()); update_irq = regs.put_fifo(registers::Data::BREAK.into());
} }
// Release the BqlRefCell before calling self.update()
drop(regs);
if update_irq { if update_irq {
self.update() self.update()
} }
@ -622,19 +632,19 @@ impl PL011State {
} }
pub fn reset(&mut self) { pub fn reset(&mut self) {
self.regs.reset(); self.regs.borrow_mut().reset();
} }
pub fn update(&self) { pub fn update(&self) {
let regs = &self.regs; let regs = self.regs.borrow();
let flags = regs.int_level & regs.int_enabled; let flags = regs.int_level & regs.int_enabled;
for (irq, i) in self.interrupts.iter().zip(IRQMASK) { for (irq, i) in self.interrupts.iter().zip(IRQMASK) {
irq.set(flags & i != 0); irq.set(flags & i != 0);
} }
} }
pub fn post_load(&mut self, _version_id: u32) -> Result<(), ()> { pub fn post_load(&self, _version_id: u32) -> Result<(), ()> {
self.regs.post_load() self.regs.borrow_mut().post_load()
} }
} }
@ -671,11 +681,11 @@ pub unsafe extern "C" fn pl011_can_receive(opaque: *mut c_void) -> c_int {
/// ///
/// The buffer and size arguments must also be valid. /// The buffer and size arguments must also be valid.
pub unsafe extern "C" fn pl011_receive(opaque: *mut c_void, buf: *const u8, size: c_int) { pub unsafe extern "C" fn pl011_receive(opaque: *mut c_void, buf: *const u8, size: c_int) {
let mut state = NonNull::new(opaque).unwrap().cast::<PL011State>(); let state = NonNull::new(opaque).unwrap().cast::<PL011State>();
unsafe { unsafe {
if size > 0 { if size > 0 {
debug_assert!(!buf.is_null()); debug_assert!(!buf.is_null());
state.as_mut().receive(u32::from(buf.read_volatile())); state.as_ref().receive(u32::from(buf.read_volatile()));
} }
} }
} }
@ -686,8 +696,8 @@ pub unsafe extern "C" fn pl011_receive(opaque: *mut c_void, buf: *const u8, size
/// the same size as [`PL011State`]. We also expect the device is /// the same size as [`PL011State`]. We also expect the device is
/// readable/writeable from one thread at any time. /// readable/writeable from one thread at any time.
pub unsafe extern "C" fn pl011_event(opaque: *mut c_void, event: QEMUChrEvent) { pub unsafe extern "C" fn pl011_event(opaque: *mut c_void, event: QEMUChrEvent) {
let mut state = NonNull::new(opaque).unwrap().cast::<PL011State>(); let state = NonNull::new(opaque).unwrap().cast::<PL011State>();
unsafe { state.as_mut().event(event) } unsafe { state.as_ref().event(event) }
} }
/// # Safety /// # Safety
@ -712,7 +722,7 @@ pub unsafe extern "C" fn pl011_create(
} }
#[repr(C)] #[repr(C)]
#[derive(Debug, qemu_api_macros::Object)] #[derive(qemu_api_macros::Object)]
/// PL011 Luminary device model. /// PL011 Luminary device model.
pub struct PL011Luminary { pub struct PL011Luminary {
parent_obj: ParentField<PL011State>, parent_obj: ParentField<PL011State>,

View file

@ -6,7 +6,7 @@ use core::ptr::NonNull;
use std::os::raw::{c_int, c_void}; use std::os::raw::{c_int, c_void};
use qemu_api::{ use qemu_api::{
bindings::*, c_str, vmstate_clock, vmstate_fields, vmstate_of, vmstate_struct, bindings::*, c_str, prelude::*, vmstate_clock, vmstate_fields, vmstate_of, vmstate_struct,
vmstate_subsections, vmstate_unused, zeroable::Zeroable, vmstate_subsections, vmstate_unused, zeroable::Zeroable,
}; };
@ -31,8 +31,8 @@ static VMSTATE_PL011_CLOCK: VMStateDescription = VMStateDescription {
}; };
extern "C" fn pl011_post_load(opaque: *mut c_void, version_id: c_int) -> c_int { extern "C" fn pl011_post_load(opaque: *mut c_void, version_id: c_int) -> c_int {
let mut state = NonNull::new(opaque).unwrap().cast::<PL011State>(); let state = NonNull::new(opaque).unwrap().cast::<PL011State>();
let result = unsafe { state.as_mut().post_load(version_id as u32) }; let result = unsafe { state.as_ref().post_load(version_id as u32) };
if result.is_err() { if result.is_err() {
-1 -1
} else { } else {
@ -71,7 +71,7 @@ pub static VMSTATE_PL011: VMStateDescription = VMStateDescription {
post_load: Some(pl011_post_load), post_load: Some(pl011_post_load),
fields: vmstate_fields! { fields: vmstate_fields! {
vmstate_unused!(core::mem::size_of::<u32>()), vmstate_unused!(core::mem::size_of::<u32>()),
vmstate_struct!(PL011State, regs, &VMSTATE_PL011_REGS, PL011Registers), vmstate_struct!(PL011State, regs, &VMSTATE_PL011_REGS, BqlRefCell<PL011Registers>),
}, },
subsections: vmstate_subsections! { subsections: vmstate_subsections! {
VMSTATE_PL011_CLOCK VMSTATE_PL011_CLOCK