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hw/arm/fsl-imx8mp: Add GPIO controllers

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20250223114708.1780-10-shentey@gmail.com
[PMM: drop static const from gpio_table for GCC 7.5]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Bernhard Beschow 2025-02-23 12:46:59 +01:00 • committed by Peter Maydell
parent fd1deb5301
commit a17c1d932e
3 changed files with 70 additions and 0 deletions
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14
include/hw/arm/fsl-imx8mp.h
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@ -11,6 +11,7 @@
#include "cpu.h"
#include "hw/char/imx_serial.h"
#include "hw/gpio/imx_gpio.h"
#include "hw/intc/arm_gicv3_common.h"
#include "hw/misc/imx7_snvs.h"
#include "hw/misc/imx8mp_analog.h"
@ -29,6 +30,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mpState, FSL_IMX8MP)
enum FslImx8mpConfiguration {
FSL_IMX8MP_NUM_CPUS = 4,
FSL_IMX8MP_NUM_GPIOS = 5,
FSL_IMX8MP_NUM_IRQS = 160,
FSL_IMX8MP_NUM_UARTS = 4,
FSL_IMX8MP_NUM_USDHCS = 3,
@ -39,6 +41,7 @@ struct FslImx8mpState {
ARMCPU cpu[FSL_IMX8MP_NUM_CPUS];
GICv3State gic;
IMXGPIOState gpio[FSL_IMX8MP_NUM_GPIOS];
IMX8MPCCMState ccm;
IMX8MPAnalogState analog;
IMX7SNVSState snvs;
@ -202,6 +205,17 @@ enum FslImx8mpIrqs {
FSL_IMX8MP_UART5_IRQ = 30,
FSL_IMX8MP_UART6_IRQ = 16,
FSL_IMX8MP_GPIO1_LOW_IRQ = 64,
FSL_IMX8MP_GPIO1_HIGH_IRQ = 65,
FSL_IMX8MP_GPIO2_LOW_IRQ = 66,
FSL_IMX8MP_GPIO2_HIGH_IRQ = 67,
FSL_IMX8MP_GPIO3_LOW_IRQ = 68,
FSL_IMX8MP_GPIO3_HIGH_IRQ = 69,
FSL_IMX8MP_GPIO4_LOW_IRQ = 70,
FSL_IMX8MP_GPIO4_HIGH_IRQ = 71,
FSL_IMX8MP_GPIO5_LOW_IRQ = 72,
FSL_IMX8MP_GPIO5_HIGH_IRQ = 73,
FSL_IMX8MP_PCI_INTA_IRQ = 126,
FSL_IMX8MP_PCI_INTB_IRQ = 125,
FSL_IMX8MP_PCI_INTC_IRQ = 124,