Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core

HVX is a set of wide vector instructions.  Machine state includes
    vector registers (VRegs)
    vector predicate registers (QRegs)
    temporary registers for intermediate values
    store buffer (masked stores and scatter/gather)

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
This commit is contained in:
Taylor Simpson 2021-03-17 11:48:57 -05:00
parent 375bcf389f
commit a1559537d1
6 changed files with 200 additions and 6 deletions

View file

@ -67,6 +67,9 @@ struct Packet {
bool pkt_has_store_s0;
bool pkt_has_store_s1;
bool pkt_has_hvx;
Insn *vhist_insn;
Insn insn[INSTRUCTIONS_MAX];
};