mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-02 07:13:54 -06:00
riscv: Add semihosting support
Adapt the arm semihosting support code for RISCV. This implementation is based on the standard for RISC-V semihosting version 0.2 as documented in https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2 Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210107170717.2098982-6-keithp@keithp.com> Message-Id: <20210108224256.2321-17-alex.bennee@linaro.org>
This commit is contained in:
parent
095f8c0293
commit
a10b9d93ec
13 changed files with 162 additions and 12 deletions
|
@ -1,11 +1,11 @@
|
|||
/*
|
||||
* ARM Semihosting Console Support
|
||||
* ARM Compatible Semihosting Console Support.
|
||||
*
|
||||
* Copyright (c) 2019 Linaro Ltd
|
||||
*
|
||||
* Currently ARM is unique in having support for semihosting support
|
||||
* in linux-user. So for now we implement the common console API but
|
||||
* just for arm linux-user.
|
||||
* Currently ARM and RISC-V are unique in having support for
|
||||
* semihosting support in linux-user. So for now we implement the
|
||||
* common console API but just for arm and risc-v linux-user.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0-or-later
|
||||
*/
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue