mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 15:53:54 -06:00
cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs
CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
parent
19a77215f1
commit
a0e372f0c4
18 changed files with 66 additions and 65 deletions
|
@ -37,10 +37,18 @@ static struct XtensaConfigList *xtensa_cores;
|
|||
|
||||
static void xtensa_core_class_init(ObjectClass *oc, void *data)
|
||||
{
|
||||
CPUClass *cc = CPU_CLASS(oc);
|
||||
XtensaCPUClass *xcc = XTENSA_CPU_CLASS(oc);
|
||||
const XtensaConfig *config = data;
|
||||
|
||||
xcc->config = config;
|
||||
|
||||
/* Use num_core_regs to see only non-privileged registers in an unmodified
|
||||
* gdb. Use num_regs to see all registers. gdb modification is required
|
||||
* for that: reset bit 0 in the 'flags' field of the registers definitions
|
||||
* in the gdb/xtensa-config.c inside gdb source tree or inside gdb overlay.
|
||||
*/
|
||||
cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
|
||||
}
|
||||
|
||||
void xtensa_register_core(XtensaConfigList *node)
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue