motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-02 23:33:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs

Browse source 
CPUState::gdb_num_regs replaces num_g_regs.
CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.

Allows building gdb_register_coprocessor() for xtensa, too.

As a side effect this should fix coprocessor register numbering for SMP.

Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-06-28 23:18:47 +02:00
parent 19a77215f1
commit a0e372f0c4
18 changed files with 66 additions and 65 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target-mips/cpu.c
View file

@ -104,6 +104,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->do_unassigned_access = mips_cpu_unassigned_access;
cc->get_phys_page_debug = mips_cpu_get_phys_page_debug;
#endif
cc->gdb_num_core_regs = 73;
}
static const TypeInfo mips_cpu_type_info = {