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* SCSI max_transfer support for scsi-generic (Eric)

Browse source 
* x86 SMI broadcast (Laszlo)
 * Character device QOMification (Marc-André)
 * Record/replay improvements (Pavel)
 * iscsi fixes (Peter L.)
 * "info mtree -f" command (Peter Xu)
 * TSC clock rate reporting (Phil)
 * DEVICE_CATEGORY_CPU (Thomas)
 * Memory sign-extension fix (Ladi)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQEcBAABAgAGBQJYi36jAAoJEL/70l94x66DNFMIAIMy/WjYQ1dtc0xjxJ3EG+cL
 IfmyVA2B7ZLrrN3hFvba8nKsE5/q443QmSjlIjfG7bvlqOszpPi8fnLHe2U0rGwU
 ctP0cw5jXHqiZYVtVDHlCvqPUh/DFydBvkmNUAgpLNVkzWEw2ZBcryKzoNJVIRDz
 hnwX0V/yqleqCEMUp2Ia4BLDg1lO9s6gIUjvDYmlZim5ehOuFvSWizzV0/aGfjTl
 0QGCvehwkAYX056z0PwegijCoCPe9HyB9wfmy7eEVXJnv6NVP0qCmAZek7pF3tt5
 zpKV74jFBjx/rbpl5yc2XOIM6yNbabkalENIzqIfPKYPsNuozOaHl0t82Q3J6OU=
 =/3Gk
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* SCSI max_transfer support for scsi-generic (Eric)
* x86 SMI broadcast (Laszlo)
* Character device QOMification (Marc-André)
* Record/replay improvements (Pavel)
* iscsi fixes (Peter L.)
* "info mtree -f" command (Peter Xu)
* TSC clock rate reporting (Phil)
* DEVICE_CATEGORY_CPU (Thomas)
* Memory sign-extension fix (Ladi)

# gpg: Signature made Fri 27 Jan 2017 17:08:51 GMT
# gpg:                using RSA key 0xBFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (41 commits)
  memory: don't sign-extend 32-bit writes
  chardev: qom-ify
  vc: use a common prefix for chr callbacks
  baum: use a common prefix for chr callbacks
  gtk: overwrite the console.c char driver
  char: use error_report()
  spice-char: improve error reporting
  char: rename TCPChardev and NetChardev
  char: rename CharDriverState Chardev
  bt: use qemu_chr_alloc()
  char: allocate CharDriverState as a single object
  char: use a feature bit for replay
  char: introduce generic qemu_chr_get_kind()
  char: fold single-user functions in caller
  char: move callbacks in CharDriver
  char: use a static array for backends
  char: use a const CharDriver
  doc: fix spelling
  char: add qemu_chr_fe_add_watch() Returns description
  qemu-options: stdio is available on win32
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2017-01-30 10:23:20 +00:00
commit a0def59428
114 changed files with 2204 additions and 1460 deletions
Download patch file Download diff file Expand all files Collapse all files

2
include/hw/arm/exynos4210.h
View file

@ -131,7 +131,7 @@ void exynos4210_combiner_get_gpioin(Exynos4210Irq *irqs, DeviceState *dev,
DeviceState *exynos4210_uart_create(hwaddr addr,
int fifo_size,
int channel,
CharDriverState *chr,
Chardev *chr,
qemu_irq irq);
#endif /* EXYNOS4210_H */

6
include/hw/arm/omap.h
View file

@ -664,14 +664,14 @@ struct omap_uart_s;
struct omap_uart_s *omap_uart_init(hwaddr base,
qemu_irq irq, omap_clk fclk, omap_clk iclk,
qemu_irq txdma, qemu_irq rxdma,
const char *label, CharDriverState *chr);
const char *label, Chardev *chr);
struct omap_uart_s *omap2_uart_init(MemoryRegion *sysmem,
struct omap_target_agent_s *ta,
qemu_irq irq, omap_clk fclk, omap_clk iclk,
qemu_irq txdma, qemu_irq rxdma,
const char *label, CharDriverState *chr);
const char *label, Chardev *chr);
void omap_uart_reset(struct omap_uart_s *s);
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr);
void omap_uart_attach(struct omap_uart_s *s, Chardev *chr);
struct omap_mpuio_s;
qemu_irq *omap_mpuio_in_get(struct omap_mpuio_s *s);

4
include/hw/bt.h
View file

@ -127,8 +127,8 @@ enum {
csrhci_pin_wakeup,
__csrhci_pins,
};
qemu_irq *csrhci_pins_get(CharDriverState *chr);
CharDriverState *uart_hci_init(void);
qemu_irq *csrhci_pins_get(Chardev *chr);
Chardev *uart_hci_init(void);
/* bt-l2cap.c */
struct bt_l2cap_device_s;

2
include/hw/char/cadence_uart.h
View file

@ -51,7 +51,7 @@ typedef struct {
static inline DeviceState *cadence_uart_create(hwaddr addr,
qemu_irq irq,
CharDriverState *chr)
Chardev *chr)
{
DeviceState *dev;
SysBusDevice *s;

2
include/hw/char/escc.h
View file

@ -5,7 +5,7 @@
#define TYPE_ESCC "escc"
#define ESCC_SIZE 4
MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB,
CharDriverState *chrA, CharDriverState *chrB,
Chardev *chrA, Chardev *chrB,
int clock, int it_shift);
void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq,

4
include/hw/char/pl011.h
View file

@ -17,7 +17,7 @@
static inline DeviceState *pl011_create(hwaddr addr,
qemu_irq irq,
CharDriverState *chr)
Chardev *chr)
{
DeviceState *dev;
SysBusDevice *s;
@ -34,7 +34,7 @@ static inline DeviceState *pl011_create(hwaddr addr,
static inline DeviceState *pl011_luminary_create(hwaddr addr,
qemu_irq irq,
CharDriverState *chr)
Chardev *chr)
{
DeviceState *dev;
SysBusDevice *s;

4
include/hw/char/serial.h
View file

@ -88,11 +88,11 @@ void serial_set_frequency(SerialState *s, uint32_t frequency);
/* legacy pre qom */
SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr, MemoryRegion *system_io);
Chardev *chr, MemoryRegion *system_io);
SerialState *serial_mm_init(MemoryRegion *address_space,
hwaddr base, int it_shift,
qemu_irq irq, int baudbase,
CharDriverState *chr, enum device_endian end);
Chardev *chr, enum device_endian end);
/* serial-isa.c */
#define TYPE_ISA_SERIAL "isa-serial"

2
include/hw/char/xilinx_uartlite.h
View file

@ -17,7 +17,7 @@
static inline DeviceState *xilinx_uartlite_create(hwaddr addr,
qemu_irq irq,
CharDriverState *chr)
Chardev *chr)
{
DeviceState *dev;
SysBusDevice *s;

2
include/hw/cris/etraxfs.h
View file

@ -48,7 +48,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr,
static inline DeviceState *etraxfs_ser_create(hwaddr addr,
qemu_irq irq,
CharDriverState *chr)
Chardev *chr)
{
DeviceState *dev;
SysBusDevice *s;

2
include/hw/devices.h
View file

@ -65,6 +65,6 @@ qemu_irq tc6393xb_l3v_get(TC6393xbState *s);
/* sm501.c */
void sm501_init(struct MemoryRegion *address_space_mem, uint32_t base,
uint32_t local_mem_bytes, qemu_irq irq,
CharDriverState *chr);
Chardev *chr);
#endif

2
include/hw/i386/apic_internal.h
View file

@ -189,6 +189,8 @@ struct APICCommonState {
DeviceState *vapic;
hwaddr vapic_paddr; /* note: persistence via kvmvapic */
bool legacy_instance_id;
int apic_irq_delivered; /* for saving static variable */
};
typedef struct VAPICState {

13
include/hw/i386/ich9.h
View file

@ -64,6 +64,16 @@ typedef struct ICH9LPCState {
uint8_t rst_cnt;
MemoryRegion rst_cnt_mem;
/* SMI feature negotiation via fw_cfg */
uint64_t smi_host_features; /* guest-invisible, host endian */
uint8_t smi_host_features_le[8]; /* guest-visible, read-only, little
* endian uint64_t */
uint8_t smi_guest_features_le[8]; /* guest-visible, read-write, little
* endian uint64_t */
uint8_t smi_features_ok; /* guest-visible, read-only; selecting it
* triggers feature lockdown */
uint64_t smi_negotiated_features; /* guest-invisible, host endian */
/* isa bus */
ISABus *isa_bus;
MemoryRegion rcrb_mem; /* root complex register block */
@ -240,4 +250,7 @@ Object *ich9_lpc_find(void);
#define ICH9_SMB_HST_D1 0x06
#define ICH9_SMB_HOST_BLOCK_DB 0x07
/* bit positions used in fw_cfg SMI feature negotiation */
#define ICH9_LPC_SMI_F_BROADCAST_BIT 0
#endif /* HW_ICH9_H */

12
include/hw/i386/pc.h
View file

@ -181,7 +181,7 @@ void parallel_hds_isa_init(ISABus *bus, int n);
bool parallel_mm_init(MemoryRegion *address_space,
hwaddr base, int it_shift, qemu_irq irq,
CharDriverState *chr);
Chardev *chr);
/* i8259.c */
@ -381,6 +381,16 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
.property = "x-mach-use-reliable-get-clock",\
.value = "off",\
},\
{\
.driver = "ICH9-LPC",\
.property = "x-smi-broadcast",\
.value = "off",\
},\
{\
.driver = TYPE_X86_CPU,\
.property = "vmware-cpuid-freq",\
.value = "off",\
},
#define PC_COMPAT_2_7 \
HW_COMPAT_2_7 \

4
include/hw/m68k/mcf.h
View file

@ -11,10 +11,10 @@ uint64_t mcf_uart_read(void *opaque, hwaddr addr,
unsigned size);
void mcf_uart_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size);
void *mcf_uart_init(qemu_irq irq, CharDriverState *chr);
void *mcf_uart_init(qemu_irq irq, Chardev *chr);
void mcf_uart_mm_init(struct MemoryRegion *sysmem,
hwaddr base,
qemu_irq irq, CharDriverState *chr);
qemu_irq irq, Chardev *chr);
/* mcf_intc.c */
qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem,

2
include/hw/ppc/spapr_vio.h
View file

@ -127,7 +127,7 @@ int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq);
VIOsPAPRDevice *vty_lookup(sPAPRMachineState *spapr, target_ulong reg);
void vty_putchars(VIOsPAPRDevice *sdev, uint8_t *buf, int len);
void spapr_vty_create(VIOsPAPRBus *bus, CharDriverState *chardev);
void spapr_vty_create(VIOsPAPRBus *bus, Chardev *chardev);
void spapr_vlan_create(VIOsPAPRBus *bus, NICInfo *nd);
void spapr_vscsi_create(VIOsPAPRBus *bus);

1
include/hw/qdev-core.h
View file

@ -26,6 +26,7 @@ typedef enum DeviceCategory {
DEVICE_CATEGORY_DISPLAY,
DEVICE_CATEGORY_SOUND,
DEVICE_CATEGORY_MISC,
DEVICE_CATEGORY_CPU,
DEVICE_CATEGORY_MAX
} DeviceCategory;

2
include/hw/qdev-properties.h
View file

@ -184,7 +184,7 @@ void qdev_prop_set_uint32(DeviceState *dev, const char *name, uint32_t value);
void qdev_prop_set_int32(DeviceState *dev, const char *name, int32_t value);
void qdev_prop_set_uint64(DeviceState *dev, const char *name, uint64_t value);
void qdev_prop_set_string(DeviceState *dev, const char *name, const char *value);
void qdev_prop_set_chr(DeviceState *dev, const char *name, CharDriverState *value);
void qdev_prop_set_chr(DeviceState *dev, const char *name, Chardev *value);
void qdev_prop_set_netdev(DeviceState *dev, const char *name, NetClientState *value);
void qdev_prop_set_drive(DeviceState *dev, const char *name,
BlockBackend *value, Error **errp);

2
include/hw/sh4/sh.h
View file

@ -42,7 +42,7 @@ void tmu012_init(struct MemoryRegion *sysmem, hwaddr base,
#define SH_SERIAL_FEAT_SCIF (1 << 0)
void sh_serial_init(MemoryRegion *sysmem,
hwaddr base, int feat,
uint32_t freq, CharDriverState *chr,
uint32_t freq, Chardev *chr,
qemu_irq eri_source,
qemu_irq rxi_source,
qemu_irq txi_source,

2
include/hw/sparc/grlib.h
View file

@ -100,7 +100,7 @@ DeviceState *grlib_gptimer_create(hwaddr base,
static inline
DeviceState *grlib_apbuart_create(hwaddr base,
CharDriverState *serial,
Chardev *serial,
qemu_irq irq)
{
DeviceState *dev;

2
include/hw/xen/xen.h
View file

@ -37,7 +37,7 @@ int xen_is_pirq_msi(uint32_t msi_data);
qemu_irq *xen_interrupt_controller_init(void);
void xenstore_store_pv_console_info(int i, struct CharDriverState *chr);
void xenstore_store_pv_console_info(int i, struct Chardev *chr);
void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory);