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hw/arm/armsse: Add support for SSE variants with a system counter

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The SSE-300 has a system counter device; add support for SSE
variants having this device.

As with the existing devices like the cache control block, CPUID
block, etc, we don't try to make the MMIO addresses configurable.  We
can do that if and when we need to model a future SSE variant which
has the counter in a different location.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-33-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2021-02-19 14:46:05 +00:00
parent 1aa9e174b4
commit 9febd17541
2 changed files with 30 additions and 0 deletions
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3
include/hw/arm/armsse.h
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@ -97,6 +97,7 @@
#include "hw/misc/tz-mpc.h"
#include "hw/timer/cmsdk-apb-timer.h"
#include "hw/timer/cmsdk-apb-dualtimer.h"
#include "hw/timer/sse-counter.h"
#include "hw/watchdog/cmsdk-apb-watchdog.h"
#include "hw/misc/iotkit-sysctl.h"
#include "hw/misc/iotkit-sysinfo.h"
@ -164,6 +165,8 @@ struct ARMSSE {
CMSDKAPBWatchdog cmsdk_watchdog[3];
SSECounter sse_counter;
IoTKitSysCtl sysctl;
IoTKitSysCtl sysinfo;