target/hppa: Fix atomic_store_3 for STBY

The parallel version of STBY did not take host endianness into
account, and also computed the incorrect address for STBY_E.

Bswap twice to handle the merge and store.  Compute mask inside
the function rather than as a parameter.  Force align the address,
rather than subtracting one.

Generalize the function to system mode by using probe_access().

Cc: qemu-stable@nongnu.org
Tested-by: Helge Deller <deller@gmx.de>
Reported-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-12-29 13:39:25 -08:00
parent 909c476d99
commit 9f54dc1ce6
3 changed files with 107 additions and 12 deletions

View file

@ -57,26 +57,29 @@ void HELPER(tcond)(CPUHPPAState *env, target_ureg cond)
}
}
static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
uint32_t mask, uintptr_t ra)
static void atomic_store_3(CPUHPPAState *env, target_ulong addr,
uint32_t val, uintptr_t ra)
{
#ifdef CONFIG_USER_ONLY
uint32_t old, new, cmp;
int mmu_idx = cpu_mmu_index(env, 0);
uint32_t old, new, cmp, mask, *haddr;
void *vaddr;
vaddr = probe_access(env, addr, 3, MMU_DATA_STORE, mmu_idx, ra);
if (vaddr == NULL) {
cpu_loop_exit_atomic(env_cpu(env), ra);
}
haddr = (uint32_t *)((uintptr_t)vaddr & -4);
mask = addr & 1 ? 0x00ffffffu : 0xffffff00u;
uint32_t *haddr = g2h(env_cpu(env), addr - 1);
old = *haddr;
while (1) {
new = (old & ~mask) | (val & mask);
new = be32_to_cpu((cpu_to_be32(old) & ~mask) | (val & mask));
cmp = qatomic_cmpxchg(haddr, old, new);
if (cmp == old) {
return;
}
old = cmp;
}
#else
/* FIXME -- we can do better. */
cpu_loop_exit_atomic(env_cpu(env), ra);
#endif
}
static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
@ -92,7 +95,7 @@ static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
case 1:
/* The 3 byte store must appear atomic. */
if (parallel) {
atomic_store_3(env, addr, val, 0x00ffffffu, ra);
atomic_store_3(env, addr, val, ra);
} else {
cpu_stb_data_ra(env, addr, val >> 16, ra);
cpu_stw_data_ra(env, addr + 1, val, ra);
@ -122,7 +125,7 @@ static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val,
case 3:
/* The 3 byte store must appear atomic. */
if (parallel) {
atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
atomic_store_3(env, addr - 3, val, ra);
} else {
cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
cpu_stb_data_ra(env, addr - 1, val >> 8, ra);