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virtio,pc,pci: features, cleanups, fixes

Browse source 
vhost-user enabled on non-linux systems
 beginning of nvme sriov support
 bigger tx queue for vdpa
 virtio iommu bypass
 FADT flag to detect legacy keyboards
 
 Fixes, cleanups all over the place
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio,pc,pci: features, cleanups, fixes

vhost-user enabled on non-linux systems
beginning of nvme sriov support
bigger tx queue for vdpa
virtio iommu bypass
FADT flag to detect legacy keyboards

Fixes, cleanups all over the place

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Mon 07 Mar 2022 22:43:31 GMT
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (47 commits)
  hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present
  tests/acpi: i386: update FACP table differences
  hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table
  tests/acpi: i386: allow FACP acpi table changes
  docs: vhost-user: add subsection for non-Linux platforms
  configure, meson: allow enabling vhost-user on all POSIX systems
  vhost: use wfd on functions setting vring call fd
  event_notifier: add event_notifier_get_wfd()
  pci: drop COMPAT_PROP_PCP for 2.0 machine types
  hw/smbios: Add table 4 parameter, "processor-id"
  x86: cleanup unused compat_apic_id_mode
  vhost-vsock: detach the virqueue element in case of error
  pc: add option to disable PS/2 mouse/keyboard
  acpi: pcihp: pcie: set power on cap on parent slot
  pci: expose TYPE_XIO3130_DOWNSTREAM name
  pci: show id info when pci BDF conflict
  hw/misc/pvpanic: Use standard headers instead
  headers: Add pvpanic.h
  pci-bridge/xio3130_downstream: Fix error handling
  pci-bridge/xio3130_upstream: Fix error handling
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	docs/specs/index.rst
This commit is contained in:
Peter Maydell 2022-03-08 22:27:34 +00:00
commit 9f0369efb0
66 changed files with 1229 additions and 174 deletions
Download patch file Download diff file Expand all files Collapse all files

1
include/hw/acpi/acpi-defs.h
View file

@ -77,6 +77,7 @@ typedef struct AcpiFadtData {
uint16_t plvl2_lat; /* P_LVL2_LAT */
uint16_t plvl3_lat; /* P_LVL3_LAT */
uint16_t arm_boot_arch; /* ARM_BOOT_ARCH */
uint16_t iapc_boot_arch; /* IAPC_BOOT_ARCH */
uint8_t minor_ver; /* FADT Minor Version */
/*

1
include/hw/i386/intel_iommu.h
View file

@ -228,6 +228,7 @@ struct IntelIOMMUState {
bool caching_mode; /* RO - is cap CM enabled? */
bool scalable_mode; /* RO - is Scalable Mode supported? */
bool snoop_control; /* RO - is SNP filed supported? */
dma_addr_t root; /* Current root table pointer */
bool root_scalable; /* Type of root table (scalable or not) */

2
include/hw/i386/pc.h
View file

@ -48,6 +48,7 @@ typedef struct PCMachineState {
bool sata_enabled;
bool pit_enabled;
bool hpet_enabled;
bool i8042_enabled;
bool default_bus_bypass_iommu;
uint64_t max_fw_size;
@ -64,6 +65,7 @@ typedef struct PCMachineState {
#define PC_MACHINE_SMBUS "smbus"
#define PC_MACHINE_SATA "sata"
#define PC_MACHINE_PIT "pit"
#define PC_MACHINE_I8042 "i8042"
#define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
#define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type"

2
include/hw/i386/x86.h
View file

@ -35,8 +35,6 @@ struct X86MachineClass {
/* TSC rate migration: */
bool save_tsc_khz;
/* Enables contiguous-apic-ID mode */
bool compat_apic_id_mode;
/* use DMA capable linuxboot option rom */
bool fwcfg_dma_enabled;
};

15
include/hw/input/i8042.h
View file

@ -23,4 +23,19 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
void i8042_isa_mouse_fake_event(ISAKBDState *isa);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
static inline bool i8042_present(void)
{
bool amb = false;
return object_resolve_path_type("", TYPE_I8042, &amb) || amb;
}
/*
* ACPI v2, Table 5-10 - Fixed ACPI Description Table Boot Architecture
* Flags, bit offset 1 - 8042.
*/
static inline uint16_t iapc_boot_arch_8042(void)
{
return i8042_present() ? 0x1 << 1 : 0x0 ;
}
#endif /* HW_INPUT_I8042_H */

8
include/hw/misc/pvpanic.h
View file

@ -22,14 +22,6 @@
#define PVPANIC_IOPORT_PROP "ioport"
/* The bit of supported pv event, TODO: include uapi header and remove this */
#define PVPANIC_F_PANICKED 0
#define PVPANIC_F_CRASHLOADED 1
/* The pv event value */
#define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED)
#define PVPANIC_CRASHLOADED (1 << PVPANIC_F_CRASHLOADED)
/*
* PVPanicState for any device type
*/

15
include/hw/pci-bridge/xio3130_downstream.h Normal file
View file

@ -0,0 +1,15 @@
/*
* TI X3130 pci express downstream port switch
*
* Copyright (C) 2022 Igor Mammedov <imammedo@redhat.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_PCI_BRIDGE_XIO3130_DOWNSTREAM_H
#define HW_PCI_BRIDGE_XIO3130_DOWNSTREAM_H
#define TYPE_XIO3130_DOWNSTREAM "xio3130-downstream"
#endif

12
include/hw/pci/pci.h
View file

@ -7,9 +7,6 @@
/* PCI includes legacy ISA access. */
#include "hw/isa/isa.h"
#include "hw/pci/pcie.h"
#include "qom/object.h"
extern bool pci_available;
/* PCI bus */
@ -157,6 +154,7 @@ enum {
#define QEMU_PCI_VGA_IO_HI_SIZE 0x20
#include "hw/pci/pci_regs.h"
#include "hw/pci/pcie.h"
/* PCI HEADER_TYPE */
#define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80
@ -499,6 +497,9 @@ typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
AddressSpace *pci_device_iommu_address_space(PCIDevice *dev);
void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque);
pcibus_t pci_bar_address(PCIDevice *d,
int reg, uint8_t type, pcibus_t size);
static inline void
pci_set_byte(uint8_t *config, uint8_t val)
{
@ -779,6 +780,11 @@ static inline int pci_is_express_downstream_port(const PCIDevice *d)
return type == PCI_EXP_TYPE_DOWNSTREAM || type == PCI_EXP_TYPE_ROOT_PORT;
}
static inline int pci_is_vf(const PCIDevice *d)
{
return d->exp.sriov_vf.pf != NULL;
}
static inline uint32_t pci_config_size(const PCIDevice *d)
{
return pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE;

1
include/hw/pci/pci_regs.h
View file

@ -4,5 +4,6 @@
#include "standard-headers/linux/pci_regs.h"
#define PCI_PM_CAP_VER_1_1 0x0002 /* PCI PM spec ver. 1.1 */
#define PCI_PM_CAP_VER_1_2 0x0003 /* PCI PM spec ver. 1.2 */
#endif

7
include/hw/pci/pcie.h
View file

@ -24,6 +24,7 @@
#include "hw/pci/pci_regs.h"
#include "hw/pci/pcie_regs.h"
#include "hw/pci/pcie_aer.h"
#include "hw/pci/pcie_sriov.h"
#include "hw/hotplug.h"
typedef enum {
@ -81,6 +82,11 @@ struct PCIExpressDevice {
/* ACS */
uint16_t acs_cap;
/* SR/IOV */
uint16_t sriov_cap;
PCIESriovPF sriov_pf;
PCIESriovVF sriov_vf;
};
#define COMPAT_PROP_PCP "power_controller_present"
@ -112,6 +118,7 @@ void pcie_cap_slot_write_config(PCIDevice *dev,
uint32_t addr, uint32_t val, int len);
int pcie_cap_slot_post_load(void *opaque, int version_id);
void pcie_cap_slot_push_attention_button(PCIDevice *dev);
void pcie_cap_slot_enable_power(PCIDevice *dev);
void pcie_cap_root_init(PCIDevice *dev);
void pcie_cap_root_reset(PCIDevice *dev);

77
include/hw/pci/pcie_sriov.h Normal file
View file

@ -0,0 +1,77 @@
/*
* pcie_sriov.h:
*
* Implementation of SR/IOV emulation support.
*
* Copyright (c) 2015 Knut Omang <knut.omang@oracle.com>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
*
*/
#ifndef QEMU_PCIE_SRIOV_H
#define QEMU_PCIE_SRIOV_H
struct PCIESriovPF {
uint16_t num_vfs; /* Number of virtual functions created */
uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar */
const char *vfname; /* Reference to the device type used for the VFs */
PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */
};
struct PCIESriovVF {
PCIDevice *pf; /* Pointer back to owner physical function */
uint16_t vf_number; /* Logical VF number of this function */
};
void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
const char *vfname, uint16_t vf_dev_id,
uint16_t init_vfs, uint16_t total_vfs,
uint16_t vf_offset, uint16_t vf_stride);
void pcie_sriov_pf_exit(PCIDevice *dev);
/* Set up a VF bar in the SR/IOV bar area */
void pcie_sriov_pf_init_vf_bar(PCIDevice *dev, int region_num,
uint8_t type, dma_addr_t size);
/* Instantiate a bar for a VF */
void pcie_sriov_vf_register_bar(PCIDevice *dev, int region_num,
MemoryRegion *memory);
/*
* Default (minimal) page size support values
* as required by the SR/IOV standard:
* 0x553 << 12 = 0x553000 = 4K + 8K + 64K + 256K + 1M + 4M
*/
#define SRIOV_SUP_PGSIZE_MINREQ 0x553
/*
* Optionally add supported page sizes to the mask of supported page sizes
* Page size values are interpreted as opt_sup_pgsize << 12.
*/
void pcie_sriov_pf_add_sup_pgsize(PCIDevice *dev, uint16_t opt_sup_pgsize);
/* SR/IOV capability config write handler */
void pcie_sriov_config_write(PCIDevice *dev, uint32_t address,
uint32_t val, int len);
/* Reset SR/IOV VF Enable bit to unregister all VFs */
void pcie_sriov_pf_disable_vfs(PCIDevice *dev);
/* Get logical VF number of a VF - only valid for VFs */
uint16_t pcie_sriov_vf_number(PCIDevice *dev);
/*
* Get the physical function that owns this VF.
* Returns NULL if dev is not a virtual function
*/
PCIDevice *pcie_sriov_get_pf(PCIDevice *dev);
/*
* Get the n-th VF of this physical function - only valid for PF.
* Returns NULL if index is invalid
*/
PCIDevice *pcie_sriov_get_vf_at_index(PCIDevice *dev, int n);
#endif /* QEMU_PCIE_SRIOV_H */

3
include/hw/virtio/vhost-user-i2c.h
View file

@ -25,4 +25,7 @@ struct VHostUserI2C {
bool connected;
};
/* Virtio Feature bits */
#define VIRTIO_I2C_F_ZERO_LENGTH_REQUEST 0
#endif /* _QEMU_VHOST_USER_I2C_H */

3
include/hw/virtio/vhost-user.h
View file

@ -12,9 +12,10 @@
#include "hw/virtio/virtio.h"
typedef struct VhostUserHostNotifier {
struct rcu_head rcu;
MemoryRegion mr;
void *addr;
bool set;
void *unmap_addr;
} VhostUserHostNotifier;
typedef struct VhostUserState {

1
include/hw/virtio/virtio-iommu.h
View file

@ -58,6 +58,7 @@ struct VirtIOIOMMU {
GTree *domains;
QemuMutex mutex;
GTree *endpoints;
bool boot_bypass;
};
#endif