motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-07 01:33:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

* First batch of MAINTAINERS updates

Browse source 
* IOAPIC fixes (to pass kvm-unit-tests with -machine kernel_irqchip=off)
 * NBD API upgrades from Daniel
 * strtosz fixes from Marc-André
 * improved support for readonly=on on scsi-generic devices
 * new "info ioapic" and "info lapic" monitor commands
 * Peter Crosthwaite's ELF_MACHINE cleanups
 * docs patches from Thomas and Daniel
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQEcBAABCAAGBQJWBSAEAAoJEL/70l94x66DeL4H/21YR4GWCqo30f+W5kx24ZNo
 by8H2kdZmWKRr/La1JlAReki9GCP1U8Q0cYC8V885gHLKcahWS/75UKwNbw0OSyg
 2jj4uREc645TTFAvV5kQ+uAw9F/dchvkXylrVgOoUPipfmYibXY8JLu9AcVnZi6H
 X5Rvpqo4Uhp2cbRG7rYWrwgpNL+VZmKc8LDdqdlXrkjjanhuAYO2E9NBKaE+xJQQ
 FHcpkV92iSZFEZ0CB535BTIdNdDM/ae6bw1As27EF10YBTfneCQNazSeh13pLO2n
 lHit2GZr2VeTSBrPkPsItToY/Gw38duVZK4QM5/wSkHBzyeUJY0ltQrf53veYfk=
 =uc+I
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* First batch of MAINTAINERS updates
* IOAPIC fixes (to pass kvm-unit-tests with -machine kernel_irqchip=off)
* NBD API upgrades from Daniel
* strtosz fixes from Marc-André
* improved support for readonly=on on scsi-generic devices
* new "info ioapic" and "info lapic" monitor commands
* Peter Crosthwaite's ELF_MACHINE cleanups
* docs patches from Thomas and Daniel

# gpg: Signature made Fri 25 Sep 2015 11:20:52 BST using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"

* remotes/bonzini/tags/for-upstream: (52 commits)
  doc: Refresh URLs in the qemu-tech documentation
  docs: describe the QEMU build system structure / design
  typedef: add typedef for QemuOpts
  i386: interrupt poll processing
  i386: partial revert of interrupt poll fix
  ppc: Rename ELF_MACHINE to be PPC specific
  i386: Rename ELF_MACHINE to be x86 specific
  alpha: Remove ELF_MACHINE from cpu.h
  mips: Remove ELF_MACHINE from cpu.h
  sparc: Remove ELF_MACHINE from cpu.h
  s390: Remove ELF_MACHINE from cpu.h
  sh4: Remove ELF_MACHINE from cpu.h
  xtensa: Remove ELF_MACHINE from cpu.h
  tricore: Remove ELF_MACHINE from cpu.h
  or32: Remove ELF_MACHINE from cpu.h
  lm32: Remove ELF_MACHINE from cpu.h
  unicore: Remove ELF_MACHINE from cpu.h
  moxie: Remove ELF_MACHINE from cpu.h
  cris: Remove ELF_MACHINE from cpu.h
  m68k: Remove ELF_MACHINE from cpu.h
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2015-09-25 21:52:30 +01:00
commit 9e071429e6
85 changed files with 1341 additions and 386 deletions
Download patch file Download diff file Expand all files Collapse all files

3
include/elf.h
View file

@ -135,6 +135,9 @@ typedef int64_t Elf64_Sxword;
#define EM_TILEGX 191 /* TILE-Gx */
#define EM_MOXIE 223 /* Moxie processor family */
#define EM_MOXIE_OLD 0xFEED
/* This is the info that is needed to parse the dynamic section of the file */
#define DT_NULL 0
#define DT_NEEDED 1

23
include/hw/elf_ops.h
View file

@ -282,25 +282,36 @@ static int glue(load_elf, SZ)(const char *name, int fd,
switch (elf_machine) {
case EM_PPC64:
if (EM_PPC64 != ehdr.e_machine)
if (EM_PPC != ehdr.e_machine) {
if (ehdr.e_machine != EM_PPC64) {
if (ehdr.e_machine != EM_PPC) {
ret = ELF_LOAD_WRONG_ARCH;
goto fail;
}
}
break;
case EM_X86_64:
if (EM_X86_64 != ehdr.e_machine)
if (EM_386 != ehdr.e_machine) {
if (ehdr.e_machine != EM_X86_64) {
if (ehdr.e_machine != EM_386) {
ret = ELF_LOAD_WRONG_ARCH;
goto fail;
}
}
break;
case EM_MICROBLAZE:
if (EM_MICROBLAZE != ehdr.e_machine)
if (EM_MICROBLAZE_OLD != ehdr.e_machine) {
if (ehdr.e_machine != EM_MICROBLAZE) {
if (ehdr.e_machine != EM_MICROBLAZE_OLD) {
ret = ELF_LOAD_WRONG_ARCH;
goto fail;
}
}
break;
case EM_MOXIE:
if (ehdr.e_machine != EM_MOXIE) {
if (ehdr.e_machine != EM_MOXIE_OLD) {
ret = ELF_LOAD_WRONG_ARCH;
goto fail;
}
}
break;
default:
if (elf_machine != ehdr.e_machine) {

92
include/hw/i386/apic_internal.h
View file

@ -50,17 +50,73 @@
#define APIC_TRIGGER_EDGE 0
#define APIC_TRIGGER_LEVEL 1
#define APIC_LVT_TIMER_PERIODIC (1<<17)
#define APIC_LVT_MASKED (1<<16)
#define APIC_LVT_LEVEL_TRIGGER (1<<15)
#define APIC_LVT_REMOTE_IRR (1<<14)
#define APIC_INPUT_POLARITY (1<<13)
#define APIC_SEND_PENDING (1<<12)
#define APIC_VECTOR_MASK 0xff
#define APIC_DCR_MASK 0xf
#define ESR_ILLEGAL_ADDRESS (1 << 7)
#define APIC_LVT_TIMER_SHIFT 17
#define APIC_LVT_MASKED_SHIFT 16
#define APIC_LVT_LEVEL_TRIGGER_SHIFT 15
#define APIC_LVT_REMOTE_IRR_SHIFT 14
#define APIC_LVT_INT_POLARITY_SHIFT 13
#define APIC_LVT_DELIV_STS_SHIFT 12
#define APIC_LVT_DELIV_MOD_SHIFT 8
#define APIC_SV_DIRECTED_IO (1<<12)
#define APIC_SV_ENABLE (1<<8)
#define APIC_LVT_TIMER_TSCDEADLINE (2 << APIC_LVT_TIMER_SHIFT)
#define APIC_LVT_TIMER_PERIODIC (1 << APIC_LVT_TIMER_SHIFT)
#define APIC_LVT_MASKED (1 << APIC_LVT_MASKED_SHIFT)
#define APIC_LVT_LEVEL_TRIGGER (1 << APIC_LVT_LEVEL_TRIGGER_SHIFT)
#define APIC_LVT_REMOTE_IRR (1 << APIC_LVT_REMOTE_IRR_SHIFT)
#define APIC_LVT_INT_POLARITY (1 << APIC_LVT_INT_POLARITY_SHIFT)
#define APIC_LVT_DELIV_STS (1 << APIC_LVT_DELIV_STS_SHIFT)
#define APIC_LVT_DELIV_MOD (7 << APIC_LVT_DELIV_MOD_SHIFT)
#define APIC_ESR_ILL_ADDRESS_SHIFT 7
#define APIC_ESR_RECV_ILL_VECT_SHIFT 6
#define APIC_ESR_SEND_ILL_VECT_SHIFT 5
#define APIC_ESR_RECV_ACCEPT_SHIFT 3
#define APIC_ESR_SEND_ACCEPT_SHIFT 2
#define APIC_ESR_RECV_CHECK_SUM_SHIFT 1
#define APIC_ESR_ILLEGAL_ADDRESS (1 << APIC_ESR_ILL_ADDRESS_SHIFT)
#define APIC_ESR_RECV_ILLEGAL_VECT (1 << APIC_ESR_RECV_ILL_VECT_SHIFT)
#define APIC_ESR_SEND_ILLEGAL_VECT (1 << APIC_ESR_SEND_ILL_VECT_SHIFT)
#define APIC_ESR_RECV_ACCEPT (1 << APIC_ESR_RECV_ACCEPT_SHIFT)
#define APIC_ESR_SEND_ACCEPT (1 << APIC_ESR_SEND_ACCEPT_SHIFT)
#define APIC_ESR_RECV_CHECK_SUM (1 << APIC_ESR_RECV_CHECK_SUM_SHIFT)
#define APIC_ESR_SEND_CHECK_SUM 1
#define APIC_ICR_DEST_SHIFT 24
#define APIC_ICR_DEST_SHORT_SHIFT 18
#define APIC_ICR_TRIGGER_MOD_SHIFT 15
#define APIC_ICR_LEVEL_SHIFT 14
#define APIC_ICR_DELIV_STS_SHIFT 12
#define APIC_ICR_DEST_MOD_SHIFT 11
#define APIC_ICR_DELIV_MOD_SHIFT 8
#define APIC_ICR_DEST_SHORT (3 << APIC_ICR_DEST_SHORT_SHIFT)
#define APIC_ICR_TRIGGER_MOD (1 << APIC_ICR_TRIGGER_MOD_SHIFT)
#define APIC_ICR_LEVEL (1 << APIC_ICR_LEVEL_SHIFT)
#define APIC_ICR_DELIV_STS (1 << APIC_ICR_DELIV_STS_SHIFT)
#define APIC_ICR_DEST_MOD (1 << APIC_ICR_DEST_MOD_SHIFT)
#define APIC_ICR_DELIV_MOD (7 << APIC_ICR_DELIV_MOD_SHIFT)
#define APIC_PR_CLASS_SHIFT 4
#define APIC_PR_SUB_CLASS 0xf
#define APIC_LOGDEST_XAPIC_SHIFT 4
#define APIC_LOGDEST_XAPIC_ID 0xf
#define APIC_LOGDEST_X2APIC_SHIFT 16
#define APIC_LOGDEST_X2APIC_ID 0xffff
#define APIC_SPURIO_FOCUS_SHIFT 9
#define APIC_SPURIO_ENABLED_SHIFT 8
#define APIC_SPURIO_FOCUS (1 << APIC_SPURIO_FOCUS_SHIFT)
#define APIC_SPURIO_ENABLED (1 << APIC_SPURIO_ENABLED_SHIFT)
#define APIC_SV_DIRECTED_IO (1 << 12)
#define APIC_SV_ENABLE (1 << 8)
#define VAPIC_ENABLE_BIT 0
#define VAPIC_ENABLE_MASK (1 << VAPIC_ENABLE_BIT)
@ -147,4 +203,22 @@ void apic_enable_vapic(DeviceState *d, hwaddr paddr);
void vapic_report_tpr_access(DeviceState *dev, CPUState *cpu, target_ulong ip,
TPRAccess access);
int apic_get_ppr(APICCommonState *s);
static inline void apic_set_bit(uint32_t *tab, int index)
{
int i, mask;
i = index >> 5;
mask = 1 << (index & 0x1f);
tab[i] |= mask;
}
static inline int apic_get_bit(uint32_t *tab, int index)
{
int i, mask;
i = index >> 5;
mask = 1 << (index & 0x1f);
return !!(tab[i] & mask);
}
#endif /* !QEMU_APIC_INTERNAL_H */

7
include/hw/i386/ioapic_internal.h
View file

@ -40,7 +40,12 @@
#define IOAPIC_LVT_DELIV_MODE_SHIFT 8
#define IOAPIC_LVT_MASKED (1 << IOAPIC_LVT_MASKED_SHIFT)
#define IOAPIC_LVT_TRIGGER_MODE (1 << IOAPIC_LVT_TRIGGER_MODE_SHIFT)
#define IOAPIC_LVT_REMOTE_IRR (1 << IOAPIC_LVT_REMOTE_IRR_SHIFT)
#define IOAPIC_LVT_POLARITY (1 << IOAPIC_LVT_POLARITY_SHIFT)
#define IOAPIC_LVT_DELIV_STATUS (1 << IOAPIC_LVT_DELIV_STATUS_SHIFT)
#define IOAPIC_LVT_DEST_MODE (1 << IOAPIC_LVT_DEST_MODE_SHIFT)
#define IOAPIC_LVT_DELIV_MODE (7 << IOAPIC_LVT_DELIV_MODE_SHIFT)
#define IOAPIC_TRIGGER_EDGE 0
#define IOAPIC_TRIGGER_LEVEL 1
@ -100,4 +105,6 @@ struct IOAPICCommonState {
void ioapic_reset_common(DeviceState *dev);
void ioapic_print_redtbl(Monitor *mon, IOAPICCommonState *s);
#endif /* !QEMU_IOAPIC_INTERNAL_H */

5
include/hw/i386/pc.h
View file

@ -123,6 +123,11 @@ int pic_get_output(DeviceState *d);
void hmp_info_pic(Monitor *mon, const QDict *qdict);
void hmp_info_irq(Monitor *mon, const QDict *qdict);
/* ioapic.c */
void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict);
void ioapic_dump_state(Monitor *mon, const QDict *qdict);
/* Global System Interrupts */
#define GSI_NUM_PINS IOAPIC_NUM_PINS

25
include/hw/virtio/vhost-scsi.h
View file

@ -19,37 +19,12 @@
#include "hw/virtio/virtio-scsi.h"
#include "hw/virtio/vhost.h"
/*
* Used by QEMU userspace to ensure a consistent vhost-scsi ABI.
*
* ABI Rev 0: July 2012 version starting point for v3.6-rc merge candidate +
* RFC-v2 vhost-scsi userspace. Add GET_ABI_VERSION ioctl usage
* ABI Rev 1: January 2013. Ignore vhost_tpgt filed in struct vhost_scsi_target.
* All the targets under vhost_wwpn can be seen and used by guest.
*/
#define VHOST_SCSI_ABI_VERSION 1
/* TODO #include <linux/vhost.h> properly */
/* For VHOST_SCSI_SET_ENDPOINT/VHOST_SCSI_CLEAR_ENDPOINT ioctl */
struct vhost_scsi_target {
int abi_version;
char vhost_wwpn[224];
unsigned short vhost_tpgt;
unsigned short reserved;
};
enum vhost_scsi_vq_list {
VHOST_SCSI_VQ_CONTROL = 0,
VHOST_SCSI_VQ_EVENT = 1,
VHOST_SCSI_VQ_NUM_FIXED = 2,
};
#define VHOST_VIRTIO 0xAF
#define VHOST_SCSI_SET_ENDPOINT _IOW(VHOST_VIRTIO, 0x40, struct vhost_scsi_target)
#define VHOST_SCSI_CLEAR_ENDPOINT _IOW(VHOST_VIRTIO, 0x41, struct vhost_scsi_target)
#define VHOST_SCSI_GET_ABI_VERSION _IOW(VHOST_VIRTIO, 0x42, int)
#define TYPE_VHOST_SCSI "vhost-scsi"
#define VHOST_SCSI(obj) \
OBJECT_CHECK(VHostSCSI, (obj), TYPE_VHOST_SCSI)

3
include/monitor/hmp-target.h
View file

@ -37,9 +37,12 @@ struct MonitorDef {
const MonitorDef *target_monitor_defs(void);
CPUArchState *mon_get_cpu_env(void);
CPUState *mon_get_cpu(void);
void hmp_info_mem(Monitor *mon, const QDict *qdict);
void hmp_info_tlb(Monitor *mon, const QDict *qdict);
void hmp_mce(Monitor *mon, const QDict *qdict);
void hmp_info_local_apic(Monitor *mon, const QDict *qdict);
void hmp_info_io_apic(Monitor *mon, const QDict *qdict);
#endif /* MONITOR_COMMON */

1
include/monitor/monitor.h
View file

@ -34,6 +34,7 @@ int monitor_fd_param(Monitor *mon, const char *fdname, Error **errp);
void monitor_vprintf(Monitor *mon, const char *fmt, va_list ap)
GCC_FMT_ATTR(2, 0);
void monitor_printf(Monitor *mon, const char *fmt, ...) GCC_FMT_ATTR(2, 3);
int monitor_fprintf(FILE *stream, const char *fmt, ...) GCC_FMT_ATTR(2, 3);
void monitor_flush(Monitor *mon);
int monitor_set_cpu(int cpu_index);
int monitor_get_cpu_index(void);

27
include/qemu-common.h
View file

@ -217,22 +217,23 @@ int parse_uint(const char *s, unsigned long long *value, char **endptr,
int parse_uint_full(const char *s, unsigned long long *value, int base);
/*
* strtosz() suffixes used to specify the default treatment of an
* argument passed to strtosz() without an explicit suffix.
* qemu_strtosz() suffixes used to specify the default treatment of an
* argument passed to qemu_strtosz() without an explicit suffix.
* These should be defined using upper case characters in the range
* A-Z, as strtosz() will use qemu_toupper() on the given argument
* A-Z, as qemu_strtosz() will use qemu_toupper() on the given argument
* prior to comparison.
*/
#define STRTOSZ_DEFSUFFIX_EB 'E'
#define STRTOSZ_DEFSUFFIX_PB 'P'
#define STRTOSZ_DEFSUFFIX_TB 'T'
#define STRTOSZ_DEFSUFFIX_GB 'G'
#define STRTOSZ_DEFSUFFIX_MB 'M'
#define STRTOSZ_DEFSUFFIX_KB 'K'
#define STRTOSZ_DEFSUFFIX_B 'B'
int64_t strtosz(const char *nptr, char **end);
int64_t strtosz_suffix(const char *nptr, char **end, const char default_suffix);
int64_t strtosz_suffix_unit(const char *nptr, char **end,
#define QEMU_STRTOSZ_DEFSUFFIX_EB 'E'
#define QEMU_STRTOSZ_DEFSUFFIX_PB 'P'
#define QEMU_STRTOSZ_DEFSUFFIX_TB 'T'
#define QEMU_STRTOSZ_DEFSUFFIX_GB 'G'
#define QEMU_STRTOSZ_DEFSUFFIX_MB 'M'
#define QEMU_STRTOSZ_DEFSUFFIX_KB 'K'
#define QEMU_STRTOSZ_DEFSUFFIX_B 'B'
int64_t qemu_strtosz(const char *nptr, char **end);
int64_t qemu_strtosz_suffix(const char *nptr, char **end,
const char default_suffix);
int64_t qemu_strtosz_suffix_unit(const char *nptr, char **end,
const char default_suffix, int64_t unit);
#define K_BYTE (1ULL << 10)
#define M_BYTE (1ULL << 20)

5
include/qemu/option.h
View file

@ -30,6 +30,7 @@
#include "qemu/queue.h"
#include "qapi/error.h"
#include "qapi/qmp/qdict.h"
#include "qemu/typedefs.h"
const char *get_opt_name(char *buf, int buf_size, const char *p, char delim);
const char *get_opt_value(char *buf, int buf_size, const char *p);
@ -44,10 +45,6 @@ void parse_option_size(const char *name, const char *value,
bool has_help_option(const char *param);
bool is_valid_option_list(const char *param);
typedef struct QemuOpt QemuOpt;
typedef struct QemuOpts QemuOpts;
typedef struct QemuOptsList QemuOptsList;
enum QemuOptType {
QEMU_OPT_STRING = 0, /* no parsing (use string as-is) */
QEMU_OPT_BOOL, /* on/off */

3
include/qemu/typedefs.h
View file

@ -67,6 +67,9 @@ typedef struct Property Property;
typedef struct QEMUBH QEMUBH;
typedef struct QemuConsole QemuConsole;
typedef struct QEMUFile QEMUFile;
typedef struct QemuOpt QemuOpt;
typedef struct QemuOpts QemuOpts;
typedef struct QemuOptsList QemuOptsList;
typedef struct QEMUSGList QEMUSGList;
typedef struct QEMUSizedBuffer QEMUSizedBuffer;
typedef struct QEMUTimerListGroup QEMUTimerListGroup;