motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-09 10:34:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

Add software and timer interrupt support

Browse source 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2008-09-22 19:50:28 +00:00
parent d3ae49bcf7
commit 9d92659858
5 changed files with 108 additions and 10 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target-sparc/cpu.h
View file

@ -329,6 +329,8 @@ typedef struct CPUSPARCState {
/* UA 2005 hyperprivileged registers */
uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr;
void *hstick; // UA 2005
uint32_t softint;
#define SOFTINT_TIMER 1
#endif
sparc_def_t *def;
} CPUSPARCState;

3
target-sparc/helper.h
View file

@ -31,6 +31,9 @@ DEF_HELPER(target_ulong, helper_cas_asi, (target_ulong addr, \
DEF_HELPER(target_ulong, helper_casx_asi, (target_ulong addr, \
target_ulong val1, \
target_ulong val2, uint32_t asi))
DEF_HELPER(void, helper_set_softint, (uint64_t value))
DEF_HELPER(void, helper_clear_softint, (uint64_t value))
DEF_HELPER(void, helper_write_softint, (uint64_t value))
DEF_HELPER(void, helper_tick_set_count, (void *opaque, uint64_t count))
DEF_HELPER(uint64_t, helper_tick_get_count, (void *opaque))
DEF_HELPER(void, helper_tick_set_limit, (void *opaque, uint64_t limit))

15
target-sparc/op_helper.c
View file

@ -2671,6 +2671,21 @@ void helper_retry(void)
env->tl--;
env->tsptr = &env->ts[env->tl & MAXTL_MASK];
}
void helper_set_softint(uint64_t value)
{
env->softint |= (uint32_t)value;
}
void helper_clear_softint(uint64_t value)
{
env->softint &= (uint32_t)~value;
}
void helper_write_softint(uint64_t value)
{
env->softint = (uint32_t)value;
}
#endif
void helper_flush(target_ulong addr)

34
target-sparc/translate.c
View file

@ -49,7 +49,7 @@ static TCGv cpu_cond, cpu_src1, cpu_src2, cpu_dst, cpu_addr, cpu_val;
#ifdef TARGET_SPARC64
static TCGv cpu_xcc, cpu_asi, cpu_fprs, cpu_gsr;
static TCGv cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr;
static TCGv cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver;
static TCGv cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver, cpu_softint;
#else
static TCGv cpu_wim;
#endif
@ -2102,6 +2102,10 @@ static void disas_sparc_insn(DisasContext * dc)
goto jmp_insn;
gen_movl_TN_reg(rd, cpu_gsr);
break;
case 0x16: /* Softint */
tcg_gen_ext_i32_tl(cpu_dst, cpu_softint);
gen_movl_TN_reg(rd, cpu_dst);
break;
case 0x17: /* Tick compare */
gen_movl_TN_reg(rd, cpu_tick_cmpr);
break;
@ -2126,7 +2130,6 @@ static void disas_sparc_insn(DisasContext * dc)
case 0x12: /* Dispatch Control */
case 0x14: /* Softint set, WO */
case 0x15: /* Softint clear, WO */
case 0x16: /* Softint write */
#endif
default:
goto illegal_insn;
@ -3233,6 +3236,27 @@ static void disas_sparc_insn(DisasContext * dc)
goto jmp_insn;
tcg_gen_xor_tl(cpu_gsr, cpu_src1, cpu_src2);
break;
case 0x14: /* Softint set */
if (!supervisor(dc))
goto illegal_insn;
tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2);
tcg_gen_helper_0_1(helper_set_softint,
cpu_tmp64);
break;
case 0x15: /* Softint clear */
if (!supervisor(dc))
goto illegal_insn;
tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2);
tcg_gen_helper_0_1(helper_clear_softint,
cpu_tmp64);
break;
case 0x16: /* Softint write */
if (!supervisor(dc))
goto illegal_insn;
tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2);
tcg_gen_helper_0_1(helper_write_softint,
cpu_tmp64);
break;
case 0x17: /* Tick compare */
#if !defined(CONFIG_USER_ONLY)
if (!supervisor(dc))
@ -3292,9 +3316,6 @@ static void disas_sparc_insn(DisasContext * dc)
case 0x11: /* Performance Instrumentation
Counter */
case 0x12: /* Dispatch Control */
case 0x14: /* Softint set */
case 0x15: /* Softint clear */
case 0x16: /* Softint write */
#endif
default:
goto illegal_insn;
@ -4952,6 +4973,9 @@ void gen_intermediate_code_init(CPUSPARCState *env)
offsetof(CPUState, ssr), "ssr");
cpu_ver = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
offsetof(CPUState, version), "ver");
cpu_softint = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
offsetof(CPUState, softint),
"softint");
#else
cpu_wim = tcg_global_mem_new(TCG_TYPE_I32,
TCG_AREG0, offsetof(CPUState, wim),