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ppc/pnv: Remove user-created PHB{3,4,5} devices

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On a real system with POWER{8,9,10} processors, PHBs are sub-units of
the processor, they can be deactivated by firmware but not plugged in
or out like a PCI adapter on a slot. Nevertheless, having user-created
PHBs in QEMU seemed to be a good idea for testing purposes :

 1. having a limited set of PHBs speedups boot time.
 2. it is useful to be able to mimic a partially broken topology you
    some time have to deal with during bring-up.

PowerNV is also used for distro install tests and having libvirt
support eases these tasks. libvirt prefers to run the machine with
-nodefaults to be sure not to drag unexpected devices which would need
to be defined in the domain file without being specified on the QEMU
command line. For this reason :

 3. -nodefaults should not include default PHBs

User-created PHB{3,4,5} devices satisfied all these needs but reality
proves to be a bit more complex, internally when modeling such
devices, and externally when dealing with the user interface.

Req 1. and 2. can be simply addressed differently with a machine option:
"phb-mask=<uint>", which QEMU would use to enable/disable PHB device
nodes when creating the device tree.

For Req 3., we need to make sure we are taking the right approach. It
seems that we should expose a new type of user-created PHB device, a
generic virtualized one, that libvirt would use and not one depending
on the processor revision. This needs more thinking.

For now, remove user-created PHB{3,4,5} devices. All the cleanups we
did are not lost and they will be useful for the next steps.

Fixes: 5bc67b052b ("ppc/pnv: Introduce user creatable pnv-phb4 devices")
Fixes: 1f6a88fffc ("ppc/pnv: Introduce support for user created PHB3 devices")
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220314130514.529931-1-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Cédric Le Goater 2022-03-14 15:57:17 +01:00
parent 8e6f45cc3f
commit 9c10d86fee
5 changed files with 10 additions and 118 deletions
Download patch file Download diff file Expand all files Collapse all files

62
hw/pci-host/pnv_phb4.c
View file

@ -1545,70 +1545,14 @@ static void pnv_phb4_instance_init(Object *obj)
object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE);
}
static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb,
Error **errp)
{
Pnv9Chip *chip9 = PNV9_CHIP(chip);
int chip_id = phb->chip_id;
int index = phb->phb_id;
int i, j;
for (i = 0; i < chip->num_pecs; i++) {
/*
* For each PEC, check the amount of phbs it supports
* and see if the given phb4 index matches an index.
*/
PnvPhb4PecState *pec = &chip9->pecs[i];
for (j = 0; j < pec->num_phbs; j++) {
if (index == pnv_phb4_pec_get_phb_id(pec, j)) {
return pec;
}
}
}
error_setg(errp,
"pnv-phb4 chip-id %d index %d didn't match any existing PEC",
chip_id, index);
return NULL;
}
static void pnv_phb4_realize(DeviceState *dev, Error **errp)
{
PnvPHB4 *phb = PNV_PHB4(dev);
PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine());
PnvChip *chip = pnv_get_chip(pnv, phb->chip_id);
PCIHostState *pci = PCI_HOST_BRIDGE(dev);
XiveSource *xsrc = &phb->xsrc;
BusState *s;
Error *local_err = NULL;
int nr_irqs;
char name[32];
if (!chip) {
error_setg(errp, "invalid chip id: %d", phb->chip_id);
return;
}
/* User created PHBs need to be assigned to a PEC */
if (!phb->pec) {
phb->pec = pnv_phb4_get_pec(chip, phb, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
}
/* Reparent the PHB to the chip to build the device tree */
pnv_chip_parent_fixup(chip, OBJECT(phb), phb->phb_id);
s = qdev_get_parent_bus(DEVICE(chip));
if (!qdev_set_parent_bus(DEVICE(phb), s, &local_err)) {
error_propagate(errp, local_err);
return;
}
/* Set the "big_phb" flag */
phb->big_phb = phb->phb_id == 0 || phb->phb_id == 3;
@ -1766,7 +1710,7 @@ static void pnv_phb4_class_init(ObjectClass *klass, void *data)
dc->realize = pnv_phb4_realize;
device_class_set_props(dc, pnv_phb4_properties);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->user_creatable = true;
dc->user_creatable = false;
xfc->notify = pnv_phb4_xive_notify;
}
@ -1864,7 +1808,7 @@ static void pnv_phb4_root_port_class_init(ObjectClass *klass, void *data)
PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
dc->desc = "IBM PHB4 PCIE Root Port";
dc->user_creatable = true;
dc->user_creatable = false;
device_class_set_parent_realize(dc, pnv_phb4_root_port_realize,
&rpc->parent_realize);
@ -1894,7 +1838,7 @@ static void pnv_phb5_root_port_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
dc->desc = "IBM PHB5 PCIE Root Port";
dc->user_creatable = true;
dc->user_creatable = false;
k->vendor_id = PCI_VENDOR_ID_IBM;
k->device_id = PNV_PHB5_DEVICE_ID;