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target/loongarch: Implement vsllwil vextl

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This patch includes:
- VSLLWIL.{H.B/W.H/D.W};
- VSLLWIL.{HU.BU/WU.HU/DU.WU};
- VEXTL.Q.D, VEXTL.QU.DU.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-24-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2023-05-04 20:27:49 +08:00
parent b281d6961d
commit 9b21a7a510
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GPG key ID: 40A2FFF239263EDF
5 changed files with 89 additions and 0 deletions
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9
target/loongarch/insns.decode
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@ -839,3 +839,12 @@ vrotri_b 0111 00101010 00000 01 ... ..... ..... @vv_ui3
vrotri_h 0111 00101010 00000 1 .... ..... ..... @vv_ui4
vrotri_w 0111 00101010 00001 ..... ..... ..... @vv_ui5
vrotri_d 0111 00101010 0001 ...... ..... ..... @vv_ui6
vsllwil_h_b 0111 00110000 10000 01 ... ..... ..... @vv_ui3
vsllwil_w_h 0111 00110000 10000 1 .... ..... ..... @vv_ui4
vsllwil_d_w 0111 00110000 10001 ..... ..... ..... @vv_ui5
vextl_q_d 0111 00110000 10010 00000 ..... ..... @vv
vsllwil_hu_bu 0111 00110000 11000 01 ... ..... ..... @vv_ui3
vsllwil_wu_hu 0111 00110000 11000 1 .... ..... ..... @vv_ui4
vsllwil_du_wu 0111 00110000 11001 ..... ..... ..... @vv_ui5
vextl_qu_du 0111 00110000 11010 00000 ..... ..... @vv