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target/loongarch: Implement vsllwil vextl

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This patch includes:
- VSLLWIL.{H.B/W.H/D.W};
- VSLLWIL.{HU.BU/WU.HU/DU.WU};
- VEXTL.Q.D, VEXTL.QU.DU.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-24-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2023-05-04 20:27:49 +08:00
parent b281d6961d
commit 9b21a7a510
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GPG key ID: 40A2FFF239263EDF
5 changed files with 89 additions and 0 deletions
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9
target/loongarch/disas.c
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@ -1139,3 +1139,12 @@ INSN_LSX(vrotri_b, vv_i)
INSN_LSX(vrotri_h, vv_i)
INSN_LSX(vrotri_w, vv_i)
INSN_LSX(vrotri_d, vv_i)
INSN_LSX(vsllwil_h_b, vv_i)
INSN_LSX(vsllwil_w_h, vv_i)
INSN_LSX(vsllwil_d_w, vv_i)
INSN_LSX(vextl_q_d, vv)
INSN_LSX(vsllwil_hu_bu, vv_i)
INSN_LSX(vsllwil_wu_hu, vv_i)
INSN_LSX(vsllwil_du_wu, vv_i)
INSN_LSX(vextl_qu_du, vv)