motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-07 01:33:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

hw/riscv/riscv-iommu: implement reset protocol

Browse source 
Add a riscv_iommu_reset() helper in the base emulation code that
implements the expected reset behavior as defined by the riscv-iommu
spec.

Devices can then use this helper in their own reset callbacks.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241106133407.604587-7-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2024-11-06 10:34:06 -03:00 • committed by Alistair Francis
parent 01c1caa9d1
commit 9afd26715e
6 changed files with 82 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

20
hw/riscv/riscv-iommu-sys.c
View file

@ -54,6 +54,12 @@ struct RISCVIOMMUStateSys {
uint8_t *msix_pba;
};
struct RISCVIOMMUSysClass {
/*< public >*/
DeviceRealize parent_realize;
ResettablePhases parent_phases;
};
static uint64_t msix_table_mmio_read(void *opaque, hwaddr addr,
unsigned size)
{
@ -212,9 +218,23 @@ static Property riscv_iommu_sys_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static void riscv_iommu_sys_reset_hold(Object *obj, ResetType type)
{
RISCVIOMMUStateSys *sys = RISCV_IOMMU_SYS(obj);
RISCVIOMMUState *iommu = &sys->iommu;
riscv_iommu_reset(iommu);
trace_riscv_iommu_sys_reset_hold(type);
}
static void riscv_iommu_sys_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
rc->phases.hold = riscv_iommu_sys_reset_hold;
dc->realize = riscv_iommu_sys_realize;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
device_class_set_props(dc, riscv_iommu_sys_properties);