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hw/riscv/riscv-iommu: implement reset protocol

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Add a riscv_iommu_reset() helper in the base emulation code that
implements the expected reset behavior as defined by the riscv-iommu
spec.

Devices can then use this helper in their own reset callbacks.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241106133407.604587-7-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2024-11-06 10:34:06 -03:00 • committed by Alistair Francis
parent 01c1caa9d1
commit 9afd26715e
6 changed files with 82 additions and 2 deletions
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20
hw/riscv/riscv-iommu-pci.c
View file

@ -31,6 +31,7 @@
#include "cpu_bits.h"
#include "riscv-iommu.h"
#include "riscv-iommu-bits.h"
#include "trace.h"
/* RISC-V IOMMU PCI Device Emulation */
#define RISCV_PCI_CLASS_SYSTEM_IOMMU 0x0806
@ -66,6 +67,12 @@ typedef struct RISCVIOMMUStatePci {
RISCVIOMMUState iommu; /* common IOMMU state */
} RISCVIOMMUStatePci;
struct RISCVIOMMUPciClass {
/*< public >*/
DeviceRealize parent_realize;
ResettablePhases parent_phases;
};
/* interrupt delivery callback */
static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector)
{
@ -167,10 +174,23 @@ static const Property riscv_iommu_pci_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static void riscv_iommu_pci_reset_hold(Object *obj, ResetType type)
{
RISCVIOMMUStatePci *pci = RISCV_IOMMU_PCI(obj);
RISCVIOMMUState *iommu = &pci->iommu;
riscv_iommu_reset(iommu);
trace_riscv_iommu_pci_reset_hold(type);
}
static void riscv_iommu_pci_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
rc->phases.hold = riscv_iommu_pci_reset_hold;
k->realize = riscv_iommu_pci_realize;
k->exit = riscv_iommu_pci_exit;