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raven: Implement non-contiguous I/O region
Remove now duplicated code from prep board. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
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parent
49a4e21251
commit
9a1839164c
2 changed files with 88 additions and 91 deletions
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@ -54,8 +54,12 @@ typedef struct PRePPCIState {
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qemu_irq irq[PCI_NUM_PINS];
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PCIBus pci_bus;
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AddressSpace pci_io_as;
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MemoryRegion pci_io_non_contiguous;
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MemoryRegion pci_intack;
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RavenPCIState pci_dev;
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int contiguous_map;
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} PREPPCIState;
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#define BIOS_SIZE (1024 * 1024)
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@ -107,6 +111,71 @@ static const MemoryRegionOps PPC_intack_ops = {
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},
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};
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static inline hwaddr raven_io_address(PREPPCIState *s,
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hwaddr addr)
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{
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if (s->contiguous_map == 0) {
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/* 64 KB contiguous space for IOs */
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addr &= 0xFFFF;
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} else {
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/* 8 MB non-contiguous space for IOs */
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addr = (addr & 0x1F) | ((addr & 0x007FFF000) >> 7);
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}
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/* FIXME: handle endianness switch */
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return addr;
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}
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static uint64_t raven_io_read(void *opaque, hwaddr addr,
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unsigned int size)
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{
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PREPPCIState *s = opaque;
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uint8_t buf[4];
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addr = raven_io_address(s, addr);
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address_space_read(&s->pci_io_as, addr, buf, size);
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if (size == 1) {
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return buf[0];
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} else if (size == 2) {
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return lduw_p(buf);
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} else if (size == 4) {
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return ldl_p(buf);
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} else {
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g_assert_not_reached();
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}
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}
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static void raven_io_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned int size)
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{
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PREPPCIState *s = opaque;
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uint8_t buf[4];
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addr = raven_io_address(s, addr);
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if (size == 1) {
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buf[0] = val;
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} else if (size == 2) {
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stw_p(buf, val);
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} else if (size == 4) {
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stl_p(buf, val);
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} else {
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g_assert_not_reached();
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}
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address_space_write(&s->pci_io_as, addr, buf, size);
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}
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static const MemoryRegionOps raven_io_ops = {
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.read = raven_io_read,
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.write = raven_io_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.impl.max_access_size = 4,
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.valid.unaligned = true,
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};
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static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
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{
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return (irq_num + (pci_dev->devfn >> 3)) & 1;
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@ -119,6 +188,13 @@ static void prep_set_irq(void *opaque, int irq_num, int level)
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qemu_set_irq(pic[irq_num] , level);
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}
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static void raven_change_gpio(void *opaque, int n, int level)
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{
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PREPPCIState *s = opaque;
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s->contiguous_map = level;
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}
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static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
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{
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SysBusDevice *dev = SYS_BUS_DEVICE(d);
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@ -133,6 +209,8 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
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sysbus_init_irq(dev, &s->irq[i]);
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}
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qdev_init_gpio_in(d, raven_change_gpio, 1);
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pci_bus_irqs(&s->pci_bus, prep_set_irq, prep_map_irq, s->irq, PCI_NUM_PINS);
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memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_be_ops, s,
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@ -164,6 +242,13 @@ static void raven_pcihost_initfn(Object *obj)
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MemoryRegion *address_space_io = get_system_io();
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DeviceState *pci_dev;
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memory_region_init_io(&s->pci_io_non_contiguous, obj, &raven_io_ops, s,
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"pci-io-non-contiguous", 0x00800000);
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address_space_init(&s->pci_io_as, get_system_io(), "raven-io");
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/* CPU address space */
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memory_region_add_subregion_overlap(address_space_mem, 0x80000000,
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&s->pci_io_non_contiguous, 1);
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pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL,
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address_space_mem, address_space_io, 0, TYPE_PCI_BUS);
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h->bus = &s->pci_bus;
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