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target-arm: Add and use symbolic names for register banks
Add BANK_<cpumode> #defines to index banked registers. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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4 changed files with 56 additions and 39 deletions
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@ -280,30 +280,30 @@ static const Reg regs[] = {
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COREREG(usr_regs.uregs[10], usr_regs[2]),
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COREREG(usr_regs.uregs[11], usr_regs[3]),
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COREREG(usr_regs.uregs[12], usr_regs[4]),
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COREREG(usr_regs.uregs[13], banked_r13[0]),
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COREREG(usr_regs.uregs[14], banked_r14[0]),
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COREREG(usr_regs.uregs[13], banked_r13[BANK_USRSYS]),
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COREREG(usr_regs.uregs[14], banked_r14[BANK_USRSYS]),
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/* R13, R14, SPSR for SVC, ABT, UND, IRQ banks */
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COREREG(svc_regs[0], banked_r13[1]),
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COREREG(svc_regs[1], banked_r14[1]),
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COREREG64(svc_regs[2], banked_spsr[1]),
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COREREG(abt_regs[0], banked_r13[2]),
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COREREG(abt_regs[1], banked_r14[2]),
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COREREG64(abt_regs[2], banked_spsr[2]),
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COREREG(und_regs[0], banked_r13[3]),
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COREREG(und_regs[1], banked_r14[3]),
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COREREG64(und_regs[2], banked_spsr[3]),
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COREREG(irq_regs[0], banked_r13[4]),
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COREREG(irq_regs[1], banked_r14[4]),
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COREREG64(irq_regs[2], banked_spsr[4]),
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COREREG(svc_regs[0], banked_r13[BANK_SVC]),
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COREREG(svc_regs[1], banked_r14[BANK_SVC]),
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COREREG64(svc_regs[2], banked_spsr[BANK_SVC]),
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COREREG(abt_regs[0], banked_r13[BANK_ABT]),
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COREREG(abt_regs[1], banked_r14[BANK_ABT]),
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COREREG64(abt_regs[2], banked_spsr[BANK_ABT]),
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COREREG(und_regs[0], banked_r13[BANK_UND]),
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COREREG(und_regs[1], banked_r14[BANK_UND]),
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COREREG64(und_regs[2], banked_spsr[BANK_UND]),
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COREREG(irq_regs[0], banked_r13[BANK_IRQ]),
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COREREG(irq_regs[1], banked_r14[BANK_IRQ]),
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COREREG64(irq_regs[2], banked_spsr[BANK_IRQ]),
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/* R8_fiq .. R14_fiq and SPSR_fiq */
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COREREG(fiq_regs[0], fiq_regs[0]),
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COREREG(fiq_regs[1], fiq_regs[1]),
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COREREG(fiq_regs[2], fiq_regs[2]),
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COREREG(fiq_regs[3], fiq_regs[3]),
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COREREG(fiq_regs[4], fiq_regs[4]),
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COREREG(fiq_regs[5], banked_r13[5]),
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COREREG(fiq_regs[6], banked_r14[5]),
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COREREG64(fiq_regs[7], banked_spsr[5]),
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COREREG(fiq_regs[5], banked_r13[BANK_FIQ]),
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COREREG(fiq_regs[6], banked_r14[BANK_FIQ]),
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COREREG64(fiq_regs[7], banked_spsr[BANK_FIQ]),
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/* R15 */
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COREREG(usr_regs.uregs[15], regs[15]),
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/* VFP system registers */
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