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hw/intc/loongson_ipi: Add more input parameter for cpu_by_arch_id
Add logic cpu index input parameter for function cpu_by_arch_id, CPUState::cpu_index is logic cpu slot index for possible_cpus. At the same time it is logic index with LoongsonIPICommonState::IPICore, here hide access for CPUState::cpu_index directly, it comes from function cpu_by_arch_id(). Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
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parent
1b3aa34704
commit
999b112d90
4 changed files with 51 additions and 15 deletions
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@ -103,16 +103,17 @@ static MemTxResult mail_send(LoongsonIPICommonState *ipi,
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uint32_t cpuid;
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hwaddr addr;
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CPUState *cs;
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int cpu, ret;
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cpuid = extract32(val, 16, 10);
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cs = licc->cpu_by_arch_id(cpuid);
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if (cs == NULL) {
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ret = licc->cpu_by_arch_id(ipi, cpuid, &cpu, &cs);
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if (ret != MEMTX_OK) {
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return MEMTX_DECODE_ERROR;
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}
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/* override requester_id */
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addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c);
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attrs.requester_id = cs->cpu_index;
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attrs.requester_id = cpu;
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return send_ipi_data(ipi, cs, val, addr, attrs);
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}
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@ -123,16 +124,17 @@ static MemTxResult any_send(LoongsonIPICommonState *ipi,
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uint32_t cpuid;
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hwaddr addr;
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CPUState *cs;
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int cpu, ret;
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cpuid = extract32(val, 16, 10);
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cs = licc->cpu_by_arch_id(cpuid);
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if (cs == NULL) {
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ret = licc->cpu_by_arch_id(ipi, cpuid, &cpu, &cs);
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if (ret != MEMTX_OK) {
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return MEMTX_DECODE_ERROR;
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}
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/* override requester_id */
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addr = val & 0xffff;
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attrs.requester_id = cs->cpu_index;
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attrs.requester_id = cpu;
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return send_ipi_data(ipi, cs, val, addr, attrs);
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}
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@ -146,6 +148,7 @@ MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val,
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uint32_t cpuid;
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uint8_t vector;
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CPUState *cs;
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int cpu, ret;
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addr &= 0xff;
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trace_loongson_ipi_write(size, (uint64_t)addr, val);
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@ -176,11 +179,11 @@ MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val,
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cpuid = extract32(val, 16, 10);
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/* IPI status vector */
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vector = extract8(val, 0, 5);
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cs = licc->cpu_by_arch_id(cpuid);
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if (cs == NULL || cs->cpu_index >= ipi->num_cpu) {
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ret = licc->cpu_by_arch_id(ipi, cpuid, &cpu, &cs);
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if (ret != MEMTX_OK || cpu >= ipi->num_cpu) {
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return MEMTX_DECODE_ERROR;
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}
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loongson_ipi_core_writel(&ipi->cpu[cs->cpu_index], CORE_SET_OFF,
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loongson_ipi_core_writel(&ipi->cpu[cpu], CORE_SET_OFF,
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BIT(vector), 4, attrs);
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break;
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default:
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