mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-06 17:23:56 -06:00
ide: rename cmd_write to ctrl_write
It's the Control register, part of the Control block -- Command is misleading here. Rename all related functions and constants. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
This commit is contained in:
parent
1d1c4bdb73
commit
98d9891223
7 changed files with 24 additions and 23 deletions
12
hw/ide/pci.c
12
hw/ide/pci.c
|
@ -38,7 +38,7 @@
|
|||
(IDE_RETRY_DMA | IDE_RETRY_PIO | \
|
||||
IDE_RETRY_READ | IDE_RETRY_FLUSH)
|
||||
|
||||
static uint64_t pci_ide_cmd_read(void *opaque, hwaddr addr, unsigned size)
|
||||
static uint64_t pci_ide_status_read(void *opaque, hwaddr addr, unsigned size)
|
||||
{
|
||||
IDEBus *bus = opaque;
|
||||
|
||||
|
@ -48,20 +48,20 @@ static uint64_t pci_ide_cmd_read(void *opaque, hwaddr addr, unsigned size)
|
|||
return ide_status_read(bus, addr + 2);
|
||||
}
|
||||
|
||||
static void pci_ide_cmd_write(void *opaque, hwaddr addr,
|
||||
uint64_t data, unsigned size)
|
||||
static void pci_ide_ctrl_write(void *opaque, hwaddr addr,
|
||||
uint64_t data, unsigned size)
|
||||
{
|
||||
IDEBus *bus = opaque;
|
||||
|
||||
if (addr != 2 || size != 1) {
|
||||
return;
|
||||
}
|
||||
ide_cmd_write(bus, addr + 2, data);
|
||||
ide_ctrl_write(bus, addr + 2, data);
|
||||
}
|
||||
|
||||
const MemoryRegionOps pci_ide_cmd_le_ops = {
|
||||
.read = pci_ide_cmd_read,
|
||||
.write = pci_ide_cmd_write,
|
||||
.read = pci_ide_status_read,
|
||||
.write = pci_ide_ctrl_write,
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue