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ARMv7-M reset fixes
Move ARMv7-M PC/SP initialization to the CPU reset routine. Add a board reset routine to call this. Also load values directly from ROM as images have not been copied yet. Avoid clearing the NVIC pointer on cpu reset. Signed-off-by: Paul Brook <paul@codesourcery.com>
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parent
116348def2
commit
983fe82611
3 changed files with 33 additions and 24 deletions
22
hw/armv7m.c
22
hw/armv7m.c
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@ -151,6 +151,12 @@ static void armv7m_bitband_init(void)
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}
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/* Board init. */
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static void armv7m_reset(void *opaque)
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{
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cpu_reset((CPUState *)opaque);
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}
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/* Init CPU and memory for a v7-M based board.
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flash_size and sram_size are in kb.
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Returns the NVIC array. */
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@ -163,7 +169,6 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
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/* FIXME: make this local state. */
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static qemu_irq pic[64];
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qemu_irq *cpu_pic;
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uint32_t pc;
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int image_size;
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uint64_t entry;
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uint64_t lowaddr;
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@ -201,7 +206,7 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
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armv7m_bitband_init();
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nvic = qdev_create(NULL, "armv7m_nvic");
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env->v7m.nvic = nvic;
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env->nvic = nvic;
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qdev_init_nofail(nvic);
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cpu_pic = arm_pic_init_cpu(env);
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sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
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@ -227,24 +232,13 @@ qemu_irq *armv7m_init(int flash_size, int sram_size,
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exit(1);
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}
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/* If the image was loaded at address zero then assume it is a
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regular ROM image and perform the normal CPU reset sequence.
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Otherwise jump directly to the entry point. */
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if (lowaddr == 0) {
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env->regs[13] = ldl_phys(0);
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pc = ldl_phys(4);
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} else {
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pc = entry;
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}
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env->thumb = pc & 1;
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env->regs[15] = pc & ~1;
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/* Hack to map an additional page of ram at the top of the address
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space. This stops qemu complaining about executing code outside RAM
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when returning from an exception. */
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cpu_register_physical_memory(0xfffff000, 0x1000,
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qemu_ram_alloc(0x1000) | IO_MEM_RAM);
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qemu_register_reset(armv7m_reset, env);
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return pic;
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}
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