mirror of
https://github.com/Motorhead1991/qemu.git
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* Move qtests into a separate directory
* Build index.html for docs -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAl4bAUURHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbUSQQ/+MU9vOoDrctISyxN8YQ1a0YdYKmuXKHyT YI/z/CV3xFnTw3sIHzXWXg/MzwgpTUXOZn5TG0P46qeNBPC416FrKoi+4J91VWud 80si37fwmXiEMB67yK4KqkZzEeffoei4EWC8fWHU//KEaEYiLxNLjvPGSV5+Gjw7 6gh4QcGecRectBCb2BqPwr8Qp7B5k+tPCpWsWff+eFZSbHYe6+g00x6wOTOLTd1h MccEoyq1LrZshSO6iThISgIUpLyMyCy9KMJXIb7mztxCGLDffLVnJFhmH5Yn6I6e 7SVHoa7cKjHMN1DC9p+5+cjqo5VZg7iPy346zPEPitdUw1e0tnYNyqZDh5d8xoUR WlGpc4USuHbysznbpkaFaMABkKyXPddVQUUtIgHcfav2UVAUH2KmZ38POnY+W9wL S1Yv9yhUFT0aPvj8QsSRBaQXfcn73CFlJV7XsOd7opFH/M5kWVtOzVpzSINLqlQC BJOW1ePyhJ8LqKdTRtSe5BHM8RtwDRukDGpGmJjKJeCvv6uE2wrcjZcwbTxghatj AFelcSlTdIJZBSc7+rWm/Y5nm857erXs5rt2bLjJBa1/gWg19yAj8aY08zzael3T juyvNH/Au79sCmOznGvX4TrltpnhU4kdLKYZ3zpDpbmc4l33kaOz+3xn9NdMnWA2 zb9nSBePXkI= =CchM -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-01-12' into staging * Move qtests into a separate directory * Build index.html for docs # gpg: Signature made Sun 12 Jan 2020 11:21:41 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-01-12: docs: build an index page for the HTML docs tests/libqos: Move the libqos files under tests/qtest/ tests/Makefile: Move qtest-related settings to a separate Makefile.include test: Move qtests to a separate directory tests/Makefile: Separate unit test dependencies from qtest dependencies tests/Makefile: Remove 'tests/' and '$(EXESUF)' from the check-qtest variables tests/ptimer: Remove unnecessary inclusion of libqtest.h tests/Makefile: test-char does not need libqtest Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
981c9b88e6
183 changed files with 413 additions and 388 deletions
318
tests/qtest/Makefile.include
Normal file
318
tests/qtest/Makefile.include
Normal file
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@ -0,0 +1,318 @@
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# All QTests for now are POSIX-only, but the dependencies are
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# really in libqtest, not in the testcases themselves.
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||||
check-qtest-generic-y += cdrom-test
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check-qtest-generic-y += device-introspect-test
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||||
check-qtest-generic-y += machine-none-test
|
||||
check-qtest-generic-y += qmp-test
|
||||
check-qtest-generic-y += qmp-cmd-test
|
||||
check-qtest-generic-y += qom-test
|
||||
check-qtest-generic-$(CONFIG_MODULES) += modules-test
|
||||
check-qtest-generic-y += test-hmp
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||||
|
||||
check-qtest-pci-$(CONFIG_RTL8139_PCI) += rtl8139-test
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||||
check-qtest-pci-$(CONFIG_VGA) += display-vga-test
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||||
check-qtest-pci-$(CONFIG_HDA) += intel-hda-test
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||||
check-qtest-pci-$(CONFIG_IVSHMEM_DEVICE) += ivshmem-test
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DBUS_DAEMON := $(shell which dbus-daemon 2>/dev/null)
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ifneq ($(GDBUS_CODEGEN),)
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ifneq ($(DBUS_DAEMON),)
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check-qtest-pci-$(CONFIG_GIO) += dbus-vmstate-test
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endif
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endif
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check-qtest-i386-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-i386-y += fdc-test
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check-qtest-i386-y += ide-test
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check-qtest-i386-$(CONFIG_TOOLS) += ahci-test
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check-qtest-i386-y += hd-geo-test
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check-qtest-i386-y += boot-order-test
|
||||
check-qtest-i386-y += bios-tables-test
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||||
check-qtest-i386-$(CONFIG_SGA) += boot-serial-test
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check-qtest-i386-$(CONFIG_SLIRP) += pxe-test
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check-qtest-i386-y += rtc-test
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check-qtest-i386-$(CONFIG_ISA_IPMI_KCS) += ipmi-kcs-test
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ifdef CONFIG_LINUX
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check-qtest-i386-$(CONFIG_ISA_IPMI_BT) += ipmi-bt-test
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endif
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check-qtest-i386-y += i440fx-test
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check-qtest-i386-y += fw_cfg-test
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check-qtest-i386-y += device-plug-test
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check-qtest-i386-y += drive_del-test
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check-qtest-i386-$(CONFIG_WDT_IB700) += wdt_ib700-test
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check-qtest-i386-y += tco-test
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check-qtest-i386-y += $(check-qtest-pci-y)
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check-qtest-i386-$(CONFIG_PVPANIC) += pvpanic-test
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check-qtest-i386-$(CONFIG_I82801B11) += i82801b11-test
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check-qtest-i386-$(CONFIG_IOH3420) += ioh3420-test
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check-qtest-i386-$(CONFIG_USB_UHCI) += usb-hcd-uhci-test
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check-qtest-i386-$(call land,$(CONFIG_USB_EHCI),$(CONFIG_USB_UHCI)) += usb-hcd-ehci-test
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check-qtest-i386-$(CONFIG_USB_XHCI_NEC) += usb-hcd-xhci-test
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check-qtest-i386-y += cpu-plug-test
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check-qtest-i386-y += q35-test
|
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check-qtest-i386-y += vmgenid-test
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check-qtest-i386-$(CONFIG_TPM_CRB) += tpm-crb-swtpm-test
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check-qtest-i386-$(CONFIG_TPM_CRB) += tpm-crb-test
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check-qtest-i386-$(CONFIG_TPM_TIS) += tpm-tis-swtpm-test
|
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check-qtest-i386-$(CONFIG_TPM_TIS) += tpm-tis-test
|
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check-qtest-i386-$(CONFIG_SLIRP) += test-netfilter
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check-qtest-i386-$(CONFIG_POSIX) += test-filter-mirror
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check-qtest-i386-$(CONFIG_RTL8139_PCI) += test-filter-redirector
|
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check-qtest-i386-y += migration-test
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check-qtest-i386-y += test-x86-cpuid-compat
|
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check-qtest-i386-y += numa-test
|
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|
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check-qtest-x86_64-y += $(check-qtest-i386-y)
|
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|
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check-qtest-alpha-y += boot-serial-test
|
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check-qtest-alpha-$(CONFIG_VGA) += display-vga-test
|
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|
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check-qtest-hppa-y += boot-serial-test
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check-qtest-hppa-$(CONFIG_VGA) += display-vga-test
|
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|
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check-qtest-m68k-y = boot-serial-test
|
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|
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check-qtest-microblaze-y += boot-serial-test
|
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|
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check-qtest-mips-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-mips-$(CONFIG_VGA) += display-vga-test
|
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|
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check-qtest-mips64-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-mips64-$(CONFIG_VGA) += display-vga-test
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check-qtest-mips64el-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-mips64el-$(CONFIG_VGA) += display-vga-test
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|
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check-qtest-moxie-y += boot-serial-test
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check-qtest-ppc-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-ppc-y += boot-order-test
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check-qtest-ppc-y += prom-env-test
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check-qtest-ppc-y += drive_del-test
|
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check-qtest-ppc-y += boot-serial-test
|
||||
check-qtest-ppc-$(CONFIG_M48T59) += m48t59-test
|
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|
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check-qtest-ppc64-y += $(check-qtest-ppc-y)
|
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check-qtest-ppc64-$(CONFIG_PSERIES) += device-plug-test
|
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check-qtest-ppc64-$(CONFIG_POWERNV) += pnv-xscom-test
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check-qtest-ppc64-y += migration-test
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check-qtest-ppc64-$(CONFIG_PSERIES) += rtas-test
|
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check-qtest-ppc64-$(CONFIG_SLIRP) += pxe-test
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check-qtest-ppc64-$(CONFIG_USB_UHCI) += usb-hcd-uhci-test
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check-qtest-ppc64-$(CONFIG_USB_XHCI_NEC) += usb-hcd-xhci-test
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check-qtest-ppc64-$(CONFIG_SLIRP) += test-netfilter
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check-qtest-ppc64-$(CONFIG_POSIX) += test-filter-mirror
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check-qtest-ppc64-$(CONFIG_RTL8139_PCI) += test-filter-redirector
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check-qtest-ppc64-$(CONFIG_VGA) += display-vga-test
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check-qtest-ppc64-y += numa-test
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check-qtest-ppc64-$(CONFIG_IVSHMEM_DEVICE) += ivshmem-test
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check-qtest-ppc64-y += cpu-plug-test
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check-qtest-sh4-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-sh4eb-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-sparc-y += prom-env-test
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check-qtest-sparc-y += m48t59-test
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check-qtest-sparc-y += boot-serial-test
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check-qtest-sparc64-$(CONFIG_ISA_TESTDEV) = endianness-test
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check-qtest-sparc64-y += prom-env-test
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check-qtest-sparc64-y += boot-serial-test
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|
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check-qtest-arm-y += arm-cpu-features
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check-qtest-arm-y += microbit-test
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check-qtest-arm-y += m25p80-test
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||||
check-qtest-arm-y += test-arm-mptimer
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||||
check-qtest-arm-y += boot-serial-test
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check-qtest-arm-y += hexloader-test
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check-qtest-arm-$(CONFIG_PFLASH_CFI02) += pflash-cfi02-test
|
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|
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check-qtest-aarch64-y += arm-cpu-features
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check-qtest-aarch64-y += numa-test
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check-qtest-aarch64-y += boot-serial-test
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check-qtest-aarch64-y += migration-test
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||||
|
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# TODO: once aarch64 TCG is fixed on ARM 32 bit host, make test unconditional
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ifneq ($(ARCH),arm)
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check-qtest-aarch64-y += bios-tables-test
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endif
|
||||
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check-qtest-microblazeel-y += $(check-qtest-microblaze-y)
|
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|
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check-qtest-xtensaeb-y += $(check-qtest-xtensa-y)
|
||||
|
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check-qtest-s390x-y = boot-serial-test
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check-qtest-s390x-$(CONFIG_SLIRP) += pxe-test
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check-qtest-s390x-$(CONFIG_SLIRP) += test-netfilter
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check-qtest-s390x-$(CONFIG_POSIX) += test-filter-mirror
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check-qtest-s390x-$(CONFIG_POSIX) += test-filter-redirector
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check-qtest-s390x-y += drive_del-test
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check-qtest-s390x-y += device-plug-test
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check-qtest-s390x-y += virtio-ccw-test
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check-qtest-s390x-y += cpu-plug-test
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check-qtest-s390x-y += migration-test
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# libqos / qgraph :
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libqgraph-obj-y = tests/qtest/libqos/qgraph.o
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libqos-obj-y = $(libqgraph-obj-y) tests/qtest/libqos/pci.o tests/qtest/libqos/fw_cfg.o
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libqos-obj-y += tests/qtest/libqos/malloc.o
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libqos-obj-y += tests/qtest/libqos/libqos.o
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libqos-spapr-obj-y = $(libqos-obj-y) tests/qtest/libqos/malloc-spapr.o
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libqos-spapr-obj-y += tests/qtest/libqos/libqos-spapr.o
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libqos-spapr-obj-y += tests/qtest/libqos/rtas.o
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libqos-spapr-obj-y += tests/qtest/libqos/pci-spapr.o
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libqos-pc-obj-y = $(libqos-obj-y) tests/qtest/libqos/pci-pc.o
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libqos-pc-obj-y += tests/qtest/libqos/malloc-pc.o tests/qtest/libqos/libqos-pc.o
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libqos-pc-obj-y += tests/qtest/libqos/ahci.o
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libqos-usb-obj-y = $(libqos-spapr-obj-y) $(libqos-pc-obj-y) tests/qtest/libqos/usb.o
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# qos devices:
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qos-test-obj-y = tests/qtest/qos-test.o $(libqgraph-obj-y)
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qos-test-obj-y += $(libqos-pc-obj-y) $(libqos-spapr-obj-y)
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qos-test-obj-y += tests/qtest/libqos/e1000e.o
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qos-test-obj-y += tests/qtest/libqos/i2c.o
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qos-test-obj-y += tests/qtest/libqos/i2c-imx.o
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qos-test-obj-y += tests/qtest/libqos/i2c-omap.o
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qos-test-obj-y += tests/qtest/libqos/sdhci.o
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qos-test-obj-y += tests/qtest/libqos/tpci200.o
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qos-test-obj-y += tests/qtest/libqos/virtio.o
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qos-test-obj-$(CONFIG_VIRTFS) += tests/qtest/libqos/virtio-9p.o
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qos-test-obj-y += tests/qtest/libqos/virtio-balloon.o
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qos-test-obj-y += tests/qtest/libqos/virtio-blk.o
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qos-test-obj-y += tests/qtest/libqos/virtio-mmio.o
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qos-test-obj-y += tests/qtest/libqos/virtio-net.o
|
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qos-test-obj-y += tests/qtest/libqos/virtio-pci.o
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qos-test-obj-y += tests/qtest/libqos/virtio-pci-modern.o
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qos-test-obj-y += tests/qtest/libqos/virtio-rng.o
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qos-test-obj-y += tests/qtest/libqos/virtio-scsi.o
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qos-test-obj-y += tests/qtest/libqos/virtio-serial.o
|
||||
|
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# qos machines:
|
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qos-test-obj-y += tests/qtest/libqos/aarch64-xlnx-zcu102-machine.o
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||||
qos-test-obj-y += tests/qtest/libqos/arm-imx25-pdk-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/arm-n800-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/arm-raspi2-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/arm-sabrelite-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/arm-smdkc210-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/arm-virt-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/arm-xilinx-zynq-a9-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/ppc64_pseries-machine.o
|
||||
qos-test-obj-y += tests/qtest/libqos/x86_64_pc-machine.o
|
||||
|
||||
# qos tests:
|
||||
qos-test-obj-y += tests/qtest/ac97-test.o
|
||||
qos-test-obj-y += tests/qtest/ds1338-test.o
|
||||
qos-test-obj-y += tests/qtest/e1000-test.o
|
||||
qos-test-obj-y += tests/qtest/e1000e-test.o
|
||||
qos-test-obj-y += tests/qtest/eepro100-test.o
|
||||
qos-test-obj-y += tests/qtest/es1370-test.o
|
||||
qos-test-obj-y += tests/qtest/ipoctal232-test.o
|
||||
qos-test-obj-y += tests/qtest/megasas-test.o
|
||||
qos-test-obj-y += tests/qtest/ne2000-test.o
|
||||
qos-test-obj-y += tests/qtest/nvme-test.o
|
||||
qos-test-obj-y += tests/qtest/pca9552-test.o
|
||||
qos-test-obj-y += tests/qtest/pci-test.o
|
||||
qos-test-obj-y += tests/qtest/pcnet-test.o
|
||||
qos-test-obj-y += tests/qtest/sdhci-test.o
|
||||
qos-test-obj-y += tests/qtest/spapr-phb-test.o
|
||||
qos-test-obj-y += tests/qtest/tmp105-test.o
|
||||
qos-test-obj-y += tests/qtest/usb-hcd-ohci-test.o $(libqos-usb-obj-y)
|
||||
qos-test-obj-$(CONFIG_VHOST_NET_USER) += tests/qtest/vhost-user-test.o $(chardev-obj-y) $(test-io-obj-y)
|
||||
qos-test-obj-y += tests/qtest/virtio-test.o
|
||||
qos-test-obj-$(CONFIG_VIRTFS) += tests/qtest/virtio-9p-test.o
|
||||
qos-test-obj-y += tests/qtest/virtio-blk-test.o
|
||||
qos-test-obj-y += tests/qtest/virtio-net-test.o
|
||||
qos-test-obj-y += tests/qtest/virtio-rng-test.o
|
||||
qos-test-obj-y += tests/qtest/virtio-scsi-test.o
|
||||
qos-test-obj-y += tests/qtest/virtio-serial-test.o
|
||||
qos-test-obj-y += tests/qtest/vmxnet3-test.o
|
||||
|
||||
check-unit-y += tests/test-qgraph$(EXESUF)
|
||||
tests/test-qgraph$(EXESUF): tests/test-qgraph.o $(libqgraph-obj-y)
|
||||
|
||||
check-qtest-generic-y += qos-test
|
||||
tests/qtest/qos-test$(EXESUF): $(qos-test-obj-y)
|
||||
|
||||
# QTest dependencies:
|
||||
tests/qtest/qmp-test$(EXESUF): tests/qtest/qmp-test.o
|
||||
tests/qtest/qmp-cmd-test$(EXESUF): tests/qtest/qmp-cmd-test.o
|
||||
tests/qtest/device-introspect-test$(EXESUF): tests/qtest/device-introspect-test.o
|
||||
tests/qtest/rtc-test$(EXESUF): tests/qtest/rtc-test.o
|
||||
tests/qtest/m48t59-test$(EXESUF): tests/qtest/m48t59-test.o
|
||||
tests/qtest/hexloader-test$(EXESUF): tests/qtest/hexloader-test.o
|
||||
tests/qtest/pflash-cfi02$(EXESUF): tests/qtest/pflash-cfi02-test.o
|
||||
tests/qtest/endianness-test$(EXESUF): tests/qtest/endianness-test.o
|
||||
tests/qtest/prom-env-test$(EXESUF): tests/qtest/prom-env-test.o $(libqos-obj-y)
|
||||
tests/qtest/rtas-test$(EXESUF): tests/qtest/rtas-test.o $(libqos-spapr-obj-y)
|
||||
tests/qtest/fdc-test$(EXESUF): tests/qtest/fdc-test.o
|
||||
tests/qtest/ide-test$(EXESUF): tests/qtest/ide-test.o $(libqos-pc-obj-y)
|
||||
tests/qtest/ahci-test$(EXESUF): tests/qtest/ahci-test.o $(libqos-pc-obj-y) qemu-img$(EXESUF)
|
||||
tests/qtest/ipmi-kcs-test$(EXESUF): tests/qtest/ipmi-kcs-test.o
|
||||
tests/qtest/ipmi-bt-test$(EXESUF): tests/qtest/ipmi-bt-test.o
|
||||
tests/qtest/hd-geo-test$(EXESUF): tests/qtest/hd-geo-test.o $(libqos-obj-y)
|
||||
tests/qtest/boot-order-test$(EXESUF): tests/qtest/boot-order-test.o $(libqos-obj-y)
|
||||
tests/qtest/boot-serial-test$(EXESUF): tests/qtest/boot-serial-test.o $(libqos-obj-y)
|
||||
tests/qtest/bios-tables-test$(EXESUF): tests/qtest/bios-tables-test.o \
|
||||
tests/qtest/boot-sector.o tests/qtest/acpi-utils.o $(libqos-obj-y)
|
||||
tests/qtest/pxe-test$(EXESUF): tests/qtest/pxe-test.o tests/qtest/boot-sector.o $(libqos-obj-y)
|
||||
tests/qtest/microbit-test$(EXESUF): tests/qtest/microbit-test.o
|
||||
tests/qtest/m25p80-test$(EXESUF): tests/qtest/m25p80-test.o
|
||||
tests/qtest/i440fx-test$(EXESUF): tests/qtest/i440fx-test.o $(libqos-pc-obj-y)
|
||||
tests/qtest/q35-test$(EXESUF): tests/qtest/q35-test.o $(libqos-pc-obj-y)
|
||||
tests/qtest/fw_cfg-test$(EXESUF): tests/qtest/fw_cfg-test.o $(libqos-pc-obj-y)
|
||||
tests/qtest/rtl8139-test$(EXESUF): tests/qtest/rtl8139-test.o $(libqos-pc-obj-y)
|
||||
tests/qtest/pnv-xscom-test$(EXESUF): tests/qtest/pnv-xscom-test.o
|
||||
tests/qtest/wdt_ib700-test$(EXESUF): tests/qtest/wdt_ib700-test.o
|
||||
tests/qtest/tco-test$(EXESUF): tests/qtest/tco-test.o $(libqos-pc-obj-y)
|
||||
tests/qtest/virtio-ccw-test$(EXESUF): tests/qtest/virtio-ccw-test.o
|
||||
tests/qtest/display-vga-test$(EXESUF): tests/qtest/display-vga-test.o
|
||||
tests/qtest/qom-test$(EXESUF): tests/qtest/qom-test.o
|
||||
tests/qtest/test-hmp$(EXESUF): tests/qtest/test-hmp.o
|
||||
tests/qtest/machine-none-test$(EXESUF): tests/qtest/machine-none-test.o
|
||||
tests/qtest/device-plug-test$(EXESUF): tests/qtest/device-plug-test.o
|
||||
tests/qtest/drive_del-test$(EXESUF): tests/qtest/drive_del-test.o
|
||||
tests/qtest/pvpanic-test$(EXESUF): tests/qtest/pvpanic-test.o
|
||||
tests/qtest/i82801b11-test$(EXESUF): tests/qtest/i82801b11-test.o
|
||||
tests/qtest/intel-hda-test$(EXESUF): tests/qtest/intel-hda-test.o
|
||||
tests/qtest/ioh3420-test$(EXESUF): tests/qtest/ioh3420-test.o
|
||||
tests/qtest/usb-hcd-uhci-test$(EXESUF): tests/qtest/usb-hcd-uhci-test.o $(libqos-usb-obj-y)
|
||||
tests/qtest/usb-hcd-ehci-test$(EXESUF): tests/qtest/usb-hcd-ehci-test.o $(libqos-usb-obj-y)
|
||||
tests/qtest/usb-hcd-xhci-test$(EXESUF): tests/qtest/usb-hcd-xhci-test.o $(libqos-usb-obj-y)
|
||||
tests/qtest/cpu-plug-test$(EXESUF): tests/qtest/cpu-plug-test.o
|
||||
tests/qtest/migration-test$(EXESUF): tests/qtest/migration-test.o tests/qtest/migration-helpers.o
|
||||
tests/qtest/qemu-iotests/qtest/socket_scm_helper$(EXESUF): tests/qtest/qemu-iotests/qtest/socket_scm_helper.o
|
||||
tests/qtest/test-netfilter$(EXESUF): tests/qtest/test-netfilter.o $(qtest-obj-y)
|
||||
tests/qtest/test-filter-mirror$(EXESUF): tests/qtest/test-filter-mirror.o $(qtest-obj-y)
|
||||
tests/qtest/test-filter-redirector$(EXESUF): tests/qtest/test-filter-redirector.o $(qtest-obj-y)
|
||||
tests/qtest/test-x86-cpuid-compat$(EXESUF): tests/qtest/test-x86-cpuid-compat.o $(qtest-obj-y)
|
||||
tests/qtest/ivshmem-test$(EXESUF): tests/qtest/ivshmem-test.o contrib/ivshmem-server/ivshmem-server.o $(libqos-pc-obj-y) $(libqos-spapr-obj-y)
|
||||
tests/qtest/dbus-vmstate-test$(EXESUF): tests/qtest/dbus-vmstate-test.o tests/qtest/migration-helpers.o tests/qtest/dbus-vmstate1.o $(libqos-pc-obj-y) $(libqos-spapr-obj-y)
|
||||
tests/qtest/vhost-user-bridge$(EXESUF): tests/qtest/vhost-user-bridge.o $(test-util-obj-y) libvhost-user.a
|
||||
tests/qtest/test-arm-mptimer$(EXESUF): tests/qtest/test-arm-mptimer.o
|
||||
tests/qtest/numa-test$(EXESUF): tests/qtest/numa-test.o
|
||||
tests/qtest/vmgenid-test$(EXESUF): tests/qtest/vmgenid-test.o tests/qtest/boot-sector.o tests/qtest/acpi-utils.o
|
||||
tests/qtest/cdrom-test$(EXESUF): tests/qtest/cdrom-test.o tests/qtest/boot-sector.o $(libqos-obj-y)
|
||||
tests/qtest/arm-cpu-features$(EXESUF): tests/qtest/arm-cpu-features.o
|
||||
tests/qtest/tpm-crb-swtpm-test$(EXESUF): tests/qtest/tpm-crb-swtpm-test.o tests/qtest/tpm-emu.o \
|
||||
tests/qtest/tpm-util.o tests/qtest/tpm-tests.o $(test-io-obj-y)
|
||||
tests/qtest/tpm-crb-test$(EXESUF): tests/qtest/tpm-crb-test.o tests/qtest/tpm-emu.o $(test-io-obj-y)
|
||||
tests/qtest/tpm-tis-swtpm-test$(EXESUF): tests/qtest/tpm-tis-swtpm-test.o tests/qtest/tpm-emu.o \
|
||||
tests/qtest/tpm-util.o tests/qtest/tpm-tests.o $(test-io-obj-y)
|
||||
tests/qtest/tpm-tis-test$(EXESUF): tests/qtest/tpm-tis-test.o tests/qtest/tpm-emu.o $(test-io-obj-y)
|
||||
|
||||
# QTest rules
|
||||
|
||||
TARGETS=$(patsubst %-softmmu,%, $(filter %-softmmu,$(TARGET_DIRS)))
|
||||
ifeq ($(CONFIG_POSIX),y)
|
||||
QTEST_TARGETS = $(TARGETS)
|
||||
check-qtest-y=$(foreach TARGET,$(TARGETS), $(check-qtest-$(TARGET)-y:%=tests/qtest/%$(EXESUF)))
|
||||
check-qtest-y += $(check-qtest-generic-y:%=tests/qtest/%$(EXESUF))
|
||||
else
|
||||
QTEST_TARGETS =
|
||||
endif
|
||||
|
||||
qtest-obj-y = tests/qtest/libqtest.o $(test-util-obj-y)
|
||||
$(check-qtest-y): $(qtest-obj-y)
|
||||
57
tests/qtest/ac97-test.c
Normal file
57
tests/qtest/ac97-test.c
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* QTest testcase for AC97
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/pci.h"
|
||||
|
||||
typedef struct QAC97 QAC97;
|
||||
|
||||
struct QAC97 {
|
||||
QOSGraphObject obj;
|
||||
QPCIDevice dev;
|
||||
};
|
||||
|
||||
static void *ac97_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QAC97 *ac97 = obj;
|
||||
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return &ac97->dev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in e1000e\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *ac97_create(void *pci_bus, QGuestAllocator *alloc, void *addr)
|
||||
{
|
||||
QAC97 *ac97 = g_new0(QAC97, 1);
|
||||
QPCIBus *bus = pci_bus;
|
||||
|
||||
qpci_device_init(&ac97->dev, bus, addr);
|
||||
ac97->obj.get_driver = ac97_get_driver;
|
||||
return &ac97->obj;
|
||||
}
|
||||
|
||||
static void ac97_register_nodes(void)
|
||||
{
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "addr=04.0",
|
||||
};
|
||||
add_qpci_address(&opts, &(QPCIAddress) { .devfn = QPCI_DEVFN(4, 0) });
|
||||
|
||||
qos_node_create_driver("AC97", ac97_create);
|
||||
qos_node_produces("AC97", "pci-device");
|
||||
qos_node_consumes("AC97", "pci-bus", &opts);
|
||||
}
|
||||
|
||||
libqos_init(ac97_register_nodes);
|
||||
147
tests/qtest/acpi-utils.c
Normal file
147
tests/qtest/acpi-utils.c
Normal file
|
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* ACPI Utility Functions
|
||||
*
|
||||
* Copyright (c) 2013 Red Hat Inc.
|
||||
* Copyright (c) 2017 Skyport Systems
|
||||
*
|
||||
* Authors:
|
||||
* Michael S. Tsirkin <mst@redhat.com>,
|
||||
* Ben Warren <ben@skyportsystems.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include <glib/gstdio.h>
|
||||
#include "qemu-common.h"
|
||||
#include "qemu/bitmap.h"
|
||||
#include "acpi-utils.h"
|
||||
#include "boot-sector.h"
|
||||
|
||||
uint8_t acpi_calc_checksum(const uint8_t *data, int len)
|
||||
{
|
||||
int i;
|
||||
uint8_t sum = 0;
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
sum += data[i];
|
||||
}
|
||||
|
||||
return sum;
|
||||
}
|
||||
|
||||
uint32_t acpi_find_rsdp_address(QTestState *qts)
|
||||
{
|
||||
uint32_t off;
|
||||
|
||||
/* RSDP location can vary across a narrow range */
|
||||
for (off = 0xf0000; off < 0x100000; off += 0x10) {
|
||||
uint8_t sig[] = "RSD PTR ";
|
||||
int i;
|
||||
|
||||
for (i = 0; i < sizeof sig - 1; ++i) {
|
||||
sig[i] = qtest_readb(qts, off + i);
|
||||
}
|
||||
|
||||
if (!memcmp(sig, "RSD PTR ", sizeof sig)) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return off;
|
||||
}
|
||||
|
||||
void acpi_fetch_rsdp_table(QTestState *qts, uint64_t addr, uint8_t *rsdp_table)
|
||||
{
|
||||
uint8_t revision;
|
||||
|
||||
/* Read mandatory revision 0 table data (20 bytes) first */
|
||||
qtest_memread(qts, addr, rsdp_table, 20);
|
||||
revision = rsdp_table[15 /* Revision offset */];
|
||||
|
||||
switch (revision) {
|
||||
case 0: /* ACPI 1.0 RSDP */
|
||||
break;
|
||||
case 2: /* ACPI 2.0+ RSDP */
|
||||
/* Read the rest of the RSDP table */
|
||||
qtest_memread(qts, addr + 20, rsdp_table + 20, 16);
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
ACPI_ASSERT_CMP64(*((uint64_t *)(rsdp_table)), "RSD PTR ");
|
||||
}
|
||||
|
||||
/** acpi_fetch_table
|
||||
* load ACPI table at @addr_ptr offset pointer into buffer and return it in
|
||||
* @aml, its length in @aml_len and check that signature/checksum matches
|
||||
* actual one.
|
||||
*/
|
||||
void acpi_fetch_table(QTestState *qts, uint8_t **aml, uint32_t *aml_len,
|
||||
const uint8_t *addr_ptr, int addr_size, const char *sig,
|
||||
bool verify_checksum)
|
||||
{
|
||||
uint32_t len;
|
||||
uint64_t addr = 0;
|
||||
|
||||
g_assert(addr_size == 4 || addr_size == 8);
|
||||
memcpy(&addr, addr_ptr , addr_size);
|
||||
addr = le64_to_cpu(addr);
|
||||
qtest_memread(qts, addr + 4, &len, 4); /* Length of ACPI table */
|
||||
*aml_len = le32_to_cpu(len);
|
||||
*aml = g_malloc0(*aml_len);
|
||||
/* get whole table */
|
||||
qtest_memread(qts, addr, *aml, *aml_len);
|
||||
|
||||
if (sig) {
|
||||
ACPI_ASSERT_CMP(**aml, sig);
|
||||
}
|
||||
if (verify_checksum) {
|
||||
g_assert(!acpi_calc_checksum(*aml, *aml_len));
|
||||
}
|
||||
}
|
||||
|
||||
#define GUID_SIZE 16
|
||||
static const uint8_t AcpiTestSupportGuid[GUID_SIZE] = {
|
||||
0xb1, 0xa6, 0x87, 0xab,
|
||||
0x34, 0x20,
|
||||
0xa0, 0xbd,
|
||||
0x71, 0xbd, 0x37, 0x50, 0x07, 0x75, 0x77, 0x85 };
|
||||
|
||||
typedef struct {
|
||||
uint8_t signature_guid[GUID_SIZE];
|
||||
uint64_t rsdp10;
|
||||
uint64_t rsdp20;
|
||||
} __attribute__((packed)) UefiTestSupport;
|
||||
|
||||
/* Wait at most 600 seconds (test is slow with TCG and --enable-debug) */
|
||||
#define TEST_DELAY (1 * G_USEC_PER_SEC / 10)
|
||||
#define TEST_CYCLES MAX((600 * G_USEC_PER_SEC / TEST_DELAY), 1)
|
||||
#define MB 0x100000ULL
|
||||
uint64_t acpi_find_rsdp_address_uefi(QTestState *qts, uint64_t start,
|
||||
uint64_t size)
|
||||
{
|
||||
int i, j;
|
||||
uint8_t data[GUID_SIZE];
|
||||
|
||||
for (i = 0; i < TEST_CYCLES; ++i) {
|
||||
for (j = 0; j < size / MB; j++) {
|
||||
/* look for GUID at every 1Mb block */
|
||||
uint64_t addr = start + j * MB;
|
||||
|
||||
qtest_memread(qts, addr, data, sizeof(data));
|
||||
if (!memcmp(AcpiTestSupportGuid, data, sizeof(data))) {
|
||||
UefiTestSupport ret;
|
||||
|
||||
qtest_memread(qts, addr, &ret, sizeof(ret));
|
||||
ret.rsdp10 = le64_to_cpu(ret.rsdp10);
|
||||
ret.rsdp20 = le64_to_cpu(ret.rsdp20);
|
||||
return ret.rsdp20 ? ret.rsdp20 : ret.rsdp10;
|
||||
}
|
||||
}
|
||||
g_usleep(TEST_DELAY);
|
||||
}
|
||||
g_assert_not_reached();
|
||||
return 0;
|
||||
}
|
||||
56
tests/qtest/acpi-utils.h
Normal file
56
tests/qtest/acpi-utils.h
Normal file
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
* Utilities for working with ACPI tables
|
||||
*
|
||||
* Copyright (c) 2013 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Michael S. Tsirkin <mst@redhat.com>,
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef TEST_ACPI_UTILS_H
|
||||
#define TEST_ACPI_UTILS_H
|
||||
|
||||
#include "libqtest.h"
|
||||
|
||||
/* DSDT and SSDTs format */
|
||||
typedef struct {
|
||||
uint8_t *aml; /* aml bytecode from guest */
|
||||
uint32_t aml_len;
|
||||
gchar *aml_file;
|
||||
gchar *asl; /* asl code generated from aml */
|
||||
gsize asl_len;
|
||||
gchar *asl_file;
|
||||
bool tmp_files_retain; /* do not delete the temp asl/aml */
|
||||
} AcpiSdtTable;
|
||||
|
||||
#define ACPI_ASSERT_CMP(actual, expected) do { \
|
||||
char ACPI_ASSERT_CMP_str[5] = {}; \
|
||||
memcpy(ACPI_ASSERT_CMP_str, &actual, 4); \
|
||||
g_assert_cmpstr(ACPI_ASSERT_CMP_str, ==, expected); \
|
||||
} while (0)
|
||||
|
||||
#define ACPI_ASSERT_CMP64(actual, expected) do { \
|
||||
char ACPI_ASSERT_CMP_str[9] = {}; \
|
||||
memcpy(ACPI_ASSERT_CMP_str, &actual, 8); \
|
||||
g_assert_cmpstr(ACPI_ASSERT_CMP_str, ==, expected); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define ACPI_FOREACH_RSDT_ENTRY(table, table_len, entry_ptr, entry_size) \
|
||||
for (entry_ptr = table + 36 /* 1st Entry */; \
|
||||
entry_ptr < table + table_len; \
|
||||
entry_ptr += entry_size)
|
||||
|
||||
uint8_t acpi_calc_checksum(const uint8_t *data, int len);
|
||||
uint32_t acpi_find_rsdp_address(QTestState *qts);
|
||||
uint64_t acpi_find_rsdp_address_uefi(QTestState *qts, uint64_t start,
|
||||
uint64_t size);
|
||||
void acpi_fetch_rsdp_table(QTestState *qts, uint64_t addr, uint8_t *rsdp_table);
|
||||
void acpi_fetch_table(QTestState *qts, uint8_t **aml, uint32_t *aml_len,
|
||||
const uint8_t *addr_ptr, int addr_size, const char *sig,
|
||||
bool verify_checksum);
|
||||
|
||||
#endif /* TEST_ACPI_UTILS_H */
|
||||
1954
tests/qtest/ahci-test.c
Normal file
1954
tests/qtest/ahci-test.c
Normal file
File diff suppressed because it is too large
Load diff
559
tests/qtest/arm-cpu-features.c
Normal file
559
tests/qtest/arm-cpu-features.c
Normal file
|
|
@ -0,0 +1,559 @@
|
|||
/*
|
||||
* Arm CPU feature test cases
|
||||
*
|
||||
* Copyright (c) 2019 Red Hat Inc.
|
||||
* Authors:
|
||||
* Andrew Jones <drjones@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu/bitops.h"
|
||||
#include "libqtest.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
#include "qapi/qmp/qjson.h"
|
||||
|
||||
/*
|
||||
* We expect the SVE max-vq to be 16. Also it must be <= 64
|
||||
* for our test code, otherwise 'vls' can't just be a uint64_t.
|
||||
*/
|
||||
#define SVE_MAX_VQ 16
|
||||
|
||||
#define MACHINE "-machine virt,gic-version=max -accel tcg "
|
||||
#define MACHINE_KVM "-machine virt,gic-version=max -accel kvm -accel tcg "
|
||||
#define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \
|
||||
" 'arguments': { 'type': 'full', "
|
||||
#define QUERY_TAIL "}}"
|
||||
|
||||
static bool kvm_enabled(QTestState *qts)
|
||||
{
|
||||
QDict *resp, *qdict;
|
||||
bool enabled;
|
||||
|
||||
resp = qtest_qmp(qts, "{ 'execute': 'query-kvm' }");
|
||||
g_assert(qdict_haskey(resp, "return"));
|
||||
qdict = qdict_get_qdict(resp, "return");
|
||||
g_assert(qdict_haskey(qdict, "enabled"));
|
||||
enabled = qdict_get_bool(qdict, "enabled");
|
||||
qobject_unref(resp);
|
||||
|
||||
return enabled;
|
||||
}
|
||||
|
||||
static QDict *do_query_no_props(QTestState *qts, const char *cpu_type)
|
||||
{
|
||||
return qtest_qmp(qts, QUERY_HEAD "'model': { 'name': %s }"
|
||||
QUERY_TAIL, cpu_type);
|
||||
}
|
||||
|
||||
static QDict *do_query(QTestState *qts, const char *cpu_type,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
QDict *resp;
|
||||
|
||||
if (fmt) {
|
||||
QDict *args;
|
||||
va_list ap;
|
||||
|
||||
va_start(ap, fmt);
|
||||
args = qdict_from_vjsonf_nofail(fmt, ap);
|
||||
va_end(ap);
|
||||
|
||||
resp = qtest_qmp(qts, QUERY_HEAD "'model': { 'name': %s, "
|
||||
"'props': %p }"
|
||||
QUERY_TAIL, cpu_type, args);
|
||||
} else {
|
||||
resp = do_query_no_props(qts, cpu_type);
|
||||
}
|
||||
|
||||
return resp;
|
||||
}
|
||||
|
||||
static const char *resp_get_error(QDict *resp)
|
||||
{
|
||||
QDict *qdict;
|
||||
|
||||
g_assert(resp);
|
||||
|
||||
qdict = qdict_get_qdict(resp, "error");
|
||||
if (qdict) {
|
||||
return qdict_get_str(qdict, "desc");
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
#define assert_error(qts, cpu_type, expected_error, fmt, ...) \
|
||||
({ \
|
||||
QDict *_resp; \
|
||||
const char *_error; \
|
||||
\
|
||||
_resp = do_query(qts, cpu_type, fmt, ##__VA_ARGS__); \
|
||||
g_assert(_resp); \
|
||||
_error = resp_get_error(_resp); \
|
||||
g_assert(_error); \
|
||||
g_assert(g_str_equal(_error, expected_error)); \
|
||||
qobject_unref(_resp); \
|
||||
})
|
||||
|
||||
static bool resp_has_props(QDict *resp)
|
||||
{
|
||||
QDict *qdict;
|
||||
|
||||
g_assert(resp);
|
||||
|
||||
if (!qdict_haskey(resp, "return")) {
|
||||
return false;
|
||||
}
|
||||
qdict = qdict_get_qdict(resp, "return");
|
||||
|
||||
if (!qdict_haskey(qdict, "model")) {
|
||||
return false;
|
||||
}
|
||||
qdict = qdict_get_qdict(qdict, "model");
|
||||
|
||||
return qdict_haskey(qdict, "props");
|
||||
}
|
||||
|
||||
static QDict *resp_get_props(QDict *resp)
|
||||
{
|
||||
QDict *qdict;
|
||||
|
||||
g_assert(resp);
|
||||
g_assert(resp_has_props(resp));
|
||||
|
||||
qdict = qdict_get_qdict(resp, "return");
|
||||
qdict = qdict_get_qdict(qdict, "model");
|
||||
qdict = qdict_get_qdict(qdict, "props");
|
||||
|
||||
return qdict;
|
||||
}
|
||||
|
||||
static bool resp_get_feature(QDict *resp, const char *feature)
|
||||
{
|
||||
QDict *props;
|
||||
|
||||
g_assert(resp);
|
||||
g_assert(resp_has_props(resp));
|
||||
props = resp_get_props(resp);
|
||||
g_assert(qdict_get(props, feature));
|
||||
return qdict_get_bool(props, feature);
|
||||
}
|
||||
|
||||
#define assert_has_feature(qts, cpu_type, feature) \
|
||||
({ \
|
||||
QDict *_resp = do_query_no_props(qts, cpu_type); \
|
||||
g_assert(_resp); \
|
||||
g_assert(resp_has_props(_resp)); \
|
||||
g_assert(qdict_get(resp_get_props(_resp), feature)); \
|
||||
qobject_unref(_resp); \
|
||||
})
|
||||
|
||||
#define assert_has_not_feature(qts, cpu_type, feature) \
|
||||
({ \
|
||||
QDict *_resp = do_query_no_props(qts, cpu_type); \
|
||||
g_assert(_resp); \
|
||||
g_assert(!resp_has_props(_resp) || \
|
||||
!qdict_get(resp_get_props(_resp), feature)); \
|
||||
qobject_unref(_resp); \
|
||||
})
|
||||
|
||||
static void assert_type_full(QTestState *qts)
|
||||
{
|
||||
const char *error;
|
||||
QDict *resp;
|
||||
|
||||
resp = qtest_qmp(qts, "{ 'execute': 'query-cpu-model-expansion', "
|
||||
"'arguments': { 'type': 'static', "
|
||||
"'model': { 'name': 'foo' }}}");
|
||||
g_assert(resp);
|
||||
error = resp_get_error(resp);
|
||||
g_assert(error);
|
||||
g_assert(g_str_equal(error,
|
||||
"The requested expansion type is not supported"));
|
||||
qobject_unref(resp);
|
||||
}
|
||||
|
||||
static void assert_bad_props(QTestState *qts, const char *cpu_type)
|
||||
{
|
||||
const char *error;
|
||||
QDict *resp;
|
||||
|
||||
resp = qtest_qmp(qts, "{ 'execute': 'query-cpu-model-expansion', "
|
||||
"'arguments': { 'type': 'full', "
|
||||
"'model': { 'name': %s, "
|
||||
"'props': false }}}",
|
||||
cpu_type);
|
||||
g_assert(resp);
|
||||
error = resp_get_error(resp);
|
||||
g_assert(error);
|
||||
g_assert(g_str_equal(error,
|
||||
"Invalid parameter type for 'props', expected: dict"));
|
||||
qobject_unref(resp);
|
||||
}
|
||||
|
||||
static uint64_t resp_get_sve_vls(QDict *resp)
|
||||
{
|
||||
QDict *props;
|
||||
const QDictEntry *e;
|
||||
uint64_t vls = 0;
|
||||
int n = 0;
|
||||
|
||||
g_assert(resp);
|
||||
g_assert(resp_has_props(resp));
|
||||
|
||||
props = resp_get_props(resp);
|
||||
|
||||
for (e = qdict_first(props); e; e = qdict_next(props, e)) {
|
||||
if (strlen(e->key) > 3 && !strncmp(e->key, "sve", 3) &&
|
||||
g_ascii_isdigit(e->key[3])) {
|
||||
char *endptr;
|
||||
int bits;
|
||||
|
||||
bits = g_ascii_strtoll(&e->key[3], &endptr, 10);
|
||||
if (!bits || *endptr != '\0') {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (qdict_get_bool(props, e->key)) {
|
||||
vls |= BIT_ULL((bits / 128) - 1);
|
||||
}
|
||||
++n;
|
||||
}
|
||||
}
|
||||
|
||||
g_assert(n == SVE_MAX_VQ);
|
||||
|
||||
return vls;
|
||||
}
|
||||
|
||||
#define assert_sve_vls(qts, cpu_type, expected_vls, fmt, ...) \
|
||||
({ \
|
||||
QDict *_resp = do_query(qts, cpu_type, fmt, ##__VA_ARGS__); \
|
||||
g_assert(_resp); \
|
||||
g_assert(resp_has_props(_resp)); \
|
||||
g_assert(resp_get_sve_vls(_resp) == expected_vls); \
|
||||
qobject_unref(_resp); \
|
||||
})
|
||||
|
||||
static void sve_tests_default(QTestState *qts, const char *cpu_type)
|
||||
{
|
||||
/*
|
||||
* With no sve-max-vq or sve<N> properties on the command line
|
||||
* the default is to have all vector lengths enabled. This also
|
||||
* tests that 'sve' is 'on' by default.
|
||||
*/
|
||||
assert_sve_vls(qts, cpu_type, BIT_ULL(SVE_MAX_VQ) - 1, NULL);
|
||||
|
||||
/* With SVE off, all vector lengths should also be off. */
|
||||
assert_sve_vls(qts, cpu_type, 0, "{ 'sve': false }");
|
||||
|
||||
/* With SVE on, we must have at least one vector length enabled. */
|
||||
assert_error(qts, cpu_type, "cannot disable sve128", "{ 'sve128': false }");
|
||||
|
||||
/* Basic enable/disable tests. */
|
||||
assert_sve_vls(qts, cpu_type, 0x7, "{ 'sve384': true }");
|
||||
assert_sve_vls(qts, cpu_type, ((BIT_ULL(SVE_MAX_VQ) - 1) & ~BIT_ULL(2)),
|
||||
"{ 'sve384': false }");
|
||||
|
||||
/*
|
||||
* ---------------------------------------------------------------------
|
||||
* power-of-two(vq) all-power- can can
|
||||
* of-two(< vq) enable disable
|
||||
* ---------------------------------------------------------------------
|
||||
* vq < max_vq no MUST* yes yes
|
||||
* vq < max_vq yes MUST* yes no
|
||||
* ---------------------------------------------------------------------
|
||||
* vq == max_vq n/a MUST* yes** yes**
|
||||
* ---------------------------------------------------------------------
|
||||
* vq > max_vq n/a no no yes
|
||||
* vq > max_vq n/a yes yes yes
|
||||
* ---------------------------------------------------------------------
|
||||
*
|
||||
* [*] "MUST" means this requirement must already be satisfied,
|
||||
* otherwise 'max_vq' couldn't itself be enabled.
|
||||
*
|
||||
* [**] Not testable with the QMP interface, only with the command line.
|
||||
*/
|
||||
|
||||
/* max_vq := 8 */
|
||||
assert_sve_vls(qts, cpu_type, 0x8b, "{ 'sve1024': true }");
|
||||
|
||||
/* max_vq := 8, vq < max_vq, !power-of-two(vq) */
|
||||
assert_sve_vls(qts, cpu_type, 0x8f,
|
||||
"{ 'sve1024': true, 'sve384': true }");
|
||||
assert_sve_vls(qts, cpu_type, 0x8b,
|
||||
"{ 'sve1024': true, 'sve384': false }");
|
||||
|
||||
/* max_vq := 8, vq < max_vq, power-of-two(vq) */
|
||||
assert_sve_vls(qts, cpu_type, 0x8b,
|
||||
"{ 'sve1024': true, 'sve256': true }");
|
||||
assert_error(qts, cpu_type, "cannot disable sve256",
|
||||
"{ 'sve1024': true, 'sve256': false }");
|
||||
|
||||
/* max_vq := 3, vq > max_vq, !all-power-of-two(< vq) */
|
||||
assert_error(qts, cpu_type, "cannot disable sve512",
|
||||
"{ 'sve384': true, 'sve512': false, 'sve640': true }");
|
||||
|
||||
/*
|
||||
* We can disable power-of-two vector lengths when all larger lengths
|
||||
* are also disabled. We only need to disable the power-of-two length,
|
||||
* as all non-enabled larger lengths will then be auto-disabled.
|
||||
*/
|
||||
assert_sve_vls(qts, cpu_type, 0x7, "{ 'sve512': false }");
|
||||
|
||||
/* max_vq := 3, vq > max_vq, all-power-of-two(< vq) */
|
||||
assert_sve_vls(qts, cpu_type, 0x1f,
|
||||
"{ 'sve384': true, 'sve512': true, 'sve640': true }");
|
||||
assert_sve_vls(qts, cpu_type, 0xf,
|
||||
"{ 'sve384': true, 'sve512': true, 'sve640': false }");
|
||||
}
|
||||
|
||||
static void sve_tests_sve_max_vq_8(const void *data)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(MACHINE "-cpu max,sve-max-vq=8");
|
||||
|
||||
assert_sve_vls(qts, "max", BIT_ULL(8) - 1, NULL);
|
||||
|
||||
/*
|
||||
* Disabling the max-vq set by sve-max-vq is not allowed, but
|
||||
* of course enabling it is OK.
|
||||
*/
|
||||
assert_error(qts, "max", "cannot disable sve1024", "{ 'sve1024': false }");
|
||||
assert_sve_vls(qts, "max", 0xff, "{ 'sve1024': true }");
|
||||
|
||||
/*
|
||||
* Enabling anything larger than max-vq set by sve-max-vq is not
|
||||
* allowed, but of course disabling everything larger is OK.
|
||||
*/
|
||||
assert_error(qts, "max", "cannot enable sve1152", "{ 'sve1152': true }");
|
||||
assert_sve_vls(qts, "max", 0xff, "{ 'sve1152': false }");
|
||||
|
||||
/*
|
||||
* We can enable/disable non power-of-two lengths smaller than the
|
||||
* max-vq set by sve-max-vq, but, while we can enable power-of-two
|
||||
* lengths, we can't disable them.
|
||||
*/
|
||||
assert_sve_vls(qts, "max", 0xff, "{ 'sve384': true }");
|
||||
assert_sve_vls(qts, "max", 0xfb, "{ 'sve384': false }");
|
||||
assert_sve_vls(qts, "max", 0xff, "{ 'sve256': true }");
|
||||
assert_error(qts, "max", "cannot disable sve256", "{ 'sve256': false }");
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void sve_tests_sve_off(const void *data)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(MACHINE "-cpu max,sve=off");
|
||||
|
||||
/* SVE is off, so the map should be empty. */
|
||||
assert_sve_vls(qts, "max", 0, NULL);
|
||||
|
||||
/* The map stays empty even if we turn lengths off. */
|
||||
assert_sve_vls(qts, "max", 0, "{ 'sve128': false }");
|
||||
|
||||
/* It's an error to enable lengths when SVE is off. */
|
||||
assert_error(qts, "max", "cannot enable sve128", "{ 'sve128': true }");
|
||||
|
||||
/* With SVE re-enabled we should get all vector lengths enabled. */
|
||||
assert_sve_vls(qts, "max", BIT_ULL(SVE_MAX_VQ) - 1, "{ 'sve': true }");
|
||||
|
||||
/* Or enable SVE with just specific vector lengths. */
|
||||
assert_sve_vls(qts, "max", 0x3,
|
||||
"{ 'sve': true, 'sve128': true, 'sve256': true }");
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void sve_tests_sve_off_kvm(const void *data)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(MACHINE_KVM "-cpu max,sve=off");
|
||||
|
||||
/*
|
||||
* We don't know if this host supports SVE so we don't
|
||||
* attempt to test enabling anything. We only test that
|
||||
* everything is disabled (as it should be with sve=off)
|
||||
* and that using sve<N>=off to explicitly disable vector
|
||||
* lengths is OK too.
|
||||
*/
|
||||
assert_sve_vls(qts, "max", 0, NULL);
|
||||
assert_sve_vls(qts, "max", 0, "{ 'sve128': false }");
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_query_cpu_model_expansion(const void *data)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(MACHINE "-cpu max");
|
||||
|
||||
/* Test common query-cpu-model-expansion input validation */
|
||||
assert_type_full(qts);
|
||||
assert_bad_props(qts, "max");
|
||||
assert_error(qts, "foo", "The CPU type 'foo' is not a recognized "
|
||||
"ARM CPU type", NULL);
|
||||
assert_error(qts, "max", "Parameter 'not-a-prop' is unexpected",
|
||||
"{ 'not-a-prop': false }");
|
||||
assert_error(qts, "host", "The CPU type 'host' requires KVM", NULL);
|
||||
|
||||
/* Test expected feature presence/absence for some cpu types */
|
||||
assert_has_feature(qts, "max", "pmu");
|
||||
assert_has_feature(qts, "cortex-a15", "pmu");
|
||||
assert_has_not_feature(qts, "cortex-a15", "aarch64");
|
||||
|
||||
if (g_str_equal(qtest_get_arch(), "aarch64")) {
|
||||
assert_has_feature(qts, "max", "aarch64");
|
||||
assert_has_feature(qts, "max", "sve");
|
||||
assert_has_feature(qts, "max", "sve128");
|
||||
assert_has_feature(qts, "cortex-a57", "pmu");
|
||||
assert_has_feature(qts, "cortex-a57", "aarch64");
|
||||
|
||||
sve_tests_default(qts, "max");
|
||||
|
||||
/* Test that features that depend on KVM generate errors without. */
|
||||
assert_error(qts, "max",
|
||||
"'aarch64' feature cannot be disabled "
|
||||
"unless KVM is enabled and 32-bit EL1 "
|
||||
"is supported",
|
||||
"{ 'aarch64': false }");
|
||||
}
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_query_cpu_model_expansion_kvm(const void *data)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(MACHINE_KVM "-cpu max");
|
||||
|
||||
/*
|
||||
* These tests target the 'host' CPU type, so KVM must be enabled.
|
||||
*/
|
||||
if (!kvm_enabled(qts)) {
|
||||
qtest_quit(qts);
|
||||
return;
|
||||
}
|
||||
|
||||
if (g_str_equal(qtest_get_arch(), "aarch64")) {
|
||||
bool kvm_supports_sve;
|
||||
char max_name[8], name[8];
|
||||
uint32_t max_vq, vq;
|
||||
uint64_t vls;
|
||||
QDict *resp;
|
||||
char *error;
|
||||
|
||||
assert_has_feature(qts, "host", "aarch64");
|
||||
assert_has_feature(qts, "host", "pmu");
|
||||
|
||||
assert_error(qts, "cortex-a15",
|
||||
"We cannot guarantee the CPU type 'cortex-a15' works "
|
||||
"with KVM on this host", NULL);
|
||||
|
||||
assert_has_feature(qts, "host", "sve");
|
||||
resp = do_query_no_props(qts, "host");
|
||||
kvm_supports_sve = resp_get_feature(resp, "sve");
|
||||
vls = resp_get_sve_vls(resp);
|
||||
qobject_unref(resp);
|
||||
|
||||
if (kvm_supports_sve) {
|
||||
g_assert(vls != 0);
|
||||
max_vq = 64 - __builtin_clzll(vls);
|
||||
sprintf(max_name, "sve%d", max_vq * 128);
|
||||
|
||||
/* Enabling a supported length is of course fine. */
|
||||
assert_sve_vls(qts, "host", vls, "{ %s: true }", max_name);
|
||||
|
||||
/* Get the next supported length smaller than max-vq. */
|
||||
vq = 64 - __builtin_clzll(vls & ~BIT_ULL(max_vq - 1));
|
||||
if (vq) {
|
||||
/*
|
||||
* We have at least one length smaller than max-vq,
|
||||
* so we can disable max-vq.
|
||||
*/
|
||||
assert_sve_vls(qts, "host", (vls & ~BIT_ULL(max_vq - 1)),
|
||||
"{ %s: false }", max_name);
|
||||
|
||||
/*
|
||||
* Smaller, supported vector lengths cannot be disabled
|
||||
* unless all larger, supported vector lengths are also
|
||||
* disabled.
|
||||
*/
|
||||
sprintf(name, "sve%d", vq * 128);
|
||||
error = g_strdup_printf("cannot disable %s", name);
|
||||
assert_error(qts, "host", error,
|
||||
"{ %s: true, %s: false }",
|
||||
max_name, name);
|
||||
g_free(error);
|
||||
}
|
||||
|
||||
/*
|
||||
* The smallest, supported vector length is required, because
|
||||
* we need at least one vector length enabled.
|
||||
*/
|
||||
vq = __builtin_ffsll(vls);
|
||||
sprintf(name, "sve%d", vq * 128);
|
||||
error = g_strdup_printf("cannot disable %s", name);
|
||||
assert_error(qts, "host", error, "{ %s: false }", name);
|
||||
g_free(error);
|
||||
|
||||
/* Get an unsupported length. */
|
||||
for (vq = 1; vq <= max_vq; ++vq) {
|
||||
if (!(vls & BIT_ULL(vq - 1))) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (vq <= SVE_MAX_VQ) {
|
||||
sprintf(name, "sve%d", vq * 128);
|
||||
error = g_strdup_printf("cannot enable %s", name);
|
||||
assert_error(qts, "host", error, "{ %s: true }", name);
|
||||
g_free(error);
|
||||
}
|
||||
} else {
|
||||
g_assert(vls == 0);
|
||||
}
|
||||
} else {
|
||||
assert_has_not_feature(qts, "host", "aarch64");
|
||||
assert_has_not_feature(qts, "host", "pmu");
|
||||
assert_has_not_feature(qts, "host", "sve");
|
||||
}
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
qtest_add_data_func("/arm/query-cpu-model-expansion",
|
||||
NULL, test_query_cpu_model_expansion);
|
||||
|
||||
/*
|
||||
* For now we only run KVM specific tests with AArch64 QEMU in
|
||||
* order avoid attempting to run an AArch32 QEMU with KVM on
|
||||
* AArch64 hosts. That won't work and isn't easy to detect.
|
||||
*/
|
||||
if (g_str_equal(qtest_get_arch(), "aarch64")) {
|
||||
qtest_add_data_func("/arm/kvm/query-cpu-model-expansion",
|
||||
NULL, test_query_cpu_model_expansion_kvm);
|
||||
}
|
||||
|
||||
if (g_str_equal(qtest_get_arch(), "aarch64")) {
|
||||
qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-max-vq-8",
|
||||
NULL, sve_tests_sve_max_vq_8);
|
||||
qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-off",
|
||||
NULL, sve_tests_sve_off);
|
||||
qtest_add_data_func("/arm/kvm/query-cpu-model-expansion/sve-off",
|
||||
NULL, sve_tests_sve_off_kvm);
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
1
tests/qtest/bios-tables-test-allowed-diff.h
Normal file
1
tests/qtest/bios-tables-test-allowed-diff.h
Normal file
|
|
@ -0,0 +1 @@
|
|||
/* List of comma-separated changed AML files to ignore */
|
||||
1046
tests/qtest/bios-tables-test.c
Normal file
1046
tests/qtest/bios-tables-test.c
Normal file
File diff suppressed because it is too large
Load diff
205
tests/qtest/boot-order-test.c
Normal file
205
tests/qtest/boot-order-test.c
Normal file
|
|
@ -0,0 +1,205 @@
|
|||
/*
|
||||
* Boot order test cases.
|
||||
*
|
||||
* Copyright (c) 2013 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Markus Armbruster <armbru@redhat.com>,
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/fw_cfg.h"
|
||||
#include "libqtest.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
#include "standard-headers/linux/qemu_fw_cfg.h"
|
||||
|
||||
/* TODO actually test the results and get rid of this */
|
||||
#define qmp_discard_response(qs, ...) qobject_unref(qtest_qmp(qs, __VA_ARGS__))
|
||||
|
||||
typedef struct {
|
||||
const char *args;
|
||||
uint64_t expected_boot;
|
||||
uint64_t expected_reboot;
|
||||
} boot_order_test;
|
||||
|
||||
static void test_a_boot_order(const char *machine,
|
||||
const char *test_args,
|
||||
uint64_t (*read_boot_order)(QTestState *),
|
||||
uint64_t expected_boot,
|
||||
uint64_t expected_reboot)
|
||||
{
|
||||
uint64_t actual;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_initf("-nodefaults%s%s %s", machine ? " -M " : "",
|
||||
machine ?: "", test_args);
|
||||
actual = read_boot_order(qts);
|
||||
g_assert_cmphex(actual, ==, expected_boot);
|
||||
qmp_discard_response(qts, "{ 'execute': 'system_reset' }");
|
||||
/*
|
||||
* system_reset only requests reset. We get a RESET event after
|
||||
* the actual reset completes. Need to wait for that.
|
||||
*/
|
||||
qtest_qmp_eventwait(qts, "RESET");
|
||||
actual = read_boot_order(qts);
|
||||
g_assert_cmphex(actual, ==, expected_reboot);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_boot_orders(const char *machine,
|
||||
uint64_t (*read_boot_order)(QTestState *),
|
||||
const boot_order_test *tests)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; tests[i].args; i++) {
|
||||
test_a_boot_order(machine, tests[i].args,
|
||||
read_boot_order,
|
||||
tests[i].expected_boot,
|
||||
tests[i].expected_reboot);
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t read_mc146818(QTestState *qts, uint16_t port, uint8_t reg)
|
||||
{
|
||||
qtest_outb(qts, port, reg);
|
||||
return qtest_inb(qts, port + 1);
|
||||
}
|
||||
|
||||
static uint64_t read_boot_order_pc(QTestState *qts)
|
||||
{
|
||||
uint8_t b1 = read_mc146818(qts, 0x70, 0x38);
|
||||
uint8_t b2 = read_mc146818(qts, 0x70, 0x3d);
|
||||
|
||||
return b1 | (b2 << 8);
|
||||
}
|
||||
|
||||
static const boot_order_test test_cases_pc[] = {
|
||||
{ "",
|
||||
0x1230, 0x1230 },
|
||||
{ "-no-fd-bootchk",
|
||||
0x1231, 0x1231 },
|
||||
{ "-boot c",
|
||||
0x0200, 0x0200 },
|
||||
{ "-boot nda",
|
||||
0x3410, 0x3410 },
|
||||
{ "-boot order=",
|
||||
0, 0 },
|
||||
{ "-boot order= -boot order=c",
|
||||
0x0200, 0x0200 },
|
||||
{ "-boot once=a",
|
||||
0x0100, 0x1230 },
|
||||
{ "-boot once=a -no-fd-bootchk",
|
||||
0x0101, 0x1231 },
|
||||
{ "-boot once=a,order=c",
|
||||
0x0100, 0x0200 },
|
||||
{ "-boot once=d -boot order=nda",
|
||||
0x0300, 0x3410 },
|
||||
{ "-boot once=a -boot once=b -boot once=c",
|
||||
0x0200, 0x1230 },
|
||||
{}
|
||||
};
|
||||
|
||||
static void test_pc_boot_order(void)
|
||||
{
|
||||
test_boot_orders(NULL, read_boot_order_pc, test_cases_pc);
|
||||
}
|
||||
|
||||
static uint8_t read_m48t59(QTestState *qts, uint64_t addr, uint16_t reg)
|
||||
{
|
||||
qtest_writeb(qts, addr, reg & 0xff);
|
||||
qtest_writeb(qts, addr + 1, reg >> 8);
|
||||
return qtest_readb(qts, addr + 3);
|
||||
}
|
||||
|
||||
static uint64_t read_boot_order_prep(QTestState *qts)
|
||||
{
|
||||
return read_m48t59(qts, 0x80000000 + 0x74, 0x34);
|
||||
}
|
||||
|
||||
static const boot_order_test test_cases_prep[] = {
|
||||
{ "", 'c', 'c' },
|
||||
{ "-boot c", 'c', 'c' },
|
||||
{ "-boot d", 'd', 'd' },
|
||||
{}
|
||||
};
|
||||
|
||||
static void test_prep_boot_order(void)
|
||||
{
|
||||
test_boot_orders("prep", read_boot_order_prep, test_cases_prep);
|
||||
}
|
||||
|
||||
static uint64_t read_boot_order_pmac(QTestState *qts)
|
||||
{
|
||||
QFWCFG *fw_cfg = mm_fw_cfg_init(qts, 0xf0000510);
|
||||
|
||||
return qfw_cfg_get_u16(fw_cfg, FW_CFG_BOOT_DEVICE);
|
||||
}
|
||||
|
||||
static const boot_order_test test_cases_fw_cfg[] = {
|
||||
{ "", 'c', 'c' },
|
||||
{ "-boot c", 'c', 'c' },
|
||||
{ "-boot d", 'd', 'd' },
|
||||
{ "-boot once=d,order=c", 'd', 'c' },
|
||||
{}
|
||||
};
|
||||
|
||||
static void test_pmac_oldworld_boot_order(void)
|
||||
{
|
||||
test_boot_orders("g3beige", read_boot_order_pmac, test_cases_fw_cfg);
|
||||
}
|
||||
|
||||
static void test_pmac_newworld_boot_order(void)
|
||||
{
|
||||
test_boot_orders("mac99", read_boot_order_pmac, test_cases_fw_cfg);
|
||||
}
|
||||
|
||||
static uint64_t read_boot_order_sun4m(QTestState *qts)
|
||||
{
|
||||
QFWCFG *fw_cfg = mm_fw_cfg_init(qts, 0xd00000510ULL);
|
||||
|
||||
return qfw_cfg_get_u16(fw_cfg, FW_CFG_BOOT_DEVICE);
|
||||
}
|
||||
|
||||
static void test_sun4m_boot_order(void)
|
||||
{
|
||||
test_boot_orders("SS-5", read_boot_order_sun4m, test_cases_fw_cfg);
|
||||
}
|
||||
|
||||
static uint64_t read_boot_order_sun4u(QTestState *qts)
|
||||
{
|
||||
QFWCFG *fw_cfg = io_fw_cfg_init(qts, 0x510);
|
||||
|
||||
return qfw_cfg_get_u16(fw_cfg, FW_CFG_BOOT_DEVICE);
|
||||
}
|
||||
|
||||
static void test_sun4u_boot_order(void)
|
||||
{
|
||||
test_boot_orders("sun4u", read_boot_order_sun4u, test_cases_fw_cfg);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
|
||||
qtest_add_func("boot-order/pc", test_pc_boot_order);
|
||||
} else if (strcmp(arch, "ppc") == 0 || strcmp(arch, "ppc64") == 0) {
|
||||
qtest_add_func("boot-order/prep", test_prep_boot_order);
|
||||
qtest_add_func("boot-order/pmac_oldworld",
|
||||
test_pmac_oldworld_boot_order);
|
||||
qtest_add_func("boot-order/pmac_newworld",
|
||||
test_pmac_newworld_boot_order);
|
||||
} else if (strcmp(arch, "sparc") == 0) {
|
||||
qtest_add_func("boot-order/sun4m", test_sun4m_boot_order);
|
||||
} else if (strcmp(arch, "sparc64") == 0) {
|
||||
qtest_add_func("boot-order/sun4u", test_sun4u_boot_order);
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
168
tests/qtest/boot-sector.c
Normal file
168
tests/qtest/boot-sector.c
Normal file
|
|
@ -0,0 +1,168 @@
|
|||
/*
|
||||
* QEMU boot sector testing helpers.
|
||||
*
|
||||
* Copyright (c) 2016 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Michael S. Tsirkin <mst@redhat.com>
|
||||
* Victor Kaplansky <victork@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
#include "qemu/osdep.h"
|
||||
#include "boot-sector.h"
|
||||
#include "qemu-common.h"
|
||||
#include "libqtest.h"
|
||||
|
||||
#define LOW(x) ((x) & 0xff)
|
||||
#define HIGH(x) ((x) >> 8)
|
||||
|
||||
#define SIGNATURE 0xdead
|
||||
#define SIGNATURE_OFFSET 0x10
|
||||
#define BOOT_SECTOR_ADDRESS 0x7c00
|
||||
#define SIGNATURE_ADDR (BOOT_SECTOR_ADDRESS + SIGNATURE_OFFSET)
|
||||
|
||||
/* x86 boot sector code: write SIGNATURE into memory,
|
||||
* then halt.
|
||||
*/
|
||||
static uint8_t x86_boot_sector[512] = {
|
||||
/* The first sector will be placed at RAM address 00007C00, and
|
||||
* the BIOS transfers control to 00007C00
|
||||
*/
|
||||
|
||||
/* Data Segment register should be initialized, since pxe
|
||||
* boot loader can leave it dirty.
|
||||
*/
|
||||
|
||||
/* 7c00: move $0000,%ax */
|
||||
[0x00] = 0xb8,
|
||||
[0x01] = 0x00,
|
||||
[0x02] = 0x00,
|
||||
/* 7c03: move %ax,%ds */
|
||||
[0x03] = 0x8e,
|
||||
[0x04] = 0xd8,
|
||||
|
||||
/* 7c05: mov $0xdead,%ax */
|
||||
[0x05] = 0xb8,
|
||||
[0x06] = LOW(SIGNATURE),
|
||||
[0x07] = HIGH(SIGNATURE),
|
||||
/* 7c08: mov %ax,0x7c10 */
|
||||
[0x08] = 0xa3,
|
||||
[0x09] = LOW(SIGNATURE_ADDR),
|
||||
[0x0a] = HIGH(SIGNATURE_ADDR),
|
||||
|
||||
/* 7c0b cli */
|
||||
[0x0b] = 0xfa,
|
||||
/* 7c0c: hlt */
|
||||
[0x0c] = 0xf4,
|
||||
/* 7c0e: jmp 0x7c07=0x7c0f-3 */
|
||||
[0x0d] = 0xeb,
|
||||
[0x0e] = LOW(-3),
|
||||
/* We mov 0xdead here: set value to make debugging easier */
|
||||
[SIGNATURE_OFFSET] = LOW(0xface),
|
||||
[SIGNATURE_OFFSET + 1] = HIGH(0xface),
|
||||
/* End of boot sector marker */
|
||||
[0x1FE] = 0x55,
|
||||
[0x1FF] = 0xAA,
|
||||
};
|
||||
|
||||
/* For s390x, use a mini "kernel" with the appropriate signature */
|
||||
static const uint8_t s390x_psw_and_magic[] = {
|
||||
0x00, 0x08, 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, /* Program status word */
|
||||
0x02, 0x00, 0x00, 0x18, 0x60, 0x00, 0x00, 0x50, /* Magic: */
|
||||
0x02, 0x00, 0x00, 0x68, 0x60, 0x00, 0x00, 0x50, /* see linux_s390_magic */
|
||||
0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 /* in the s390-ccw bios */
|
||||
};
|
||||
static const uint8_t s390x_code[] = {
|
||||
0xa7, 0xf4, 0x00, 0x08, /* j 0x10010 */
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
'S', '3', '9', '0',
|
||||
'E', 'P', 0x00, 0x01,
|
||||
0xa7, 0x39, HIGH(SIGNATURE_ADDR), LOW(SIGNATURE_ADDR), /* lghi r3,0x7c10 */
|
||||
0xa7, 0x48, LOW(SIGNATURE), HIGH(SIGNATURE), /* lhi r4,0xadde */
|
||||
0x40, 0x40, 0x30, 0x00, /* sth r4,0(r3) */
|
||||
0xa7, 0xf4, 0xff, 0xfa /* j 0x10010 */
|
||||
};
|
||||
|
||||
/* Create boot disk file. */
|
||||
int boot_sector_init(char *fname)
|
||||
{
|
||||
int fd, ret;
|
||||
size_t len;
|
||||
char *boot_code;
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
fd = mkstemp(fname);
|
||||
if (fd < 0) {
|
||||
fprintf(stderr, "Couldn't open \"%s\": %s", fname, strerror(errno));
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (g_str_equal(arch, "i386") || g_str_equal(arch, "x86_64")) {
|
||||
/* Q35 requires a minimum 0x7e000 bytes disk (bug or feature?) */
|
||||
len = MAX(0x7e000, sizeof(x86_boot_sector));
|
||||
boot_code = g_malloc0(len);
|
||||
memcpy(boot_code, x86_boot_sector, sizeof(x86_boot_sector));
|
||||
} else if (g_str_equal(arch, "ppc64")) {
|
||||
/* For Open Firmware based system, use a Forth script */
|
||||
boot_code = g_strdup_printf("\\ Bootscript\n%x %x c! %x %x c!\n",
|
||||
LOW(SIGNATURE), SIGNATURE_ADDR,
|
||||
HIGH(SIGNATURE), SIGNATURE_ADDR + 1);
|
||||
len = strlen(boot_code);
|
||||
} else if (g_str_equal(arch, "s390x")) {
|
||||
len = 0x10000 + sizeof(s390x_code);
|
||||
boot_code = g_malloc0(len);
|
||||
memcpy(boot_code, s390x_psw_and_magic, sizeof(s390x_psw_and_magic));
|
||||
memcpy(&boot_code[0x10000], s390x_code, sizeof(s390x_code));
|
||||
} else {
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
ret = write(fd, boot_code, len);
|
||||
close(fd);
|
||||
|
||||
g_free(boot_code);
|
||||
|
||||
if (ret != len) {
|
||||
fprintf(stderr, "Could not write \"%s\"", fname);
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Loop until signature in memory is OK. */
|
||||
void boot_sector_test(QTestState *qts)
|
||||
{
|
||||
uint8_t signature_low;
|
||||
uint8_t signature_high;
|
||||
uint16_t signature;
|
||||
int i;
|
||||
|
||||
/* Wait at most 600 seconds (test is slow with TCI and --enable-debug) */
|
||||
#define TEST_DELAY (1 * G_USEC_PER_SEC / 10)
|
||||
#define TEST_CYCLES MAX((600 * G_USEC_PER_SEC / TEST_DELAY), 1)
|
||||
|
||||
/* Poll until code has run and modified memory. Once it has we know BIOS
|
||||
* initialization is done. TODO: check that IP reached the halt
|
||||
* instruction.
|
||||
*/
|
||||
for (i = 0; i < TEST_CYCLES; ++i) {
|
||||
signature_low = qtest_readb(qts, SIGNATURE_ADDR);
|
||||
signature_high = qtest_readb(qts, SIGNATURE_ADDR + 1);
|
||||
signature = (signature_high << 8) | signature_low;
|
||||
if (signature == SIGNATURE) {
|
||||
break;
|
||||
}
|
||||
g_usleep(TEST_DELAY);
|
||||
}
|
||||
|
||||
g_assert_cmphex(signature, ==, SIGNATURE);
|
||||
}
|
||||
|
||||
/* unlink boot disk file. */
|
||||
void boot_sector_cleanup(const char *fname)
|
||||
{
|
||||
unlink(fname);
|
||||
}
|
||||
28
tests/qtest/boot-sector.h
Normal file
28
tests/qtest/boot-sector.h
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
/*
|
||||
* QEMU boot sector testing helpers.
|
||||
*
|
||||
* Copyright (c) 2016 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Michael S. Tsirkin <mst@redhat.com>
|
||||
* Victor Kaplansky <victork@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef TEST_BOOT_SECTOR_H
|
||||
#define TEST_BOOT_SECTOR_H
|
||||
|
||||
#include "libqtest.h"
|
||||
|
||||
/* Create boot disk file. fname must be a suitable string for mkstemp() */
|
||||
int boot_sector_init(char *fname);
|
||||
|
||||
/* Loop until signature in memory is OK. */
|
||||
void boot_sector_test(QTestState *qts);
|
||||
|
||||
/* unlink boot disk file. */
|
||||
void boot_sector_cleanup(const char *fname);
|
||||
|
||||
#endif /* TEST_BOOT_SECTOR_H */
|
||||
254
tests/qtest/boot-serial-test.c
Normal file
254
tests/qtest/boot-serial-test.c
Normal file
|
|
@ -0,0 +1,254 @@
|
|||
/*
|
||||
* Test serial output of some machines.
|
||||
*
|
||||
* Copyright 2016 Thomas Huth, Red Hat Inc.
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2
|
||||
* or later. See the COPYING file in the top-level directory.
|
||||
*
|
||||
* This test is used to check that the serial output of the firmware
|
||||
* (that we provide for some machines) or some small mini-kernels that
|
||||
* we provide here contains an expected string. Thus we check that the
|
||||
* firmware/kernel still boots at least to a certain point and so we
|
||||
* know that the machine is not completely broken.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
|
||||
static const uint8_t kernel_mcf5208[] = {
|
||||
0x41, 0xf9, 0xfc, 0x06, 0x00, 0x00, /* lea 0xfc060000,%a0 */
|
||||
0x10, 0x3c, 0x00, 0x54, /* move.b #'T',%d0 */
|
||||
0x11, 0x7c, 0x00, 0x04, 0x00, 0x08, /* move.b #4,8(%a0) Enable TX */
|
||||
0x11, 0x40, 0x00, 0x0c, /* move.b %d0,12(%a0) Print 'T' */
|
||||
0x60, 0xfa /* bra.s loop */
|
||||
};
|
||||
|
||||
static const uint8_t bios_nextcube[] = {
|
||||
0x06, 0x00, 0x00, 0x00, /* Initial SP */
|
||||
0x01, 0x00, 0x00, 0x08, /* Initial PC */
|
||||
0x41, 0xf9, 0x02, 0x11, 0x80, 0x00, /* lea 0x02118000,%a0 */
|
||||
0x10, 0x3c, 0x00, 0x54, /* move.b #'T',%d0 */
|
||||
0x11, 0x7c, 0x00, 0x05, 0x00, 0x01, /* move.b #5,1(%a0) Sel TXCTRL */
|
||||
0x11, 0x7c, 0x00, 0x68, 0x00, 0x01, /* move.b #0x68,1(%a0) Enable TX */
|
||||
0x11, 0x40, 0x00, 0x03, /* move.b %d0,3(%a0) Print 'T' */
|
||||
0x60, 0xfa /* bra.s loop */
|
||||
};
|
||||
|
||||
static const uint8_t kernel_pls3adsp1800[] = {
|
||||
0xb0, 0x00, 0x84, 0x00, /* imm 0x8400 */
|
||||
0x30, 0x60, 0x00, 0x04, /* addik r3,r0,4 */
|
||||
0x30, 0x80, 0x00, 0x54, /* addik r4,r0,'T' */
|
||||
0xf0, 0x83, 0x00, 0x00, /* sbi r4,r3,0 */
|
||||
0xb8, 0x00, 0xff, 0xfc /* bri -4 loop */
|
||||
};
|
||||
|
||||
static const uint8_t kernel_plml605[] = {
|
||||
0xe0, 0x83, 0x00, 0xb0, /* imm 0x83e0 */
|
||||
0x00, 0x10, 0x60, 0x30, /* addik r3,r0,0x1000 */
|
||||
0x54, 0x00, 0x80, 0x30, /* addik r4,r0,'T' */
|
||||
0x00, 0x00, 0x83, 0xf0, /* sbi r4,r3,0 */
|
||||
0xfc, 0xff, 0x00, 0xb8 /* bri -4 loop */
|
||||
};
|
||||
|
||||
static const uint8_t bios_moxiesim[] = {
|
||||
0x20, 0x10, 0x00, 0x00, 0x03, 0xf8, /* ldi.s r1,0x3f8 */
|
||||
0x1b, 0x20, 0x00, 0x00, 0x00, 0x54, /* ldi.b r2,'T' */
|
||||
0x1e, 0x12, /* st.b r1,r2 */
|
||||
0x1a, 0x00, 0x00, 0x00, 0x10, 0x00 /* jmpa 0x1000 */
|
||||
};
|
||||
|
||||
static const uint8_t bios_raspi2[] = {
|
||||
0x08, 0x30, 0x9f, 0xe5, /* ldr r3,[pc,#8] Get base */
|
||||
0x54, 0x20, 0xa0, 0xe3, /* mov r2,#'T' */
|
||||
0x00, 0x20, 0xc3, 0xe5, /* strb r2,[r3] */
|
||||
0xfb, 0xff, 0xff, 0xea, /* b loop */
|
||||
0x00, 0x10, 0x20, 0x3f, /* 0x3f201000 = UART0 base addr */
|
||||
};
|
||||
|
||||
static const uint8_t kernel_aarch64[] = {
|
||||
0x81, 0x0a, 0x80, 0x52, /* mov w1, #0x54 */
|
||||
0x02, 0x20, 0xa1, 0xd2, /* mov x2, #0x9000000 */
|
||||
0x41, 0x00, 0x00, 0x39, /* strb w1, [x2] */
|
||||
0xfd, 0xff, 0xff, 0x17, /* b -12 (loop) */
|
||||
};
|
||||
|
||||
static const uint8_t kernel_nrf51[] = {
|
||||
0x00, 0x00, 0x00, 0x00, /* Stack top address */
|
||||
0x09, 0x00, 0x00, 0x00, /* Reset handler address */
|
||||
0x04, 0x4a, /* ldr r2, [pc, #16] Get ENABLE */
|
||||
0x04, 0x21, /* movs r1, #4 */
|
||||
0x11, 0x60, /* str r1, [r2] */
|
||||
0x04, 0x4a, /* ldr r2, [pc, #16] Get STARTTX */
|
||||
0x01, 0x21, /* movs r1, #1 */
|
||||
0x11, 0x60, /* str r1, [r2] */
|
||||
0x03, 0x4a, /* ldr r2, [pc, #12] Get TXD */
|
||||
0x54, 0x21, /* movs r1, 'T' */
|
||||
0x11, 0x60, /* str r1, [r2] */
|
||||
0xfe, 0xe7, /* b . */
|
||||
0x00, 0x25, 0x00, 0x40, /* 0x40002500 = UART ENABLE */
|
||||
0x08, 0x20, 0x00, 0x40, /* 0x40002008 = UART STARTTX */
|
||||
0x1c, 0x25, 0x00, 0x40 /* 0x4000251c = UART TXD */
|
||||
};
|
||||
|
||||
typedef struct testdef {
|
||||
const char *arch; /* Target architecture */
|
||||
const char *machine; /* Name of the machine */
|
||||
const char *extra; /* Additional parameters */
|
||||
const char *expect; /* Expected string in the serial output */
|
||||
size_t codesize; /* Size of the kernel or bios data */
|
||||
const uint8_t *kernel; /* Set in case we use our own mini kernel */
|
||||
const uint8_t *bios; /* Set in case we use our own mini bios */
|
||||
} testdef_t;
|
||||
|
||||
static testdef_t tests[] = {
|
||||
{ "alpha", "clipper", "", "PCI:" },
|
||||
{ "ppc", "ppce500", "", "U-Boot" },
|
||||
{ "ppc", "40p", "-vga none -boot d", "Trying cd:," },
|
||||
{ "ppc", "g3beige", "", "PowerPC,750" },
|
||||
{ "ppc", "mac99", "", "PowerPC,G4" },
|
||||
{ "ppc", "sam460ex", "-m 256", "DRAM: 256 MiB" },
|
||||
{ "ppc64", "ppce500", "", "U-Boot" },
|
||||
{ "ppc64", "40p", "-m 192", "Memory: 192M" },
|
||||
{ "ppc64", "mac99", "", "PowerPC,970FX" },
|
||||
{ "ppc64", "pseries",
|
||||
"-machine cap-cfpc=broken,cap-sbbc=broken,cap-ibs=broken",
|
||||
"Open Firmware" },
|
||||
{ "ppc64", "powernv8", "", "OPAL" },
|
||||
{ "ppc64", "powernv9", "", "OPAL" },
|
||||
{ "ppc64", "sam460ex", "-device e1000", "8086 100e" },
|
||||
{ "i386", "isapc", "-cpu qemu32 -device sga", "SGABIOS" },
|
||||
{ "i386", "pc", "-device sga", "SGABIOS" },
|
||||
{ "i386", "q35", "-device sga", "SGABIOS" },
|
||||
{ "x86_64", "isapc", "-cpu qemu32 -device sga", "SGABIOS" },
|
||||
{ "x86_64", "q35", "-device sga", "SGABIOS" },
|
||||
{ "sparc", "LX", "", "TMS390S10" },
|
||||
{ "sparc", "SS-4", "", "MB86904" },
|
||||
{ "sparc", "SS-600MP", "", "TMS390Z55" },
|
||||
{ "sparc64", "sun4u", "", "UltraSPARC" },
|
||||
{ "s390x", "s390-ccw-virtio", "", "device" },
|
||||
{ "m68k", "mcf5208evb", "", "TT", sizeof(kernel_mcf5208), kernel_mcf5208 },
|
||||
{ "m68k", "next-cube", "", "TT", sizeof(bios_nextcube), 0, bios_nextcube },
|
||||
{ "microblaze", "petalogix-s3adsp1800", "", "TT",
|
||||
sizeof(kernel_pls3adsp1800), kernel_pls3adsp1800 },
|
||||
{ "microblazeel", "petalogix-ml605", "", "TT",
|
||||
sizeof(kernel_plml605), kernel_plml605 },
|
||||
{ "moxie", "moxiesim", "", "TT", sizeof(bios_moxiesim), 0, bios_moxiesim },
|
||||
{ "arm", "raspi2", "", "TT", sizeof(bios_raspi2), 0, bios_raspi2 },
|
||||
{ "hppa", "hppa", "", "SeaBIOS wants SYSTEM HALT" },
|
||||
{ "aarch64", "virt", "-cpu cortex-a57", "TT", sizeof(kernel_aarch64),
|
||||
kernel_aarch64 },
|
||||
{ "arm", "microbit", "", "T", sizeof(kernel_nrf51), kernel_nrf51 },
|
||||
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
static bool check_guest_output(QTestState *qts, const testdef_t *test, int fd)
|
||||
{
|
||||
int nbr = 0, pos = 0, ccnt;
|
||||
time_t now, start = time(NULL);
|
||||
char ch;
|
||||
|
||||
/* Poll serial output... */
|
||||
while (1) {
|
||||
ccnt = 0;
|
||||
while (ccnt++ < 512 && (nbr = read(fd, &ch, 1)) == 1) {
|
||||
if (ch == test->expect[pos]) {
|
||||
pos += 1;
|
||||
if (test->expect[pos] == '\0') {
|
||||
/* We've reached the end of the expected string! */
|
||||
return true;
|
||||
}
|
||||
} else {
|
||||
pos = 0;
|
||||
}
|
||||
}
|
||||
g_assert(nbr >= 0);
|
||||
/* Wait only if the child is still alive. */
|
||||
if (!qtest_probe_child(qts)) {
|
||||
break;
|
||||
}
|
||||
/* Wait at most 360 seconds. */
|
||||
now = time(NULL);
|
||||
if (now - start >= 360) {
|
||||
break;
|
||||
}
|
||||
g_usleep(10000);
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static void test_machine(const void *data)
|
||||
{
|
||||
const testdef_t *test = data;
|
||||
char serialtmp[] = "/tmp/qtest-boot-serial-sXXXXXX";
|
||||
char codetmp[] = "/tmp/qtest-boot-serial-cXXXXXX";
|
||||
const char *codeparam = "";
|
||||
const uint8_t *code = NULL;
|
||||
QTestState *qts;
|
||||
int ser_fd;
|
||||
|
||||
ser_fd = mkstemp(serialtmp);
|
||||
g_assert(ser_fd != -1);
|
||||
|
||||
if (test->kernel) {
|
||||
code = test->kernel;
|
||||
codeparam = "-kernel";
|
||||
} else if (test->bios) {
|
||||
code = test->bios;
|
||||
codeparam = "-bios";
|
||||
}
|
||||
|
||||
if (code) {
|
||||
ssize_t wlen;
|
||||
int code_fd;
|
||||
|
||||
code_fd = mkstemp(codetmp);
|
||||
g_assert(code_fd != -1);
|
||||
wlen = write(code_fd, code, test->codesize);
|
||||
g_assert(wlen == test->codesize);
|
||||
close(code_fd);
|
||||
}
|
||||
|
||||
/*
|
||||
* Make sure that this test uses tcg if available: It is used as a
|
||||
* fast-enough smoketest for that.
|
||||
*/
|
||||
qts = qtest_initf("%s %s -M %s -no-shutdown "
|
||||
"-chardev file,id=serial0,path=%s "
|
||||
"-serial chardev:serial0 -accel tcg -accel kvm %s",
|
||||
codeparam, code ? codetmp : "", test->machine,
|
||||
serialtmp, test->extra);
|
||||
if (code) {
|
||||
unlink(codetmp);
|
||||
}
|
||||
|
||||
if (!check_guest_output(qts, test, ser_fd)) {
|
||||
g_error("Failed to find expected string. Please check '%s'",
|
||||
serialtmp);
|
||||
}
|
||||
unlink(serialtmp);
|
||||
|
||||
qtest_quit(qts);
|
||||
|
||||
close(ser_fd);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
const char *arch = qtest_get_arch();
|
||||
int i;
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
for (i = 0; tests[i].arch != NULL; i++) {
|
||||
if (strcmp(arch, tests[i].arch) == 0) {
|
||||
char *name = g_strdup_printf("boot-serial/%s", tests[i].machine);
|
||||
qtest_add_data_func(name, &tests[i], test_machine);
|
||||
g_free(name);
|
||||
}
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
228
tests/qtest/cdrom-test.c
Normal file
228
tests/qtest/cdrom-test.c
Normal file
|
|
@ -0,0 +1,228 @@
|
|||
/*
|
||||
* Various tests for emulated CD-ROM drives.
|
||||
*
|
||||
* Copyright (c) 2018 Red Hat Inc.
|
||||
*
|
||||
* Author:
|
||||
* Thomas Huth <thuth@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2
|
||||
* or later. See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "boot-sector.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
|
||||
static char isoimage[] = "cdrom-boot-iso-XXXXXX";
|
||||
|
||||
static int exec_genisoimg(const char **args)
|
||||
{
|
||||
gchar *out_err = NULL;
|
||||
gint exit_status = -1;
|
||||
bool success;
|
||||
|
||||
success = g_spawn_sync(NULL, (gchar **)args, NULL,
|
||||
G_SPAWN_SEARCH_PATH | G_SPAWN_STDOUT_TO_DEV_NULL,
|
||||
NULL, NULL, NULL, &out_err, &exit_status, NULL);
|
||||
if (!success) {
|
||||
return -ENOENT;
|
||||
}
|
||||
if (out_err) {
|
||||
fputs(out_err, stderr);
|
||||
g_free(out_err);
|
||||
}
|
||||
|
||||
return exit_status;
|
||||
}
|
||||
|
||||
static int prepare_image(const char *arch, char *isoimage)
|
||||
{
|
||||
char srcdir[] = "cdrom-test-dir-XXXXXX";
|
||||
char *codefile = NULL;
|
||||
int ifh, ret = -1;
|
||||
const char *args[] = {
|
||||
"genisoimage", "-quiet", "-l", "-no-emul-boot",
|
||||
"-b", NULL, "-o", isoimage, srcdir, NULL
|
||||
};
|
||||
|
||||
ifh = mkstemp(isoimage);
|
||||
if (ifh < 0) {
|
||||
perror("Error creating temporary iso image file");
|
||||
return -1;
|
||||
}
|
||||
if (!mkdtemp(srcdir)) {
|
||||
perror("Error creating temporary directory");
|
||||
goto cleanup;
|
||||
}
|
||||
|
||||
if (g_str_equal(arch, "i386") || g_str_equal(arch, "x86_64") ||
|
||||
g_str_equal(arch, "s390x")) {
|
||||
codefile = g_strdup_printf("%s/bootcode-XXXXXX", srcdir);
|
||||
ret = boot_sector_init(codefile);
|
||||
if (ret) {
|
||||
goto cleanup;
|
||||
}
|
||||
} else {
|
||||
/* Just create a dummy file */
|
||||
char txt[] = "empty disc";
|
||||
codefile = g_strdup_printf("%s/readme.txt", srcdir);
|
||||
if (!g_file_set_contents(codefile, txt, sizeof(txt) - 1, NULL)) {
|
||||
fprintf(stderr, "Failed to create '%s'\n", codefile);
|
||||
goto cleanup;
|
||||
}
|
||||
}
|
||||
|
||||
args[5] = strchr(codefile, '/') + 1;
|
||||
ret = exec_genisoimg(args);
|
||||
if (ret) {
|
||||
fprintf(stderr, "genisoimage failed: %i\n", ret);
|
||||
}
|
||||
|
||||
unlink(codefile);
|
||||
|
||||
cleanup:
|
||||
g_free(codefile);
|
||||
rmdir(srcdir);
|
||||
close(ifh);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* Check that at least the -cdrom parameter is basically working, i.e. we can
|
||||
* see the filename of the ISO image in the output of "info block" afterwards
|
||||
*/
|
||||
static void test_cdrom_param(gconstpointer data)
|
||||
{
|
||||
QTestState *qts;
|
||||
char *resp;
|
||||
|
||||
qts = qtest_initf("-M %s -cdrom %s", (const char *)data, isoimage);
|
||||
resp = qtest_hmp(qts, "info block");
|
||||
g_assert(strstr(resp, isoimage) != 0);
|
||||
g_free(resp);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void add_cdrom_param_tests(const char **machines)
|
||||
{
|
||||
while (*machines) {
|
||||
char *testname = g_strdup_printf("cdrom/param/%s", *machines);
|
||||
qtest_add_data_func(testname, *machines, test_cdrom_param);
|
||||
g_free(testname);
|
||||
machines++;
|
||||
}
|
||||
}
|
||||
|
||||
static void test_cdboot(gconstpointer data)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_initf("-accel kvm -accel tcg -no-shutdown %s%s", (const char *)data,
|
||||
isoimage);
|
||||
boot_sector_test(qts);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void add_x86_tests(void)
|
||||
{
|
||||
qtest_add_data_func("cdrom/boot/default", "-cdrom ", test_cdboot);
|
||||
qtest_add_data_func("cdrom/boot/virtio-scsi",
|
||||
"-device virtio-scsi -device scsi-cd,drive=cdr "
|
||||
"-blockdev file,node-name=cdr,filename=", test_cdboot);
|
||||
/*
|
||||
* Unstable CI test under load
|
||||
* See https://lists.gnu.org/archive/html/qemu-devel/2019-02/msg05509.html
|
||||
*/
|
||||
if (g_test_slow()) {
|
||||
qtest_add_data_func("cdrom/boot/isapc", "-M isapc "
|
||||
"-drive if=ide,media=cdrom,file=", test_cdboot);
|
||||
}
|
||||
qtest_add_data_func("cdrom/boot/am53c974",
|
||||
"-device am53c974 -device scsi-cd,drive=cd1 "
|
||||
"-drive if=none,id=cd1,format=raw,file=", test_cdboot);
|
||||
qtest_add_data_func("cdrom/boot/dc390",
|
||||
"-device dc390 -device scsi-cd,drive=cd1 "
|
||||
"-blockdev file,node-name=cd1,filename=", test_cdboot);
|
||||
qtest_add_data_func("cdrom/boot/lsi53c895a",
|
||||
"-device lsi53c895a -device scsi-cd,drive=cd1 "
|
||||
"-blockdev file,node-name=cd1,filename=", test_cdboot);
|
||||
qtest_add_data_func("cdrom/boot/megasas", "-M q35 "
|
||||
"-device megasas -device scsi-cd,drive=cd1 "
|
||||
"-blockdev file,node-name=cd1,filename=", test_cdboot);
|
||||
qtest_add_data_func("cdrom/boot/megasas-gen2", "-M q35 "
|
||||
"-device megasas-gen2 -device scsi-cd,drive=cd1 "
|
||||
"-blockdev file,node-name=cd1,filename=", test_cdboot);
|
||||
}
|
||||
|
||||
static void add_s390x_tests(void)
|
||||
{
|
||||
qtest_add_data_func("cdrom/boot/default", "-cdrom ", test_cdboot);
|
||||
qtest_add_data_func("cdrom/boot/virtio-scsi",
|
||||
"-device virtio-scsi -device scsi-cd,drive=cdr "
|
||||
"-blockdev file,node-name=cdr,filename=", test_cdboot);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int ret;
|
||||
const char *arch = qtest_get_arch();
|
||||
const char *genisocheck[] = { "genisoimage", "-version", NULL };
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
if (exec_genisoimg(genisocheck)) {
|
||||
/* genisoimage not available - so can't run tests */
|
||||
return g_test_run();
|
||||
}
|
||||
|
||||
ret = prepare_image(arch, isoimage);
|
||||
if (ret) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (g_str_equal(arch, "i386") || g_str_equal(arch, "x86_64")) {
|
||||
add_x86_tests();
|
||||
} else if (g_str_equal(arch, "s390x")) {
|
||||
add_s390x_tests();
|
||||
} else if (g_str_equal(arch, "ppc64")) {
|
||||
const char *ppcmachines[] = {
|
||||
"pseries", "mac99", "g3beige", "40p", "prep", NULL
|
||||
};
|
||||
add_cdrom_param_tests(ppcmachines);
|
||||
} else if (g_str_equal(arch, "sparc")) {
|
||||
const char *sparcmachines[] = {
|
||||
"LX", "SPARCClassic", "SPARCbook", "SS-10", "SS-20", "SS-4",
|
||||
"SS-5", "SS-600MP", "Voyager", "leon3_generic", NULL
|
||||
};
|
||||
add_cdrom_param_tests(sparcmachines);
|
||||
} else if (g_str_equal(arch, "sparc64")) {
|
||||
const char *sparc64machines[] = {
|
||||
"niagara", "sun4u", "sun4v", NULL
|
||||
};
|
||||
add_cdrom_param_tests(sparc64machines);
|
||||
} else if (!strncmp(arch, "mips64", 6)) {
|
||||
const char *mips64machines[] = {
|
||||
"magnum", "malta", "mips", "pica61", NULL
|
||||
};
|
||||
add_cdrom_param_tests(mips64machines);
|
||||
} else if (g_str_equal(arch, "arm") || g_str_equal(arch, "aarch64")) {
|
||||
const char *armmachines[] = {
|
||||
"realview-eb", "realview-eb-mpcore", "realview-pb-a8",
|
||||
"realview-pbx-a9", "versatileab", "versatilepb", "vexpress-a15",
|
||||
"vexpress-a9", "virt", NULL
|
||||
};
|
||||
add_cdrom_param_tests(armmachines);
|
||||
} else {
|
||||
const char *nonemachine[] = { "none", NULL };
|
||||
add_cdrom_param_tests(nonemachine);
|
||||
}
|
||||
|
||||
ret = g_test_run();
|
||||
|
||||
unlink(isoimage);
|
||||
|
||||
return ret;
|
||||
}
|
||||
257
tests/qtest/cpu-plug-test.c
Normal file
257
tests/qtest/cpu-plug-test.c
Normal file
|
|
@ -0,0 +1,257 @@
|
|||
/*
|
||||
* QTest testcase for CPU plugging
|
||||
*
|
||||
* Copyright (c) 2015 SUSE Linux GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
|
||||
#include "qemu-common.h"
|
||||
#include "libqtest-single.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
#include "qapi/qmp/qlist.h"
|
||||
|
||||
struct PlugTestData {
|
||||
char *machine;
|
||||
const char *cpu_model;
|
||||
char *device_model;
|
||||
unsigned sockets;
|
||||
unsigned cores;
|
||||
unsigned threads;
|
||||
unsigned maxcpus;
|
||||
};
|
||||
typedef struct PlugTestData PlugTestData;
|
||||
|
||||
static void test_plug_with_cpu_add(gconstpointer data)
|
||||
{
|
||||
const PlugTestData *s = data;
|
||||
char *args;
|
||||
QDict *response;
|
||||
unsigned int i;
|
||||
|
||||
args = g_strdup_printf("-machine %s -cpu %s "
|
||||
"-smp 1,sockets=%u,cores=%u,threads=%u,maxcpus=%u",
|
||||
s->machine, s->cpu_model,
|
||||
s->sockets, s->cores, s->threads, s->maxcpus);
|
||||
qtest_start(args);
|
||||
|
||||
for (i = 1; i < s->maxcpus; i++) {
|
||||
response = qmp("{ 'execute': 'cpu-add',"
|
||||
" 'arguments': { 'id': %d } }", i);
|
||||
g_assert(response);
|
||||
g_assert(!qdict_haskey(response, "error"));
|
||||
qobject_unref(response);
|
||||
}
|
||||
|
||||
qtest_end();
|
||||
g_free(args);
|
||||
}
|
||||
|
||||
static void test_plug_without_cpu_add(gconstpointer data)
|
||||
{
|
||||
const PlugTestData *s = data;
|
||||
char *args;
|
||||
QDict *response;
|
||||
|
||||
args = g_strdup_printf("-machine %s -cpu %s "
|
||||
"-smp 1,sockets=%u,cores=%u,threads=%u,maxcpus=%u",
|
||||
s->machine, s->cpu_model,
|
||||
s->sockets, s->cores, s->threads, s->maxcpus);
|
||||
qtest_start(args);
|
||||
|
||||
response = qmp("{ 'execute': 'cpu-add',"
|
||||
" 'arguments': { 'id': %d } }",
|
||||
s->sockets * s->cores * s->threads);
|
||||
g_assert(response);
|
||||
g_assert(qdict_haskey(response, "error"));
|
||||
qobject_unref(response);
|
||||
|
||||
qtest_end();
|
||||
g_free(args);
|
||||
}
|
||||
|
||||
static void test_plug_with_device_add(gconstpointer data)
|
||||
{
|
||||
const PlugTestData *td = data;
|
||||
char *args;
|
||||
QTestState *qts;
|
||||
QDict *resp;
|
||||
QList *cpus;
|
||||
QObject *e;
|
||||
int hotplugged = 0;
|
||||
|
||||
args = g_strdup_printf("-machine %s -cpu %s "
|
||||
"-smp 1,sockets=%u,cores=%u,threads=%u,maxcpus=%u",
|
||||
td->machine, td->cpu_model,
|
||||
td->sockets, td->cores, td->threads, td->maxcpus);
|
||||
qts = qtest_init(args);
|
||||
|
||||
resp = qtest_qmp(qts, "{ 'execute': 'query-hotpluggable-cpus'}");
|
||||
g_assert(qdict_haskey(resp, "return"));
|
||||
cpus = qdict_get_qlist(resp, "return");
|
||||
g_assert(cpus);
|
||||
|
||||
while ((e = qlist_pop(cpus))) {
|
||||
const QDict *cpu, *props;
|
||||
|
||||
cpu = qobject_to(QDict, e);
|
||||
if (qdict_haskey(cpu, "qom-path")) {
|
||||
qobject_unref(e);
|
||||
continue;
|
||||
}
|
||||
|
||||
g_assert(qdict_haskey(cpu, "props"));
|
||||
props = qdict_get_qdict(cpu, "props");
|
||||
|
||||
qtest_qmp_device_add_qdict(qts, td->device_model, props);
|
||||
hotplugged++;
|
||||
qobject_unref(e);
|
||||
}
|
||||
|
||||
/* make sure that there were hotplugged CPUs */
|
||||
g_assert(hotplugged);
|
||||
qobject_unref(resp);
|
||||
qtest_quit(qts);
|
||||
g_free(args);
|
||||
}
|
||||
|
||||
static void test_data_free(gpointer data)
|
||||
{
|
||||
PlugTestData *pc = data;
|
||||
|
||||
g_free(pc->machine);
|
||||
g_free(pc->device_model);
|
||||
g_free(pc);
|
||||
}
|
||||
|
||||
static void add_pc_test_case(const char *mname)
|
||||
{
|
||||
char *path;
|
||||
PlugTestData *data;
|
||||
|
||||
if (!g_str_has_prefix(mname, "pc-")) {
|
||||
return;
|
||||
}
|
||||
data = g_new(PlugTestData, 1);
|
||||
data->machine = g_strdup(mname);
|
||||
data->cpu_model = "Haswell"; /* 1.3+ theoretically */
|
||||
data->device_model = g_strdup_printf("%s-%s-cpu", data->cpu_model,
|
||||
qtest_get_arch());
|
||||
data->sockets = 1;
|
||||
data->cores = 3;
|
||||
data->threads = 2;
|
||||
data->maxcpus = data->sockets * data->cores * data->threads;
|
||||
if (g_str_has_suffix(mname, "-1.4") ||
|
||||
(strcmp(mname, "pc-1.3") == 0) ||
|
||||
(strcmp(mname, "pc-1.2") == 0) ||
|
||||
(strcmp(mname, "pc-1.1") == 0) ||
|
||||
(strcmp(mname, "pc-1.0") == 0)) {
|
||||
path = g_strdup_printf("cpu-plug/%s/init/%ux%ux%u&maxcpus=%u",
|
||||
mname, data->sockets, data->cores,
|
||||
data->threads, data->maxcpus);
|
||||
qtest_add_data_func_full(path, data, test_plug_without_cpu_add,
|
||||
test_data_free);
|
||||
g_free(path);
|
||||
} else {
|
||||
PlugTestData *data2 = g_memdup(data, sizeof(PlugTestData));
|
||||
|
||||
data2->machine = g_strdup(data->machine);
|
||||
data2->device_model = g_strdup(data->device_model);
|
||||
|
||||
path = g_strdup_printf("cpu-plug/%s/cpu-add/%ux%ux%u&maxcpus=%u",
|
||||
mname, data->sockets, data->cores,
|
||||
data->threads, data->maxcpus);
|
||||
qtest_add_data_func_full(path, data, test_plug_with_cpu_add,
|
||||
test_data_free);
|
||||
g_free(path);
|
||||
path = g_strdup_printf("cpu-plug/%s/device-add/%ux%ux%u&maxcpus=%u",
|
||||
mname, data2->sockets, data2->cores,
|
||||
data2->threads, data2->maxcpus);
|
||||
qtest_add_data_func_full(path, data2, test_plug_with_device_add,
|
||||
test_data_free);
|
||||
g_free(path);
|
||||
}
|
||||
}
|
||||
|
||||
static void add_pseries_test_case(const char *mname)
|
||||
{
|
||||
char *path;
|
||||
PlugTestData *data;
|
||||
|
||||
if (!g_str_has_prefix(mname, "pseries-") ||
|
||||
(g_str_has_prefix(mname, "pseries-2.") && atoi(&mname[10]) < 7)) {
|
||||
return;
|
||||
}
|
||||
data = g_new(PlugTestData, 1);
|
||||
data->machine = g_strdup(mname);
|
||||
data->cpu_model = "power8_v2.0";
|
||||
data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
|
||||
data->sockets = 2;
|
||||
data->cores = 3;
|
||||
data->threads = 1;
|
||||
data->maxcpus = data->sockets * data->cores * data->threads;
|
||||
|
||||
path = g_strdup_printf("cpu-plug/%s/device-add/%ux%ux%u&maxcpus=%u",
|
||||
mname, data->sockets, data->cores,
|
||||
data->threads, data->maxcpus);
|
||||
qtest_add_data_func_full(path, data, test_plug_with_device_add,
|
||||
test_data_free);
|
||||
g_free(path);
|
||||
}
|
||||
|
||||
static void add_s390x_test_case(const char *mname)
|
||||
{
|
||||
char *path;
|
||||
PlugTestData *data, *data2;
|
||||
|
||||
if (!g_str_has_prefix(mname, "s390-ccw-virtio-")) {
|
||||
return;
|
||||
}
|
||||
|
||||
data = g_new(PlugTestData, 1);
|
||||
data->machine = g_strdup(mname);
|
||||
data->cpu_model = "qemu";
|
||||
data->device_model = g_strdup("qemu-s390x-cpu");
|
||||
data->sockets = 1;
|
||||
data->cores = 3;
|
||||
data->threads = 1;
|
||||
data->maxcpus = data->sockets * data->cores * data->threads;
|
||||
|
||||
data2 = g_memdup(data, sizeof(PlugTestData));
|
||||
data2->machine = g_strdup(data->machine);
|
||||
data2->device_model = g_strdup(data->device_model);
|
||||
|
||||
path = g_strdup_printf("cpu-plug/%s/cpu-add/%ux%ux%u&maxcpus=%u",
|
||||
mname, data->sockets, data->cores,
|
||||
data->threads, data->maxcpus);
|
||||
qtest_add_data_func_full(path, data, test_plug_with_cpu_add,
|
||||
test_data_free);
|
||||
g_free(path);
|
||||
|
||||
path = g_strdup_printf("cpu-plug/%s/device-add/%ux%ux%u&maxcpus=%u",
|
||||
mname, data2->sockets, data2->cores,
|
||||
data2->threads, data2->maxcpus);
|
||||
qtest_add_data_func_full(path, data2, test_plug_with_device_add,
|
||||
test_data_free);
|
||||
g_free(path);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
|
||||
qtest_cb_for_every_machine(add_pc_test_case, g_test_quick());
|
||||
} else if (g_str_equal(arch, "ppc64")) {
|
||||
qtest_cb_for_every_machine(add_pseries_test_case, g_test_quick());
|
||||
} else if (g_str_equal(arch, "s390x")) {
|
||||
qtest_cb_for_every_machine(add_s390x_test_case, g_test_quick());
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
382
tests/qtest/dbus-vmstate-test.c
Normal file
382
tests/qtest/dbus-vmstate-test.c
Normal file
|
|
@ -0,0 +1,382 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include <glib/gstdio.h>
|
||||
#include <gio/gio.h>
|
||||
#include "libqtest.h"
|
||||
#include "qemu-common.h"
|
||||
#include "dbus-vmstate1.h"
|
||||
#include "migration-helpers.h"
|
||||
|
||||
static char *workdir;
|
||||
|
||||
typedef struct TestServerId {
|
||||
const char *name;
|
||||
const char *data;
|
||||
size_t size;
|
||||
} TestServerId;
|
||||
|
||||
static const TestServerId idA = {
|
||||
"idA", "I'am\0idA!", sizeof("I'am\0idA!")
|
||||
};
|
||||
|
||||
static const TestServerId idB = {
|
||||
"idB", "I'am\0idB!", sizeof("I'am\0idB!")
|
||||
};
|
||||
|
||||
typedef struct TestServer {
|
||||
const TestServerId *id;
|
||||
bool save_called;
|
||||
bool load_called;
|
||||
} TestServer;
|
||||
|
||||
typedef struct Test {
|
||||
const char *id_list;
|
||||
bool migrate_fail;
|
||||
bool without_dst_b;
|
||||
TestServer srcA;
|
||||
TestServer dstA;
|
||||
TestServer srcB;
|
||||
TestServer dstB;
|
||||
GMainLoop *loop;
|
||||
QTestState *src_qemu;
|
||||
} Test;
|
||||
|
||||
static gboolean
|
||||
vmstate_load(VMState1 *object, GDBusMethodInvocation *invocation,
|
||||
const gchar *arg_data, gpointer user_data)
|
||||
{
|
||||
TestServer *h = user_data;
|
||||
g_autoptr(GVariant) var = NULL;
|
||||
GVariant *args;
|
||||
const uint8_t *data;
|
||||
size_t size;
|
||||
|
||||
args = g_dbus_method_invocation_get_parameters(invocation);
|
||||
var = g_variant_get_child_value(args, 0);
|
||||
data = g_variant_get_fixed_array(var, &size, sizeof(char));
|
||||
g_assert_cmpuint(size, ==, h->id->size);
|
||||
g_assert(!memcmp(data, h->id->data, h->id->size));
|
||||
h->load_called = true;
|
||||
|
||||
g_dbus_method_invocation_return_value(invocation, g_variant_new("()"));
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
static gboolean
|
||||
vmstate_save(VMState1 *object, GDBusMethodInvocation *invocation,
|
||||
gpointer user_data)
|
||||
{
|
||||
TestServer *h = user_data;
|
||||
GVariant *var;
|
||||
|
||||
var = g_variant_new_fixed_array(G_VARIANT_TYPE_BYTE,
|
||||
h->id->data, h->id->size, sizeof(char));
|
||||
g_dbus_method_invocation_return_value(invocation,
|
||||
g_variant_new("(@ay)", var));
|
||||
h->save_called = true;
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
typedef struct WaitNamed {
|
||||
GMainLoop *loop;
|
||||
bool named;
|
||||
} WaitNamed;
|
||||
|
||||
static void
|
||||
named_cb(GDBusConnection *connection,
|
||||
const gchar *name,
|
||||
gpointer user_data)
|
||||
{
|
||||
WaitNamed *t = user_data;
|
||||
|
||||
t->named = true;
|
||||
g_main_loop_quit(t->loop);
|
||||
}
|
||||
|
||||
static GDBusConnection *
|
||||
get_connection(Test *test, guint *ownid)
|
||||
{
|
||||
g_autofree gchar *addr = NULL;
|
||||
WaitNamed *wait;
|
||||
GError *err = NULL;
|
||||
GDBusConnection *c;
|
||||
|
||||
wait = g_new0(WaitNamed, 1);
|
||||
wait->loop = test->loop;
|
||||
addr = g_dbus_address_get_for_bus_sync(G_BUS_TYPE_SESSION, NULL, &err);
|
||||
g_assert_no_error(err);
|
||||
|
||||
c = g_dbus_connection_new_for_address_sync(
|
||||
addr,
|
||||
G_DBUS_CONNECTION_FLAGS_MESSAGE_BUS_CONNECTION |
|
||||
G_DBUS_CONNECTION_FLAGS_AUTHENTICATION_CLIENT,
|
||||
NULL, NULL, &err);
|
||||
g_assert_no_error(err);
|
||||
*ownid = g_bus_own_name_on_connection(c, "org.qemu.VMState1",
|
||||
G_BUS_NAME_OWNER_FLAGS_NONE,
|
||||
named_cb, named_cb, wait, g_free);
|
||||
if (!wait->named) {
|
||||
g_main_loop_run(wait->loop);
|
||||
}
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
static GDBusObjectManagerServer *
|
||||
get_server(GDBusConnection *conn, TestServer *s, const TestServerId *id)
|
||||
{
|
||||
g_autoptr(GDBusObjectSkeleton) sk = NULL;
|
||||
g_autoptr(VMState1Skeleton) v = NULL;
|
||||
GDBusObjectManagerServer *os;
|
||||
|
||||
s->id = id;
|
||||
os = g_dbus_object_manager_server_new("/org/qemu");
|
||||
sk = g_dbus_object_skeleton_new("/org/qemu/VMState1");
|
||||
|
||||
v = VMSTATE1_SKELETON(vmstate1_skeleton_new());
|
||||
g_object_set(v, "id", id->name, NULL);
|
||||
|
||||
g_signal_connect(v, "handle-load", G_CALLBACK(vmstate_load), s);
|
||||
g_signal_connect(v, "handle-save", G_CALLBACK(vmstate_save), s);
|
||||
|
||||
g_dbus_object_skeleton_add_interface(sk, G_DBUS_INTERFACE_SKELETON(v));
|
||||
g_dbus_object_manager_server_export(os, sk);
|
||||
g_dbus_object_manager_server_set_connection(os, conn);
|
||||
|
||||
return os;
|
||||
}
|
||||
|
||||
static void
|
||||
set_id_list(Test *test, QTestState *s)
|
||||
{
|
||||
if (!test->id_list) {
|
||||
return;
|
||||
}
|
||||
|
||||
g_assert(!qmp_rsp_is_err(qtest_qmp(s,
|
||||
"{ 'execute': 'qom-set', 'arguments': "
|
||||
"{ 'path': '/objects/dv', 'property': 'id-list', 'value': %s } }",
|
||||
test->id_list)));
|
||||
}
|
||||
|
||||
static gpointer
|
||||
dbus_vmstate_thread(gpointer data)
|
||||
{
|
||||
GMainLoop *loop = data;
|
||||
|
||||
g_main_loop_run(loop);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void
|
||||
test_dbus_vmstate(Test *test)
|
||||
{
|
||||
g_autofree char *src_qemu_args = NULL;
|
||||
g_autofree char *dst_qemu_args = NULL;
|
||||
g_autoptr(GTestDBus) srcbus = NULL;
|
||||
g_autoptr(GTestDBus) dstbus = NULL;
|
||||
g_autoptr(GDBusConnection) srcconnA = NULL;
|
||||
g_autoptr(GDBusConnection) srcconnB = NULL;
|
||||
g_autoptr(GDBusConnection) dstconnA = NULL;
|
||||
g_autoptr(GDBusConnection) dstconnB = NULL;
|
||||
g_autoptr(GDBusObjectManagerServer) srcserverA = NULL;
|
||||
g_autoptr(GDBusObjectManagerServer) srcserverB = NULL;
|
||||
g_autoptr(GDBusObjectManagerServer) dstserverA = NULL;
|
||||
g_autoptr(GDBusObjectManagerServer) dstserverB = NULL;
|
||||
g_auto(GStrv) srcaddr = NULL;
|
||||
g_auto(GStrv) dstaddr = NULL;
|
||||
g_autoptr(GThread) thread = NULL;
|
||||
g_autoptr(GMainLoop) loop = NULL;
|
||||
g_autofree char *uri = NULL;
|
||||
QTestState *src_qemu = NULL, *dst_qemu = NULL;
|
||||
guint ownsrcA, ownsrcB, owndstA, owndstB;
|
||||
|
||||
uri = g_strdup_printf("unix:%s/migsocket", workdir);
|
||||
|
||||
loop = g_main_loop_new(NULL, FALSE);
|
||||
test->loop = loop;
|
||||
|
||||
srcbus = g_test_dbus_new(G_TEST_DBUS_NONE);
|
||||
g_test_dbus_up(srcbus);
|
||||
srcconnA = get_connection(test, &ownsrcA);
|
||||
srcserverA = get_server(srcconnA, &test->srcA, &idA);
|
||||
srcconnB = get_connection(test, &ownsrcB);
|
||||
srcserverB = get_server(srcconnB, &test->srcB, &idB);
|
||||
|
||||
/* remove ,guid=foo part */
|
||||
srcaddr = g_strsplit(g_test_dbus_get_bus_address(srcbus), ",", 2);
|
||||
src_qemu_args =
|
||||
g_strdup_printf("-object dbus-vmstate,id=dv,addr=%s", srcaddr[0]);
|
||||
|
||||
dstbus = g_test_dbus_new(G_TEST_DBUS_NONE);
|
||||
g_test_dbus_up(dstbus);
|
||||
dstconnA = get_connection(test, &owndstA);
|
||||
dstserverA = get_server(dstconnA, &test->dstA, &idA);
|
||||
if (!test->without_dst_b) {
|
||||
dstconnB = get_connection(test, &owndstB);
|
||||
dstserverB = get_server(dstconnB, &test->dstB, &idB);
|
||||
}
|
||||
|
||||
dstaddr = g_strsplit(g_test_dbus_get_bus_address(dstbus), ",", 2);
|
||||
dst_qemu_args =
|
||||
g_strdup_printf("-object dbus-vmstate,id=dv,addr=%s -incoming %s",
|
||||
dstaddr[0], uri);
|
||||
|
||||
src_qemu = qtest_init(src_qemu_args);
|
||||
dst_qemu = qtest_init(dst_qemu_args);
|
||||
set_id_list(test, src_qemu);
|
||||
set_id_list(test, dst_qemu);
|
||||
|
||||
thread = g_thread_new("dbus-vmstate-thread", dbus_vmstate_thread, loop);
|
||||
|
||||
migrate_qmp(src_qemu, uri, "{}");
|
||||
test->src_qemu = src_qemu;
|
||||
if (test->migrate_fail) {
|
||||
wait_for_migration_fail(src_qemu, true);
|
||||
qtest_set_expected_status(dst_qemu, 1);
|
||||
} else {
|
||||
wait_for_migration_complete(src_qemu);
|
||||
}
|
||||
|
||||
qtest_quit(dst_qemu);
|
||||
qtest_quit(src_qemu);
|
||||
g_bus_unown_name(ownsrcA);
|
||||
g_bus_unown_name(ownsrcB);
|
||||
g_bus_unown_name(owndstA);
|
||||
if (!test->without_dst_b) {
|
||||
g_bus_unown_name(owndstB);
|
||||
}
|
||||
|
||||
g_main_loop_quit(test->loop);
|
||||
}
|
||||
|
||||
static void
|
||||
check_not_migrated(TestServer *s, TestServer *d)
|
||||
{
|
||||
assert(!s->save_called);
|
||||
assert(!s->load_called);
|
||||
assert(!d->save_called);
|
||||
assert(!d->load_called);
|
||||
}
|
||||
|
||||
static void
|
||||
check_migrated(TestServer *s, TestServer *d)
|
||||
{
|
||||
assert(s->save_called);
|
||||
assert(!s->load_called);
|
||||
assert(!d->save_called);
|
||||
assert(d->load_called);
|
||||
}
|
||||
|
||||
static void
|
||||
test_dbus_vmstate_without_list(void)
|
||||
{
|
||||
Test test = { 0, };
|
||||
|
||||
test_dbus_vmstate(&test);
|
||||
|
||||
check_migrated(&test.srcA, &test.dstA);
|
||||
check_migrated(&test.srcB, &test.dstB);
|
||||
}
|
||||
|
||||
static void
|
||||
test_dbus_vmstate_with_list(void)
|
||||
{
|
||||
Test test = { .id_list = "idA,idB" };
|
||||
|
||||
test_dbus_vmstate(&test);
|
||||
|
||||
check_migrated(&test.srcA, &test.dstA);
|
||||
check_migrated(&test.srcB, &test.dstB);
|
||||
}
|
||||
|
||||
static void
|
||||
test_dbus_vmstate_only_a(void)
|
||||
{
|
||||
Test test = { .id_list = "idA" };
|
||||
|
||||
test_dbus_vmstate(&test);
|
||||
|
||||
check_migrated(&test.srcA, &test.dstA);
|
||||
check_not_migrated(&test.srcB, &test.dstB);
|
||||
}
|
||||
|
||||
static void
|
||||
test_dbus_vmstate_missing_src(void)
|
||||
{
|
||||
Test test = { .id_list = "idA,idC", .migrate_fail = true };
|
||||
|
||||
/* run in subprocess to silence QEMU error reporting */
|
||||
if (g_test_subprocess()) {
|
||||
test_dbus_vmstate(&test);
|
||||
check_not_migrated(&test.srcA, &test.dstA);
|
||||
check_not_migrated(&test.srcB, &test.dstB);
|
||||
return;
|
||||
}
|
||||
|
||||
g_test_trap_subprocess(NULL, 0, 0);
|
||||
g_test_trap_assert_passed();
|
||||
}
|
||||
|
||||
static void
|
||||
test_dbus_vmstate_missing_dst(void)
|
||||
{
|
||||
Test test = { .id_list = "idA,idB",
|
||||
.without_dst_b = true,
|
||||
.migrate_fail = true };
|
||||
|
||||
/* run in subprocess to silence QEMU error reporting */
|
||||
if (g_test_subprocess()) {
|
||||
test_dbus_vmstate(&test);
|
||||
assert(test.srcA.save_called);
|
||||
assert(test.srcB.save_called);
|
||||
assert(!test.dstB.save_called);
|
||||
return;
|
||||
}
|
||||
|
||||
g_test_trap_subprocess(NULL, 0, 0);
|
||||
g_test_trap_assert_passed();
|
||||
}
|
||||
|
||||
int
|
||||
main(int argc, char **argv)
|
||||
{
|
||||
GError *err = NULL;
|
||||
g_autofree char *dbus_daemon = NULL;
|
||||
int ret;
|
||||
|
||||
dbus_daemon = g_build_filename(G_STRINGIFY(SRCDIR),
|
||||
"tests",
|
||||
"dbus-vmstate-daemon.sh",
|
||||
NULL);
|
||||
g_setenv("G_TEST_DBUS_DAEMON", dbus_daemon, true);
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
workdir = g_dir_make_tmp("dbus-vmstate-test-XXXXXX", &err);
|
||||
if (!workdir) {
|
||||
g_error("Unable to create temporary dir: %s\n", err->message);
|
||||
exit(1);
|
||||
}
|
||||
|
||||
g_setenv("DBUS_VMSTATE_TEST_TMPDIR", workdir, true);
|
||||
|
||||
qtest_add_func("/dbus-vmstate/without-list",
|
||||
test_dbus_vmstate_without_list);
|
||||
qtest_add_func("/dbus-vmstate/with-list",
|
||||
test_dbus_vmstate_with_list);
|
||||
qtest_add_func("/dbus-vmstate/only-a",
|
||||
test_dbus_vmstate_only_a);
|
||||
qtest_add_func("/dbus-vmstate/missing-src",
|
||||
test_dbus_vmstate_missing_src);
|
||||
qtest_add_func("/dbus-vmstate/missing-dst",
|
||||
test_dbus_vmstate_missing_dst);
|
||||
|
||||
ret = g_test_run();
|
||||
|
||||
rmdir(workdir);
|
||||
g_free(workdir);
|
||||
|
||||
return ret;
|
||||
}
|
||||
12
tests/qtest/dbus-vmstate1.xml
Normal file
12
tests/qtest/dbus-vmstate1.xml
Normal file
|
|
@ -0,0 +1,12 @@
|
|||
<?xml version="1.0"?>
|
||||
<node name="/" xmlns:doc="http://www.freedesktop.org/dbus/1.0/doc.dtd">
|
||||
<interface name="org.qemu.VMState1">
|
||||
<property name="Id" type="s" access="read"/>
|
||||
<method name="Load">
|
||||
<arg type="ay" name="data" direction="in"/>
|
||||
</method>
|
||||
<method name="Save">
|
||||
<arg type="ay" name="data" direction="out"/>
|
||||
</method>
|
||||
</interface>
|
||||
</node>
|
||||
323
tests/qtest/device-introspect-test.c
Normal file
323
tests/qtest/device-introspect-test.c
Normal file
|
|
@ -0,0 +1,323 @@
|
|||
/*
|
||||
* Device introspection test cases
|
||||
*
|
||||
* Copyright (c) 2015 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Markus Armbruster <armbru@redhat.com>,
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Covers QMP device-list-properties and HMP device_add help. We
|
||||
* currently don't check that their output makes sense, only that QEMU
|
||||
* survives. Useful since we've had an astounding number of crash
|
||||
* bugs around here.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu-common.h"
|
||||
#include "qapi/qmp/qstring.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
#include "qapi/qmp/qlist.h"
|
||||
#include "libqtest.h"
|
||||
|
||||
const char common_args[] = "-nodefaults -machine none";
|
||||
|
||||
static QList *qom_list_types(QTestState * qts, const char *implements,
|
||||
bool abstract)
|
||||
{
|
||||
QDict *resp;
|
||||
QList *ret;
|
||||
QDict *args = qdict_new();
|
||||
|
||||
qdict_put_bool(args, "abstract", abstract);
|
||||
if (implements) {
|
||||
qdict_put_str(args, "implements", implements);
|
||||
}
|
||||
resp = qtest_qmp(qts, "{'execute': 'qom-list-types', 'arguments': %p }",
|
||||
args);
|
||||
g_assert(qdict_haskey(resp, "return"));
|
||||
ret = qdict_get_qlist(resp, "return");
|
||||
qobject_ref(ret);
|
||||
qobject_unref(resp);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Build a name -> ObjectTypeInfo index from a ObjectTypeInfo list */
|
||||
static QDict *qom_type_index(QList *types)
|
||||
{
|
||||
QDict *index = qdict_new();
|
||||
QListEntry *e;
|
||||
|
||||
QLIST_FOREACH_ENTRY(types, e) {
|
||||
QDict *d = qobject_to(QDict, qlist_entry_obj(e));
|
||||
const char *name = qdict_get_str(d, "name");
|
||||
qobject_ref(d);
|
||||
qdict_put(index, name, d);
|
||||
}
|
||||
return index;
|
||||
}
|
||||
|
||||
/* Check if @parent is present in the parent chain of @type */
|
||||
static bool qom_has_parent(QDict *index, const char *type, const char *parent)
|
||||
{
|
||||
while (type) {
|
||||
QDict *d = qdict_get_qdict(index, type);
|
||||
const char *p = d && qdict_haskey(d, "parent") ?
|
||||
qdict_get_str(d, "parent") :
|
||||
NULL;
|
||||
|
||||
if (!strcmp(type, parent)) {
|
||||
return true;
|
||||
}
|
||||
|
||||
type = p;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Find an entry on a list returned by qom-list-types */
|
||||
static QDict *type_list_find(QList *types, const char *name)
|
||||
{
|
||||
QListEntry *e;
|
||||
|
||||
QLIST_FOREACH_ENTRY(types, e) {
|
||||
QDict *d = qobject_to(QDict, qlist_entry_obj(e));
|
||||
const char *ename = qdict_get_str(d, "name");
|
||||
if (!strcmp(ename, name)) {
|
||||
return d;
|
||||
}
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static QList *device_type_list(QTestState *qts, bool abstract)
|
||||
{
|
||||
return qom_list_types(qts, "device", abstract);
|
||||
}
|
||||
|
||||
static void test_one_device(QTestState *qts, const char *type)
|
||||
{
|
||||
QDict *resp;
|
||||
char *help;
|
||||
char *qom_tree_start, *qom_tree_end;
|
||||
char *qtree_start, *qtree_end;
|
||||
|
||||
g_test_message("Testing device '%s'", type);
|
||||
|
||||
qom_tree_start = qtest_hmp(qts, "info qom-tree");
|
||||
qtree_start = qtest_hmp(qts, "info qtree");
|
||||
|
||||
resp = qtest_qmp(qts, "{'execute': 'device-list-properties',"
|
||||
" 'arguments': {'typename': %s}}",
|
||||
type);
|
||||
qobject_unref(resp);
|
||||
|
||||
help = qtest_hmp(qts, "device_add \"%s,help\"", type);
|
||||
g_free(help);
|
||||
|
||||
/*
|
||||
* Some devices leave dangling pointers in QOM behind.
|
||||
* "info qom-tree" or "info qtree" have a good chance at crashing then.
|
||||
* Also make sure that the tree did not change.
|
||||
*/
|
||||
qom_tree_end = qtest_hmp(qts, "info qom-tree");
|
||||
g_assert_cmpstr(qom_tree_start, ==, qom_tree_end);
|
||||
g_free(qom_tree_start);
|
||||
g_free(qom_tree_end);
|
||||
|
||||
qtree_end = qtest_hmp(qts, "info qtree");
|
||||
g_assert_cmpstr(qtree_start, ==, qtree_end);
|
||||
g_free(qtree_start);
|
||||
g_free(qtree_end);
|
||||
}
|
||||
|
||||
static void test_device_intro_list(void)
|
||||
{
|
||||
QList *types;
|
||||
char *help;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(common_args);
|
||||
|
||||
types = device_type_list(qts, true);
|
||||
qobject_unref(types);
|
||||
|
||||
help = qtest_hmp(qts, "device_add help");
|
||||
g_free(help);
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
/*
|
||||
* Ensure all entries returned by qom-list-types implements=<parent>
|
||||
* have <parent> as a parent.
|
||||
*/
|
||||
static void test_qom_list_parents(QTestState *qts, const char *parent)
|
||||
{
|
||||
QList *types;
|
||||
QListEntry *e;
|
||||
QDict *index;
|
||||
|
||||
types = qom_list_types(qts, parent, true);
|
||||
index = qom_type_index(types);
|
||||
|
||||
QLIST_FOREACH_ENTRY(types, e) {
|
||||
QDict *d = qobject_to(QDict, qlist_entry_obj(e));
|
||||
const char *name = qdict_get_str(d, "name");
|
||||
|
||||
g_assert(qom_has_parent(index, name, parent));
|
||||
}
|
||||
|
||||
qobject_unref(types);
|
||||
qobject_unref(index);
|
||||
}
|
||||
|
||||
static void test_qom_list_fields(void)
|
||||
{
|
||||
QList *all_types;
|
||||
QList *non_abstract;
|
||||
QListEntry *e;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(common_args);
|
||||
|
||||
all_types = qom_list_types(qts, NULL, true);
|
||||
non_abstract = qom_list_types(qts, NULL, false);
|
||||
|
||||
QLIST_FOREACH_ENTRY(all_types, e) {
|
||||
QDict *d = qobject_to(QDict, qlist_entry_obj(e));
|
||||
const char *name = qdict_get_str(d, "name");
|
||||
bool abstract = qdict_haskey(d, "abstract") ?
|
||||
qdict_get_bool(d, "abstract") :
|
||||
false;
|
||||
bool expected_abstract = !type_list_find(non_abstract, name);
|
||||
|
||||
g_assert(abstract == expected_abstract);
|
||||
}
|
||||
|
||||
test_qom_list_parents(qts, "object");
|
||||
test_qom_list_parents(qts, "device");
|
||||
test_qom_list_parents(qts, "sys-bus-device");
|
||||
|
||||
qobject_unref(all_types);
|
||||
qobject_unref(non_abstract);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_device_intro_none(void)
|
||||
{
|
||||
QTestState *qts = qtest_init(common_args);
|
||||
|
||||
test_one_device(qts, "nonexistent");
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_device_intro_abstract(void)
|
||||
{
|
||||
QTestState *qts = qtest_init(common_args);
|
||||
|
||||
test_one_device(qts, "device");
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_device_intro_concrete(const void *args)
|
||||
{
|
||||
QList *types;
|
||||
QListEntry *entry;
|
||||
const char *type;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(args);
|
||||
types = device_type_list(qts, false);
|
||||
|
||||
QLIST_FOREACH_ENTRY(types, entry) {
|
||||
type = qdict_get_try_str(qobject_to(QDict, qlist_entry_obj(entry)),
|
||||
"name");
|
||||
g_assert(type);
|
||||
test_one_device(qts, type);
|
||||
}
|
||||
|
||||
qobject_unref(types);
|
||||
qtest_quit(qts);
|
||||
g_free((void *)args);
|
||||
}
|
||||
|
||||
static void test_abstract_interfaces(void)
|
||||
{
|
||||
QList *all_types;
|
||||
QListEntry *e;
|
||||
QDict *index;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_init(common_args);
|
||||
|
||||
all_types = qom_list_types(qts, "interface", true);
|
||||
index = qom_type_index(all_types);
|
||||
|
||||
QLIST_FOREACH_ENTRY(all_types, e) {
|
||||
QDict *d = qobject_to(QDict, qlist_entry_obj(e));
|
||||
const char *name = qdict_get_str(d, "name");
|
||||
|
||||
/*
|
||||
* qom-list-types implements=interface returns all types
|
||||
* that implement _any_ interface (not just interface
|
||||
* types), so skip the ones that don't have "interface"
|
||||
* on the parent type chain.
|
||||
*/
|
||||
if (!qom_has_parent(index, name, "interface")) {
|
||||
/* Not an interface type */
|
||||
continue;
|
||||
}
|
||||
|
||||
g_assert(qdict_haskey(d, "abstract") && qdict_get_bool(d, "abstract"));
|
||||
}
|
||||
|
||||
qobject_unref(all_types);
|
||||
qobject_unref(index);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void add_machine_test_case(const char *mname)
|
||||
{
|
||||
char *path, *args;
|
||||
|
||||
/* Ignore blacklisted machines */
|
||||
if (g_str_equal("xenfv", mname) || g_str_equal("xenpv", mname)) {
|
||||
return;
|
||||
}
|
||||
|
||||
path = g_strdup_printf("device/introspect/concrete/defaults/%s", mname);
|
||||
args = g_strdup_printf("-M %s", mname);
|
||||
qtest_add_data_func(path, args, test_device_intro_concrete);
|
||||
g_free(path);
|
||||
|
||||
path = g_strdup_printf("device/introspect/concrete/nodefaults/%s", mname);
|
||||
args = g_strdup_printf("-nodefaults -M %s", mname);
|
||||
qtest_add_data_func(path, args, test_device_intro_concrete);
|
||||
g_free(path);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
qtest_add_func("device/introspect/list", test_device_intro_list);
|
||||
qtest_add_func("device/introspect/list-fields", test_qom_list_fields);
|
||||
qtest_add_func("device/introspect/none", test_device_intro_none);
|
||||
qtest_add_func("device/introspect/abstract", test_device_intro_abstract);
|
||||
qtest_add_func("device/introspect/abstract-interfaces", test_abstract_interfaces);
|
||||
if (g_test_quick()) {
|
||||
qtest_add_data_func("device/introspect/concrete/defaults/none",
|
||||
g_strdup(common_args), test_device_intro_concrete);
|
||||
} else {
|
||||
qtest_cb_for_every_machine(add_machine_test_case, true);
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
178
tests/qtest/device-plug-test.c
Normal file
178
tests/qtest/device-plug-test.c
Normal file
|
|
@ -0,0 +1,178 @@
|
|||
/*
|
||||
* QEMU device plug/unplug handling
|
||||
*
|
||||
* Copyright (C) 2019 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* David Hildenbrand <david@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
#include "qapi/qmp/qstring.h"
|
||||
|
||||
static void device_del_start(QTestState *qtest, const char *id)
|
||||
{
|
||||
qtest_qmp_send(qtest,
|
||||
"{'execute': 'device_del', 'arguments': { 'id': %s } }", id);
|
||||
}
|
||||
|
||||
static void device_del_finish(QTestState *qtest)
|
||||
{
|
||||
QDict *resp = qtest_qmp_receive(qtest);
|
||||
|
||||
g_assert(qdict_haskey(resp, "return"));
|
||||
qobject_unref(resp);
|
||||
}
|
||||
|
||||
static void device_del_request(QTestState *qtest, const char *id)
|
||||
{
|
||||
device_del_start(qtest, id);
|
||||
device_del_finish(qtest);
|
||||
}
|
||||
|
||||
static void system_reset(QTestState *qtest)
|
||||
{
|
||||
QDict *resp;
|
||||
|
||||
resp = qtest_qmp(qtest, "{'execute': 'system_reset'}");
|
||||
g_assert(qdict_haskey(resp, "return"));
|
||||
qobject_unref(resp);
|
||||
}
|
||||
|
||||
static void wait_device_deleted_event(QTestState *qtest, const char *id)
|
||||
{
|
||||
QDict *resp, *data;
|
||||
QString *qstr;
|
||||
|
||||
/*
|
||||
* Other devices might get removed along with the removed device. Skip
|
||||
* these. The device of interest will be the last one.
|
||||
*/
|
||||
for (;;) {
|
||||
resp = qtest_qmp_eventwait_ref(qtest, "DEVICE_DELETED");
|
||||
data = qdict_get_qdict(resp, "data");
|
||||
if (!data || !qdict_get(data, "device")) {
|
||||
qobject_unref(resp);
|
||||
continue;
|
||||
}
|
||||
qstr = qobject_to(QString, qdict_get(data, "device"));
|
||||
g_assert(qstr);
|
||||
if (!strcmp(qstring_get_str(qstr), id)) {
|
||||
qobject_unref(resp);
|
||||
break;
|
||||
}
|
||||
qobject_unref(resp);
|
||||
}
|
||||
}
|
||||
|
||||
static void test_pci_unplug_request(void)
|
||||
{
|
||||
QTestState *qtest = qtest_initf("-device virtio-mouse-pci,id=dev0");
|
||||
|
||||
/*
|
||||
* Request device removal. As the guest is not running, the request won't
|
||||
* be processed. However during system reset, the removal will be
|
||||
* handled, removing the device.
|
||||
*/
|
||||
device_del_request(qtest, "dev0");
|
||||
system_reset(qtest);
|
||||
wait_device_deleted_event(qtest, "dev0");
|
||||
|
||||
qtest_quit(qtest);
|
||||
}
|
||||
|
||||
static void test_ccw_unplug(void)
|
||||
{
|
||||
QTestState *qtest = qtest_initf("-device virtio-balloon-ccw,id=dev0");
|
||||
|
||||
/*
|
||||
* The DEVICE_DELETED events will be sent before the command
|
||||
* completes.
|
||||
*/
|
||||
device_del_start(qtest, "dev0");
|
||||
wait_device_deleted_event(qtest, "dev0");
|
||||
device_del_finish(qtest);
|
||||
|
||||
qtest_quit(qtest);
|
||||
}
|
||||
|
||||
static void test_spapr_cpu_unplug_request(void)
|
||||
{
|
||||
QTestState *qtest;
|
||||
|
||||
qtest = qtest_initf("-cpu power9_v2.0 -smp 1,maxcpus=2 "
|
||||
"-device power9_v2.0-spapr-cpu-core,core-id=1,id=dev0");
|
||||
|
||||
/* similar to test_pci_unplug_request */
|
||||
device_del_request(qtest, "dev0");
|
||||
system_reset(qtest);
|
||||
wait_device_deleted_event(qtest, "dev0");
|
||||
|
||||
qtest_quit(qtest);
|
||||
}
|
||||
|
||||
static void test_spapr_memory_unplug_request(void)
|
||||
{
|
||||
QTestState *qtest;
|
||||
|
||||
qtest = qtest_initf("-m 256M,slots=1,maxmem=768M "
|
||||
"-object memory-backend-ram,id=mem0,size=512M "
|
||||
"-device pc-dimm,id=dev0,memdev=mem0");
|
||||
|
||||
/* similar to test_pci_unplug_request */
|
||||
device_del_request(qtest, "dev0");
|
||||
system_reset(qtest);
|
||||
wait_device_deleted_event(qtest, "dev0");
|
||||
|
||||
qtest_quit(qtest);
|
||||
}
|
||||
|
||||
static void test_spapr_phb_unplug_request(void)
|
||||
{
|
||||
QTestState *qtest;
|
||||
|
||||
qtest = qtest_initf("-device spapr-pci-host-bridge,index=1,id=dev0");
|
||||
|
||||
/* similar to test_pci_unplug_request */
|
||||
device_del_request(qtest, "dev0");
|
||||
system_reset(qtest);
|
||||
wait_device_deleted_event(qtest, "dev0");
|
||||
|
||||
qtest_quit(qtest);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
/*
|
||||
* We need a system that will process unplug requests during system resets
|
||||
* and does not do PCI surprise removal. This holds for x86 ACPI,
|
||||
* s390x and spapr.
|
||||
*/
|
||||
qtest_add_func("/device-plug/pci-unplug-request",
|
||||
test_pci_unplug_request);
|
||||
|
||||
if (!strcmp(arch, "s390x")) {
|
||||
qtest_add_func("/device-plug/ccw-unplug",
|
||||
test_ccw_unplug);
|
||||
}
|
||||
|
||||
if (!strcmp(arch, "ppc64")) {
|
||||
qtest_add_func("/device-plug/spapr-cpu-unplug-request",
|
||||
test_spapr_cpu_unplug_request);
|
||||
qtest_add_func("/device-plug/spapr-memory-unplug-request",
|
||||
test_spapr_memory_unplug_request);
|
||||
qtest_add_func("/device-plug/spapr-phb-unplug-request",
|
||||
test_spapr_phb_unplug_request);
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
69
tests/qtest/display-vga-test.c
Normal file
69
tests/qtest/display-vga-test.c
Normal file
|
|
@ -0,0 +1,69 @@
|
|||
/*
|
||||
* QTest testcase for vga cards
|
||||
*
|
||||
* Copyright (c) 2014 Red Hat, Inc
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest-single.h"
|
||||
|
||||
static void pci_cirrus(void)
|
||||
{
|
||||
qtest_start("-vga none -device cirrus-vga");
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
static void pci_stdvga(void)
|
||||
{
|
||||
qtest_start("-vga none -device VGA");
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
static void pci_secondary(void)
|
||||
{
|
||||
qtest_start("-vga none -device secondary-vga");
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
static void pci_multihead(void)
|
||||
{
|
||||
qtest_start("-vga none -device VGA -device secondary-vga");
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
static void pci_virtio_gpu(void)
|
||||
{
|
||||
qtest_start("-vga none -device virtio-gpu-pci");
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
static void pci_virtio_vga(void)
|
||||
{
|
||||
qtest_start("-vga none -device virtio-vga");
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
if (strcmp(arch, "alpha") == 0 || strcmp(arch, "i386") == 0 ||
|
||||
strcmp(arch, "mips") == 0 || strcmp(arch, "x86_64") == 0) {
|
||||
qtest_add_func("/display/pci/cirrus", pci_cirrus);
|
||||
}
|
||||
qtest_add_func("/display/pci/stdvga", pci_stdvga);
|
||||
qtest_add_func("/display/pci/secondary", pci_secondary);
|
||||
qtest_add_func("/display/pci/multihead", pci_multihead);
|
||||
qtest_add_func("/display/pci/virtio-gpu", pci_virtio_gpu);
|
||||
if (g_str_equal(arch, "i386") || g_str_equal(arch, "x86_64") ||
|
||||
g_str_equal(arch, "hppa") || g_str_equal(arch, "ppc64")) {
|
||||
qtest_add_func("/display/pci/virtio-vga", pci_virtio_vga);
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
154
tests/qtest/drive_del-test.c
Normal file
154
tests/qtest/drive_del-test.c
Normal file
|
|
@ -0,0 +1,154 @@
|
|||
/*
|
||||
* blockdev.c test cases
|
||||
*
|
||||
* Copyright (C) 2013-2014 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Stefan Hajnoczi <stefanha@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
|
||||
* See the COPYING.LIB file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/virtio.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
|
||||
/* TODO actually test the results and get rid of this */
|
||||
#define qmp_discard_response(q, ...) qobject_unref(qtest_qmp(q, __VA_ARGS__))
|
||||
|
||||
static void drive_add(QTestState *qts)
|
||||
{
|
||||
char *resp = qtest_hmp(qts, "drive_add 0 if=none,id=drive0");
|
||||
|
||||
g_assert_cmpstr(resp, ==, "OK\r\n");
|
||||
g_free(resp);
|
||||
}
|
||||
|
||||
static void drive_del(QTestState *qts)
|
||||
{
|
||||
char *resp = qtest_hmp(qts, "drive_del drive0");
|
||||
|
||||
g_assert_cmpstr(resp, ==, "");
|
||||
g_free(resp);
|
||||
}
|
||||
|
||||
static void device_del(QTestState *qts)
|
||||
{
|
||||
QDict *response;
|
||||
|
||||
/* Complication: ignore DEVICE_DELETED event */
|
||||
qmp_discard_response(qts, "{'execute': 'device_del',"
|
||||
" 'arguments': { 'id': 'dev0' } }");
|
||||
response = qtest_qmp_receive(qts);
|
||||
g_assert(response);
|
||||
g_assert(qdict_haskey(response, "return"));
|
||||
qobject_unref(response);
|
||||
}
|
||||
|
||||
static void test_drive_without_dev(void)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
/* Start with an empty drive */
|
||||
qts = qtest_init("-drive if=none,id=drive0");
|
||||
|
||||
/* Delete the drive */
|
||||
drive_del(qts);
|
||||
|
||||
/* Ensure re-adding the drive works - there should be no duplicate ID error
|
||||
* because the old drive must be gone.
|
||||
*/
|
||||
drive_add(qts);
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
/*
|
||||
* qvirtio_get_dev_type:
|
||||
* Returns: the preferred virtio bus/device type for the current architecture.
|
||||
* TODO: delete this
|
||||
*/
|
||||
static const char *qvirtio_get_dev_type(void)
|
||||
{
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
if (g_str_equal(arch, "arm") || g_str_equal(arch, "aarch64")) {
|
||||
return "device"; /* for virtio-mmio */
|
||||
} else if (g_str_equal(arch, "s390x")) {
|
||||
return "ccw";
|
||||
} else {
|
||||
return "pci";
|
||||
}
|
||||
}
|
||||
|
||||
static void test_after_failed_device_add(void)
|
||||
{
|
||||
char driver[32];
|
||||
QDict *response;
|
||||
QTestState *qts;
|
||||
|
||||
snprintf(driver, sizeof(driver), "virtio-blk-%s",
|
||||
qvirtio_get_dev_type());
|
||||
|
||||
qts = qtest_init("-drive if=none,id=drive0");
|
||||
|
||||
/* Make device_add fail. If this leaks the virtio-blk device then a
|
||||
* reference to drive0 will also be held (via qdev properties).
|
||||
*/
|
||||
response = qtest_qmp(qts, "{'execute': 'device_add',"
|
||||
" 'arguments': {"
|
||||
" 'driver': %s,"
|
||||
" 'drive': 'drive0'"
|
||||
"}}", driver);
|
||||
g_assert(response);
|
||||
qmp_assert_error_class(response, "GenericError");
|
||||
|
||||
/* Delete the drive */
|
||||
drive_del(qts);
|
||||
|
||||
/* Try to re-add the drive. This fails with duplicate IDs if a leaked
|
||||
* virtio-blk device exists that holds a reference to the old drive0.
|
||||
*/
|
||||
drive_add(qts);
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_drive_del_device_del(void)
|
||||
{
|
||||
QTestState *qts;
|
||||
|
||||
/* Start with a drive used by a device that unplugs instantaneously */
|
||||
qts = qtest_initf("-drive if=none,id=drive0,file=null-co://,"
|
||||
"file.read-zeroes=on,format=raw"
|
||||
" -device virtio-scsi-%s"
|
||||
" -device scsi-hd,drive=drive0,id=dev0",
|
||||
qvirtio_get_dev_type());
|
||||
|
||||
/*
|
||||
* Delete the drive, and then the device
|
||||
* Doing it in this order takes notoriously tricky special paths
|
||||
*/
|
||||
drive_del(qts);
|
||||
device_del(qts);
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
qtest_add_func("/drive_del/without-dev", test_drive_without_dev);
|
||||
|
||||
if (qvirtio_get_dev_type() != NULL) {
|
||||
qtest_add_func("/drive_del/after_failed_device_add",
|
||||
test_after_failed_device_add);
|
||||
qtest_add_func("/blockdev/drive_del_device_del",
|
||||
test_drive_del_device_del);
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
58
tests/qtest/ds1338-test.c
Normal file
58
tests/qtest/ds1338-test.c
Normal file
|
|
@ -0,0 +1,58 @@
|
|||
/*
|
||||
* QTest testcase for the DS1338 RTC
|
||||
*
|
||||
* Copyright (c) 2013 Jean-Christophe Dubois
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/i2c.h"
|
||||
|
||||
#define DS1338_ADDR 0x68
|
||||
|
||||
static inline uint8_t bcd2bin(uint8_t x)
|
||||
{
|
||||
return ((x) & 0x0f) + ((x) >> 4) * 10;
|
||||
}
|
||||
|
||||
static void send_and_receive(void *obj, void *data, QGuestAllocator *alloc)
|
||||
{
|
||||
QI2CDevice *i2cdev = (QI2CDevice *)obj;
|
||||
|
||||
uint8_t resp[7];
|
||||
time_t now = time(NULL);
|
||||
struct tm *tm_ptr = gmtime(&now);
|
||||
|
||||
i2c_read_block(i2cdev, 0, resp, sizeof(resp));
|
||||
|
||||
/* check retrieved time againt local time */
|
||||
g_assert_cmpuint(bcd2bin(resp[4]), == , tm_ptr->tm_mday);
|
||||
g_assert_cmpuint(bcd2bin(resp[5]), == , 1 + tm_ptr->tm_mon);
|
||||
g_assert_cmpuint(2000 + bcd2bin(resp[6]), == , 1900 + tm_ptr->tm_year);
|
||||
}
|
||||
|
||||
static void ds1338_register_nodes(void)
|
||||
{
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "address=0x68"
|
||||
};
|
||||
add_qi2c_address(&opts, &(QI2CAddress) { DS1338_ADDR });
|
||||
|
||||
qos_node_create_driver("ds1338", i2c_device_create);
|
||||
qos_node_consumes("ds1338", "i2c-bus", &opts);
|
||||
qos_add_test("tx-rx", "ds1338", send_and_receive, NULL);
|
||||
}
|
||||
libqos_init(ds1338_register_nodes);
|
||||
68
tests/qtest/e1000-test.c
Normal file
68
tests/qtest/e1000-test.c
Normal file
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* QTest testcase for e1000 NIC
|
||||
*
|
||||
* Copyright (c) 2013-2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/pci.h"
|
||||
|
||||
typedef struct QE1000 QE1000;
|
||||
|
||||
struct QE1000 {
|
||||
QOSGraphObject obj;
|
||||
QPCIDevice dev;
|
||||
};
|
||||
|
||||
static const char *models[] = {
|
||||
"e1000",
|
||||
"e1000-82540em",
|
||||
"e1000-82544gc",
|
||||
"e1000-82545em",
|
||||
};
|
||||
|
||||
static void *e1000_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QE1000 *e1000 = obj;
|
||||
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return &e1000->dev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in e1000e\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *e1000_create(void *pci_bus, QGuestAllocator *alloc, void *addr)
|
||||
{
|
||||
QE1000 *e1000 = g_new0(QE1000, 1);
|
||||
QPCIBus *bus = pci_bus;
|
||||
|
||||
qpci_device_init(&e1000->dev, bus, addr);
|
||||
e1000->obj.get_driver = e1000_get_driver;
|
||||
|
||||
return &e1000->obj;
|
||||
}
|
||||
|
||||
static void e1000_register_nodes(void)
|
||||
{
|
||||
int i;
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "addr=04.0",
|
||||
};
|
||||
add_qpci_address(&opts, &(QPCIAddress) { .devfn = QPCI_DEVFN(4, 0) });
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(models); i++) {
|
||||
qos_node_create_driver(models[i], e1000_create);
|
||||
qos_node_consumes(models[i], "pci-bus", &opts);
|
||||
qos_node_produces(models[i], "pci-device");
|
||||
}
|
||||
}
|
||||
|
||||
libqos_init(e1000_register_nodes);
|
||||
279
tests/qtest/e1000e-test.c
Normal file
279
tests/qtest/e1000e-test.c
Normal file
|
|
@ -0,0 +1,279 @@
|
|||
/*
|
||||
* QTest testcase for e1000e NIC
|
||||
*
|
||||
* Copyright (c) 2015 Ravello Systems LTD (http://ravellosystems.com)
|
||||
* Developed by Daynix Computing LTD (http://www.daynix.com)
|
||||
*
|
||||
* Authors:
|
||||
* Dmitry Fleytman <dmitry@daynix.com>
|
||||
* Leonid Bloch <leonid@daynix.com>
|
||||
* Yan Vugenfirer <yan@daynix.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu-common.h"
|
||||
#include "libqtest-single.h"
|
||||
#include "qemu-common.h"
|
||||
#include "libqos/pci-pc.h"
|
||||
#include "qemu/sockets.h"
|
||||
#include "qemu/iov.h"
|
||||
#include "qemu/module.h"
|
||||
#include "qemu/bitops.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/e1000e.h"
|
||||
|
||||
static void e1000e_send_verify(QE1000E *d, int *test_sockets, QGuestAllocator *alloc)
|
||||
{
|
||||
struct {
|
||||
uint64_t buffer_addr;
|
||||
union {
|
||||
uint32_t data;
|
||||
struct {
|
||||
uint16_t length;
|
||||
uint8_t cso;
|
||||
uint8_t cmd;
|
||||
} flags;
|
||||
} lower;
|
||||
union {
|
||||
uint32_t data;
|
||||
struct {
|
||||
uint8_t status;
|
||||
uint8_t css;
|
||||
uint16_t special;
|
||||
} fields;
|
||||
} upper;
|
||||
} descr;
|
||||
|
||||
static const uint32_t dtyp_data = BIT(20);
|
||||
static const uint32_t dtyp_ext = BIT(29);
|
||||
static const uint32_t dcmd_rs = BIT(27);
|
||||
static const uint32_t dcmd_eop = BIT(24);
|
||||
static const uint32_t dsta_dd = BIT(0);
|
||||
static const int data_len = 64;
|
||||
char buffer[64];
|
||||
int ret;
|
||||
uint32_t recv_len;
|
||||
|
||||
/* Prepare test data buffer */
|
||||
uint64_t data = guest_alloc(alloc, data_len);
|
||||
memwrite(data, "TEST", 5);
|
||||
|
||||
/* Prepare TX descriptor */
|
||||
memset(&descr, 0, sizeof(descr));
|
||||
descr.buffer_addr = cpu_to_le64(data);
|
||||
descr.lower.data = cpu_to_le32(dcmd_rs |
|
||||
dcmd_eop |
|
||||
dtyp_ext |
|
||||
dtyp_data |
|
||||
data_len);
|
||||
|
||||
/* Put descriptor to the ring */
|
||||
e1000e_tx_ring_push(d, &descr);
|
||||
|
||||
/* Wait for TX WB interrupt */
|
||||
e1000e_wait_isr(d, E1000E_TX0_MSG_ID);
|
||||
|
||||
/* Check DD bit */
|
||||
g_assert_cmphex(le32_to_cpu(descr.upper.data) & dsta_dd, ==, dsta_dd);
|
||||
|
||||
/* Check data sent to the backend */
|
||||
ret = qemu_recv(test_sockets[0], &recv_len, sizeof(recv_len), 0);
|
||||
g_assert_cmpint(ret, == , sizeof(recv_len));
|
||||
qemu_recv(test_sockets[0], buffer, 64, 0);
|
||||
g_assert_cmpstr(buffer, == , "TEST");
|
||||
|
||||
/* Free test data buffer */
|
||||
guest_free(alloc, data);
|
||||
}
|
||||
|
||||
static void e1000e_receive_verify(QE1000E *d, int *test_sockets, QGuestAllocator *alloc)
|
||||
{
|
||||
union {
|
||||
struct {
|
||||
uint64_t buffer_addr;
|
||||
uint64_t reserved;
|
||||
} read;
|
||||
struct {
|
||||
struct {
|
||||
uint32_t mrq;
|
||||
union {
|
||||
uint32_t rss;
|
||||
struct {
|
||||
uint16_t ip_id;
|
||||
uint16_t csum;
|
||||
} csum_ip;
|
||||
} hi_dword;
|
||||
} lower;
|
||||
struct {
|
||||
uint32_t status_error;
|
||||
uint16_t length;
|
||||
uint16_t vlan;
|
||||
} upper;
|
||||
} wb;
|
||||
} descr;
|
||||
|
||||
static const uint32_t esta_dd = BIT(0);
|
||||
|
||||
char test[] = "TEST";
|
||||
int len = htonl(sizeof(test));
|
||||
struct iovec iov[] = {
|
||||
{
|
||||
.iov_base = &len,
|
||||
.iov_len = sizeof(len),
|
||||
},{
|
||||
.iov_base = test,
|
||||
.iov_len = sizeof(test),
|
||||
},
|
||||
};
|
||||
|
||||
static const int data_len = 64;
|
||||
char buffer[64];
|
||||
int ret;
|
||||
|
||||
/* Send a dummy packet to device's socket*/
|
||||
ret = iov_send(test_sockets[0], iov, 2, 0, sizeof(len) + sizeof(test));
|
||||
g_assert_cmpint(ret, == , sizeof(test) + sizeof(len));
|
||||
|
||||
/* Prepare test data buffer */
|
||||
uint64_t data = guest_alloc(alloc, data_len);
|
||||
|
||||
/* Prepare RX descriptor */
|
||||
memset(&descr, 0, sizeof(descr));
|
||||
descr.read.buffer_addr = cpu_to_le64(data);
|
||||
|
||||
/* Put descriptor to the ring */
|
||||
e1000e_rx_ring_push(d, &descr);
|
||||
|
||||
/* Wait for TX WB interrupt */
|
||||
e1000e_wait_isr(d, E1000E_RX0_MSG_ID);
|
||||
|
||||
/* Check DD bit */
|
||||
g_assert_cmphex(le32_to_cpu(descr.wb.upper.status_error) &
|
||||
esta_dd, ==, esta_dd);
|
||||
|
||||
/* Check data sent to the backend */
|
||||
memread(data, buffer, sizeof(buffer));
|
||||
g_assert_cmpstr(buffer, == , "TEST");
|
||||
|
||||
/* Free test data buffer */
|
||||
guest_free(alloc, data);
|
||||
}
|
||||
|
||||
static void test_e1000e_init(void *obj, void *data, QGuestAllocator * alloc)
|
||||
{
|
||||
/* init does nothing */
|
||||
}
|
||||
|
||||
static void test_e1000e_tx(void *obj, void *data, QGuestAllocator * alloc)
|
||||
{
|
||||
QE1000E_PCI *e1000e = obj;
|
||||
QE1000E *d = &e1000e->e1000e;
|
||||
QOSGraphObject *e_object = obj;
|
||||
QPCIDevice *dev = e_object->get_driver(e_object, "pci-device");
|
||||
|
||||
/* FIXME: add spapr support */
|
||||
if (qpci_check_buggy_msi(dev)) {
|
||||
return;
|
||||
}
|
||||
|
||||
e1000e_send_verify(d, data, alloc);
|
||||
}
|
||||
|
||||
static void test_e1000e_rx(void *obj, void *data, QGuestAllocator * alloc)
|
||||
{
|
||||
QE1000E_PCI *e1000e = obj;
|
||||
QE1000E *d = &e1000e->e1000e;
|
||||
QOSGraphObject *e_object = obj;
|
||||
QPCIDevice *dev = e_object->get_driver(e_object, "pci-device");
|
||||
|
||||
/* FIXME: add spapr support */
|
||||
if (qpci_check_buggy_msi(dev)) {
|
||||
return;
|
||||
}
|
||||
|
||||
e1000e_receive_verify(d, data, alloc);
|
||||
}
|
||||
|
||||
static void test_e1000e_multiple_transfers(void *obj, void *data,
|
||||
QGuestAllocator *alloc)
|
||||
{
|
||||
static const long iterations = 4 * 1024;
|
||||
long i;
|
||||
|
||||
QE1000E_PCI *e1000e = obj;
|
||||
QE1000E *d = &e1000e->e1000e;
|
||||
QOSGraphObject *e_object = obj;
|
||||
QPCIDevice *dev = e_object->get_driver(e_object, "pci-device");
|
||||
|
||||
/* FIXME: add spapr support */
|
||||
if (qpci_check_buggy_msi(dev)) {
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < iterations; i++) {
|
||||
e1000e_send_verify(d, data, alloc);
|
||||
e1000e_receive_verify(d, data, alloc);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static void test_e1000e_hotplug(void *obj, void *data, QGuestAllocator * alloc)
|
||||
{
|
||||
QTestState *qts = global_qtest; /* TODO: get rid of global_qtest here */
|
||||
|
||||
qtest_qmp_device_add(qts, "e1000e", "e1000e_net", "{'addr': '0x06'}");
|
||||
qpci_unplug_acpi_device_test(qts, "e1000e_net", 0x06);
|
||||
}
|
||||
|
||||
static void data_test_clear(void *sockets)
|
||||
{
|
||||
int *test_sockets = sockets;
|
||||
|
||||
close(test_sockets[0]);
|
||||
qos_invalidate_command_line();
|
||||
close(test_sockets[1]);
|
||||
g_free(test_sockets);
|
||||
}
|
||||
|
||||
static void *data_test_init(GString *cmd_line, void *arg)
|
||||
{
|
||||
int *test_sockets = g_new(int, 2);
|
||||
int ret = socketpair(PF_UNIX, SOCK_STREAM, 0, test_sockets);
|
||||
g_assert_cmpint(ret, != , -1);
|
||||
|
||||
g_string_append_printf(cmd_line, " -netdev socket,fd=%d,id=hs0 ",
|
||||
test_sockets[1]);
|
||||
|
||||
g_test_queue_destroy(data_test_clear, test_sockets);
|
||||
return test_sockets;
|
||||
}
|
||||
|
||||
static void register_e1000e_test(void)
|
||||
{
|
||||
QOSGraphTestOptions opts = {
|
||||
.before = data_test_init,
|
||||
};
|
||||
|
||||
qos_add_test("init", "e1000e", test_e1000e_init, &opts);
|
||||
qos_add_test("tx", "e1000e", test_e1000e_tx, &opts);
|
||||
qos_add_test("rx", "e1000e", test_e1000e_rx, &opts);
|
||||
qos_add_test("multiple_transfers", "e1000e",
|
||||
test_e1000e_multiple_transfers, &opts);
|
||||
qos_add_test("hotplug", "e1000e", test_e1000e_hotplug, &opts);
|
||||
}
|
||||
|
||||
libqos_init(register_e1000e_test);
|
||||
77
tests/qtest/eepro100-test.c
Normal file
77
tests/qtest/eepro100-test.c
Normal file
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
* QTest testcase for eepro100 NIC
|
||||
*
|
||||
* Copyright (c) 2013-2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/pci.h"
|
||||
|
||||
typedef struct QEEPRO100 QEEPRO100;
|
||||
|
||||
struct QEEPRO100 {
|
||||
QOSGraphObject obj;
|
||||
QPCIDevice dev;
|
||||
};
|
||||
|
||||
static const char *models[] = {
|
||||
"i82550",
|
||||
"i82551",
|
||||
"i82557a",
|
||||
"i82557b",
|
||||
"i82557c",
|
||||
"i82558a",
|
||||
"i82558b",
|
||||
"i82559a",
|
||||
"i82559b",
|
||||
"i82559c",
|
||||
"i82559er",
|
||||
"i82562",
|
||||
"i82801",
|
||||
};
|
||||
|
||||
static void *eepro100_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QEEPRO100 *eepro100 = obj;
|
||||
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return &eepro100->dev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in eepro100\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *eepro100_create(void *pci_bus, QGuestAllocator *alloc, void *addr)
|
||||
{
|
||||
QEEPRO100 *eepro100 = g_new0(QEEPRO100, 1);
|
||||
QPCIBus *bus = pci_bus;
|
||||
|
||||
qpci_device_init(&eepro100->dev, bus, addr);
|
||||
eepro100->obj.get_driver = eepro100_get_driver;
|
||||
|
||||
return &eepro100->obj;
|
||||
}
|
||||
|
||||
static void eepro100_register_nodes(void)
|
||||
{
|
||||
int i;
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "addr=04.0",
|
||||
};
|
||||
|
||||
add_qpci_address(&opts, &(QPCIAddress) { .devfn = QPCI_DEVFN(4, 0) });
|
||||
for (i = 0; i < ARRAY_SIZE(models); i++) {
|
||||
qos_node_create_driver(models[i], eepro100_create);
|
||||
qos_node_consumes(models[i], "pci-bus", &opts);
|
||||
qos_node_produces(models[i], "pci-device");
|
||||
}
|
||||
}
|
||||
|
||||
libqos_init(eepro100_register_nodes);
|
||||
306
tests/qtest/endianness-test.c
Normal file
306
tests/qtest/endianness-test.c
Normal file
|
|
@ -0,0 +1,306 @@
|
|||
/*
|
||||
* QTest testcase for ISA endianness
|
||||
*
|
||||
* Copyright Red Hat, Inc. 2012
|
||||
*
|
||||
* Authors:
|
||||
* Paolo Bonzini <pbonzini@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
|
||||
#include "libqtest.h"
|
||||
#include "qemu/bswap.h"
|
||||
|
||||
typedef struct TestCase TestCase;
|
||||
struct TestCase {
|
||||
const char *arch;
|
||||
const char *machine;
|
||||
uint64_t isa_base;
|
||||
bool bswap;
|
||||
const char *superio;
|
||||
};
|
||||
|
||||
static const TestCase test_cases[] = {
|
||||
{ "i386", "pc", -1 },
|
||||
{ "mips", "mips", 0x14000000, .bswap = true },
|
||||
{ "mips", "malta", 0x10000000, .bswap = true },
|
||||
{ "mips64", "magnum", 0x90000000, .bswap = true },
|
||||
{ "mips64", "pica61", 0x90000000, .bswap = true },
|
||||
{ "mips64", "mips", 0x14000000, .bswap = true },
|
||||
{ "mips64", "malta", 0x10000000, .bswap = true },
|
||||
{ "mips64el", "fulong2e", 0x1fd00000 },
|
||||
{ "ppc", "g3beige", 0xfe000000, .bswap = true, .superio = "i82378" },
|
||||
{ "ppc", "prep", 0x80000000, .bswap = true },
|
||||
{ "ppc", "bamboo", 0xe8000000, .bswap = true, .superio = "i82378" },
|
||||
{ "ppc64", "mac99", 0xf2000000, .bswap = true, .superio = "i82378" },
|
||||
{ "ppc64", "pseries", (1ULL << 45), .bswap = true, .superio = "i82378" },
|
||||
{ "ppc64", "pseries-2.7", 0x10080000000ULL,
|
||||
.bswap = true, .superio = "i82378" },
|
||||
{ "sh4", "r2d", 0xfe240000, .superio = "i82378" },
|
||||
{ "sh4eb", "r2d", 0xfe240000, .bswap = true, .superio = "i82378" },
|
||||
{ "sparc64", "sun4u", 0x1fe02000000LL, .bswap = true },
|
||||
{ "x86_64", "pc", -1 },
|
||||
{}
|
||||
};
|
||||
|
||||
static uint8_t isa_inb(QTestState *qts, const TestCase *test, uint16_t addr)
|
||||
{
|
||||
uint8_t value;
|
||||
if (test->isa_base == -1) {
|
||||
value = qtest_inb(qts, addr);
|
||||
} else {
|
||||
value = qtest_readb(qts, test->isa_base + addr);
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
static uint16_t isa_inw(QTestState *qts, const TestCase *test, uint16_t addr)
|
||||
{
|
||||
uint16_t value;
|
||||
if (test->isa_base == -1) {
|
||||
value = qtest_inw(qts, addr);
|
||||
} else {
|
||||
value = qtest_readw(qts, test->isa_base + addr);
|
||||
}
|
||||
return test->bswap ? bswap16(value) : value;
|
||||
}
|
||||
|
||||
static uint32_t isa_inl(QTestState *qts, const TestCase *test, uint16_t addr)
|
||||
{
|
||||
uint32_t value;
|
||||
if (test->isa_base == -1) {
|
||||
value = qtest_inl(qts, addr);
|
||||
} else {
|
||||
value = qtest_readl(qts, test->isa_base + addr);
|
||||
}
|
||||
return test->bswap ? bswap32(value) : value;
|
||||
}
|
||||
|
||||
static void isa_outb(QTestState *qts, const TestCase *test, uint16_t addr,
|
||||
uint8_t value)
|
||||
{
|
||||
if (test->isa_base == -1) {
|
||||
qtest_outb(qts, addr, value);
|
||||
} else {
|
||||
qtest_writeb(qts, test->isa_base + addr, value);
|
||||
}
|
||||
}
|
||||
|
||||
static void isa_outw(QTestState *qts, const TestCase *test, uint16_t addr,
|
||||
uint16_t value)
|
||||
{
|
||||
value = test->bswap ? bswap16(value) : value;
|
||||
if (test->isa_base == -1) {
|
||||
qtest_outw(qts, addr, value);
|
||||
} else {
|
||||
qtest_writew(qts, test->isa_base + addr, value);
|
||||
}
|
||||
}
|
||||
|
||||
static void isa_outl(QTestState *qts, const TestCase *test, uint16_t addr,
|
||||
uint32_t value)
|
||||
{
|
||||
value = test->bswap ? bswap32(value) : value;
|
||||
if (test->isa_base == -1) {
|
||||
qtest_outl(qts, addr, value);
|
||||
} else {
|
||||
qtest_writel(qts, test->isa_base + addr, value);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void test_endianness(gconstpointer data)
|
||||
{
|
||||
const TestCase *test = data;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_initf("-M %s%s%s -device pc-testdev", test->machine,
|
||||
test->superio ? " -device " : "",
|
||||
test->superio ?: "");
|
||||
isa_outl(qts, test, 0xe0, 0x87654321);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4321);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe3), ==, 0x87);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe2), ==, 0x65);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe1), ==, 0x43);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe0), ==, 0x21);
|
||||
|
||||
isa_outw(qts, test, 0xe2, 0x8866);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x88664321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8866);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4321);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe3), ==, 0x88);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe2), ==, 0x66);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe1), ==, 0x43);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe0), ==, 0x21);
|
||||
|
||||
isa_outw(qts, test, 0xe0, 0x4422);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x88664422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8866);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4422);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe3), ==, 0x88);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe2), ==, 0x66);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe1), ==, 0x44);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe0), ==, 0x22);
|
||||
|
||||
isa_outb(qts, test, 0xe3, 0x87);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87664422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8766);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe3), ==, 0x87);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe2), ==, 0x66);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe1), ==, 0x44);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe0), ==, 0x22);
|
||||
|
||||
isa_outb(qts, test, 0xe2, 0x65);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4422);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe3), ==, 0x87);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe2), ==, 0x65);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe1), ==, 0x44);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe0), ==, 0x22);
|
||||
|
||||
isa_outb(qts, test, 0xe1, 0x43);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654322);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4322);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe3), ==, 0x87);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe2), ==, 0x65);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe1), ==, 0x43);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe0), ==, 0x22);
|
||||
|
||||
isa_outb(qts, test, 0xe0, 0x21);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4321);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe3), ==, 0x87);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe2), ==, 0x65);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe1), ==, 0x43);
|
||||
g_assert_cmphex(isa_inb(qts, test, 0xe0), ==, 0x21);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_endianness_split(gconstpointer data)
|
||||
{
|
||||
const TestCase *test = data;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_initf("-M %s%s%s -device pc-testdev", test->machine,
|
||||
test->superio ? " -device " : "",
|
||||
test->superio ?: "");
|
||||
isa_outl(qts, test, 0xe8, 0x87654321);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4321);
|
||||
|
||||
isa_outw(qts, test, 0xea, 0x8866);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x88664321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8866);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4321);
|
||||
|
||||
isa_outw(qts, test, 0xe8, 0x4422);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x88664422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8866);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4422);
|
||||
|
||||
isa_outb(qts, test, 0xeb, 0x87);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87664422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8766);
|
||||
|
||||
isa_outb(qts, test, 0xea, 0x65);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4422);
|
||||
|
||||
isa_outb(qts, test, 0xe9, 0x43);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654322);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4322);
|
||||
|
||||
isa_outb(qts, test, 0xe8, 0x21);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe0), ==, 0x87654321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe2), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe0), ==, 0x4321);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_endianness_combine(gconstpointer data)
|
||||
{
|
||||
const TestCase *test = data;
|
||||
QTestState *qts;
|
||||
|
||||
qts = qtest_initf("-M %s%s%s -device pc-testdev", test->machine,
|
||||
test->superio ? " -device " : "",
|
||||
test->superio ?: "");
|
||||
isa_outl(qts, test, 0xe0, 0x87654321);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe8), ==, 0x87654321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xea), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe8), ==, 0x4321);
|
||||
|
||||
isa_outw(qts, test, 0xe2, 0x8866);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe8), ==, 0x88664321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xea), ==, 0x8866);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe8), ==, 0x4321);
|
||||
|
||||
isa_outw(qts, test, 0xe0, 0x4422);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe8), ==, 0x88664422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xea), ==, 0x8866);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe8), ==, 0x4422);
|
||||
|
||||
isa_outb(qts, test, 0xe3, 0x87);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe8), ==, 0x87664422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xea), ==, 0x8766);
|
||||
|
||||
isa_outb(qts, test, 0xe2, 0x65);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe8), ==, 0x87654422);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xea), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe8), ==, 0x4422);
|
||||
|
||||
isa_outb(qts, test, 0xe1, 0x43);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe8), ==, 0x87654322);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xea), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe8), ==, 0x4322);
|
||||
|
||||
isa_outb(qts, test, 0xe0, 0x21);
|
||||
g_assert_cmphex(isa_inl(qts, test, 0xe8), ==, 0x87654321);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xea), ==, 0x8765);
|
||||
g_assert_cmphex(isa_inw(qts, test, 0xe8), ==, 0x4321);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
const char *arch = qtest_get_arch();
|
||||
int i;
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
for (i = 0; test_cases[i].arch; i++) {
|
||||
gchar *path;
|
||||
if (strcmp(test_cases[i].arch, arch) != 0) {
|
||||
continue;
|
||||
}
|
||||
path = g_strdup_printf("endianness/%s",
|
||||
test_cases[i].machine);
|
||||
qtest_add_data_func(path, &test_cases[i], test_endianness);
|
||||
g_free(path);
|
||||
|
||||
path = g_strdup_printf("endianness/split/%s",
|
||||
test_cases[i].machine);
|
||||
qtest_add_data_func(path, &test_cases[i], test_endianness_split);
|
||||
g_free(path);
|
||||
|
||||
path = g_strdup_printf("endianness/combine/%s",
|
||||
test_cases[i].machine);
|
||||
qtest_add_data_func(path, &test_cases[i], test_endianness_combine);
|
||||
g_free(path);
|
||||
}
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
58
tests/qtest/es1370-test.c
Normal file
58
tests/qtest/es1370-test.c
Normal file
|
|
@ -0,0 +1,58 @@
|
|||
/*
|
||||
* QTest testcase for ES1370
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/pci.h"
|
||||
|
||||
typedef struct QES1370 QES1370;
|
||||
|
||||
struct QES1370 {
|
||||
QOSGraphObject obj;
|
||||
QPCIDevice dev;
|
||||
};
|
||||
|
||||
static void *es1370_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QES1370 *es1370 = obj;
|
||||
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return &es1370->dev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in e1000e\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *es1370_create(void *pci_bus, QGuestAllocator *alloc, void *addr)
|
||||
{
|
||||
QES1370 *es1370 = g_new0(QES1370, 1);
|
||||
QPCIBus *bus = pci_bus;
|
||||
|
||||
qpci_device_init(&es1370->dev, bus, addr);
|
||||
es1370->obj.get_driver = es1370_get_driver;
|
||||
|
||||
return &es1370->obj;
|
||||
}
|
||||
|
||||
static void es1370_register_nodes(void)
|
||||
{
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "addr=04.0",
|
||||
};
|
||||
add_qpci_address(&opts, &(QPCIAddress) { .devfn = QPCI_DEVFN(4, 0) });
|
||||
|
||||
qos_node_create_driver("ES1370", es1370_create);
|
||||
qos_node_consumes("ES1370", "pci-bus", &opts);
|
||||
qos_node_produces("ES1370", "pci-device");
|
||||
}
|
||||
|
||||
libqos_init(es1370_register_nodes);
|
||||
587
tests/qtest/fdc-test.c
Normal file
587
tests/qtest/fdc-test.c
Normal file
|
|
@ -0,0 +1,587 @@
|
|||
/*
|
||||
* Floppy test cases.
|
||||
*
|
||||
* Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
|
||||
|
||||
#include "libqtest-single.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
#include "qemu-common.h"
|
||||
|
||||
/* TODO actually test the results and get rid of this */
|
||||
#define qmp_discard_response(...) qobject_unref(qmp(__VA_ARGS__))
|
||||
|
||||
#define TEST_IMAGE_SIZE 1440 * 1024
|
||||
|
||||
#define FLOPPY_BASE 0x3f0
|
||||
#define FLOPPY_IRQ 6
|
||||
|
||||
enum {
|
||||
reg_sra = 0x0,
|
||||
reg_srb = 0x1,
|
||||
reg_dor = 0x2,
|
||||
reg_msr = 0x4,
|
||||
reg_dsr = 0x4,
|
||||
reg_fifo = 0x5,
|
||||
reg_dir = 0x7,
|
||||
};
|
||||
|
||||
enum {
|
||||
CMD_SENSE_INT = 0x08,
|
||||
CMD_READ_ID = 0x0a,
|
||||
CMD_SEEK = 0x0f,
|
||||
CMD_VERIFY = 0x16,
|
||||
CMD_READ = 0xe6,
|
||||
CMD_RELATIVE_SEEK_OUT = 0x8f,
|
||||
CMD_RELATIVE_SEEK_IN = 0xcf,
|
||||
};
|
||||
|
||||
enum {
|
||||
BUSY = 0x10,
|
||||
NONDMA = 0x20,
|
||||
RQM = 0x80,
|
||||
DIO = 0x40,
|
||||
|
||||
DSKCHG = 0x80,
|
||||
};
|
||||
|
||||
static char test_image[] = "/tmp/qtest.XXXXXX";
|
||||
|
||||
#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
|
||||
#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
|
||||
|
||||
static uint8_t base = 0x70;
|
||||
|
||||
enum {
|
||||
CMOS_FLOPPY = 0x10,
|
||||
};
|
||||
|
||||
static void floppy_send(uint8_t byte)
|
||||
{
|
||||
uint8_t msr;
|
||||
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
assert_bit_set(msr, RQM);
|
||||
assert_bit_clear(msr, DIO);
|
||||
|
||||
outb(FLOPPY_BASE + reg_fifo, byte);
|
||||
}
|
||||
|
||||
static uint8_t floppy_recv(void)
|
||||
{
|
||||
uint8_t msr;
|
||||
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
assert_bit_set(msr, RQM | DIO);
|
||||
|
||||
return inb(FLOPPY_BASE + reg_fifo);
|
||||
}
|
||||
|
||||
/* pcn: Present Cylinder Number */
|
||||
static void ack_irq(uint8_t *pcn)
|
||||
{
|
||||
uint8_t ret;
|
||||
|
||||
g_assert(get_irq(FLOPPY_IRQ));
|
||||
floppy_send(CMD_SENSE_INT);
|
||||
floppy_recv();
|
||||
|
||||
ret = floppy_recv();
|
||||
if (pcn != NULL) {
|
||||
*pcn = ret;
|
||||
}
|
||||
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
}
|
||||
|
||||
static uint8_t send_read_command(uint8_t cmd)
|
||||
{
|
||||
uint8_t drive = 0;
|
||||
uint8_t head = 0;
|
||||
uint8_t cyl = 0;
|
||||
uint8_t sect_addr = 1;
|
||||
uint8_t sect_size = 2;
|
||||
uint8_t eot = 1;
|
||||
uint8_t gap = 0x1b;
|
||||
uint8_t gpl = 0xff;
|
||||
|
||||
uint8_t msr = 0;
|
||||
uint8_t st0;
|
||||
|
||||
uint8_t ret = 0;
|
||||
|
||||
floppy_send(cmd);
|
||||
floppy_send(head << 2 | drive);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(cyl);
|
||||
floppy_send(head);
|
||||
floppy_send(sect_addr);
|
||||
floppy_send(sect_size);
|
||||
floppy_send(eot);
|
||||
floppy_send(gap);
|
||||
floppy_send(gpl);
|
||||
|
||||
uint8_t i = 0;
|
||||
uint8_t n = 2;
|
||||
for (; i < n; i++) {
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
if (msr == 0xd0) {
|
||||
break;
|
||||
}
|
||||
sleep(1);
|
||||
}
|
||||
|
||||
if (i >= n) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
st0 = floppy_recv();
|
||||
if (st0 != 0x40) {
|
||||
ret = 1;
|
||||
}
|
||||
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
|
||||
{
|
||||
uint8_t drive = 0;
|
||||
uint8_t head = 0;
|
||||
uint8_t cyl = 0;
|
||||
uint8_t sect_addr = 1;
|
||||
uint8_t sect_size = 2;
|
||||
uint8_t eot = nb_sect;
|
||||
uint8_t gap = 0x1b;
|
||||
uint8_t gpl = 0xff;
|
||||
|
||||
uint8_t msr = 0;
|
||||
uint8_t st0;
|
||||
|
||||
uint8_t ret = 0;
|
||||
|
||||
floppy_send(CMD_READ);
|
||||
floppy_send(head << 2 | drive);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(cyl);
|
||||
floppy_send(head);
|
||||
floppy_send(sect_addr);
|
||||
floppy_send(sect_size);
|
||||
floppy_send(eot);
|
||||
floppy_send(gap);
|
||||
floppy_send(gpl);
|
||||
|
||||
uint16_t i = 0;
|
||||
uint8_t n = 2;
|
||||
for (; i < n; i++) {
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
if (msr == (BUSY | NONDMA | DIO | RQM)) {
|
||||
break;
|
||||
}
|
||||
sleep(1);
|
||||
}
|
||||
|
||||
if (i >= n) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Non-DMA mode */
|
||||
for (i = 0; i < 512 * 2 * nb_sect; i++) {
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
assert_bit_set(msr, BUSY | RQM | DIO);
|
||||
inb(FLOPPY_BASE + reg_fifo);
|
||||
}
|
||||
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
assert_bit_set(msr, BUSY | RQM | DIO);
|
||||
g_assert(get_irq(FLOPPY_IRQ));
|
||||
|
||||
st0 = floppy_recv();
|
||||
if (st0 != expected_st0) {
|
||||
ret = 1;
|
||||
}
|
||||
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
g_assert(get_irq(FLOPPY_IRQ));
|
||||
floppy_recv();
|
||||
|
||||
/* Check that we're back in command phase */
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
assert_bit_clear(msr, BUSY | DIO);
|
||||
assert_bit_set(msr, RQM);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void send_seek(int cyl)
|
||||
{
|
||||
int drive = 0;
|
||||
int head = 0;
|
||||
|
||||
floppy_send(CMD_SEEK);
|
||||
floppy_send(head << 2 | drive);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(cyl);
|
||||
ack_irq(NULL);
|
||||
}
|
||||
|
||||
static uint8_t cmos_read(uint8_t reg)
|
||||
{
|
||||
outb(base + 0, reg);
|
||||
return inb(base + 1);
|
||||
}
|
||||
|
||||
static void test_cmos(void)
|
||||
{
|
||||
uint8_t cmos;
|
||||
|
||||
cmos = cmos_read(CMOS_FLOPPY);
|
||||
g_assert(cmos == 0x40 || cmos == 0x50);
|
||||
}
|
||||
|
||||
static void test_no_media_on_start(void)
|
||||
{
|
||||
uint8_t dir;
|
||||
|
||||
/* Media changed bit must be set all time after start if there is
|
||||
* no media in drive. */
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
send_seek(1);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
}
|
||||
|
||||
static void test_read_without_media(void)
|
||||
{
|
||||
uint8_t ret;
|
||||
|
||||
ret = send_read_command(CMD_READ);
|
||||
g_assert(ret == 0);
|
||||
}
|
||||
|
||||
static void test_media_insert(void)
|
||||
{
|
||||
uint8_t dir;
|
||||
|
||||
/* Insert media in drive. DSKCHK should not be reset until a step pulse
|
||||
* is sent. */
|
||||
qmp_discard_response("{'execute':'blockdev-change-medium', 'arguments':{"
|
||||
" 'id':'floppy0', 'filename': %s, 'format': 'raw' }}",
|
||||
test_image);
|
||||
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
|
||||
send_seek(0);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
|
||||
/* Step to next track should clear DSKCHG bit. */
|
||||
send_seek(1);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_clear(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_clear(dir, DSKCHG);
|
||||
}
|
||||
|
||||
static void test_media_change(void)
|
||||
{
|
||||
uint8_t dir;
|
||||
|
||||
test_media_insert();
|
||||
|
||||
/* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
|
||||
* reset the bit. */
|
||||
qmp_discard_response("{'execute':'eject', 'arguments':{"
|
||||
" 'id':'floppy0' }}");
|
||||
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
|
||||
send_seek(0);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
|
||||
send_seek(1);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
dir = inb(FLOPPY_BASE + reg_dir);
|
||||
assert_bit_set(dir, DSKCHG);
|
||||
}
|
||||
|
||||
static void test_sense_interrupt(void)
|
||||
{
|
||||
int drive = 0;
|
||||
int head = 0;
|
||||
int cyl = 0;
|
||||
int ret = 0;
|
||||
|
||||
floppy_send(CMD_SENSE_INT);
|
||||
ret = floppy_recv();
|
||||
g_assert(ret == 0x80);
|
||||
|
||||
floppy_send(CMD_SEEK);
|
||||
floppy_send(head << 2 | drive);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(cyl);
|
||||
|
||||
floppy_send(CMD_SENSE_INT);
|
||||
ret = floppy_recv();
|
||||
g_assert(ret == 0x20);
|
||||
floppy_recv();
|
||||
}
|
||||
|
||||
static void test_relative_seek(void)
|
||||
{
|
||||
uint8_t drive = 0;
|
||||
uint8_t head = 0;
|
||||
uint8_t cyl = 1;
|
||||
uint8_t pcn;
|
||||
|
||||
/* Send seek to track 0 */
|
||||
send_seek(0);
|
||||
|
||||
/* Send relative seek to increase track by 1 */
|
||||
floppy_send(CMD_RELATIVE_SEEK_IN);
|
||||
floppy_send(head << 2 | drive);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(cyl);
|
||||
|
||||
ack_irq(&pcn);
|
||||
g_assert(pcn == 1);
|
||||
|
||||
/* Send relative seek to decrease track by 1 */
|
||||
floppy_send(CMD_RELATIVE_SEEK_OUT);
|
||||
floppy_send(head << 2 | drive);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(cyl);
|
||||
|
||||
ack_irq(&pcn);
|
||||
g_assert(pcn == 0);
|
||||
}
|
||||
|
||||
static void test_read_id(void)
|
||||
{
|
||||
uint8_t drive = 0;
|
||||
uint8_t head = 0;
|
||||
uint8_t cyl;
|
||||
uint8_t st0;
|
||||
uint8_t msr;
|
||||
|
||||
/* Seek to track 0 and check with READ ID */
|
||||
send_seek(0);
|
||||
|
||||
floppy_send(CMD_READ_ID);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(head << 2 | drive);
|
||||
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
if (!get_irq(FLOPPY_IRQ)) {
|
||||
assert_bit_set(msr, BUSY);
|
||||
assert_bit_clear(msr, RQM);
|
||||
}
|
||||
|
||||
while (!get_irq(FLOPPY_IRQ)) {
|
||||
/* qemu involves a timer with READ ID... */
|
||||
clock_step(1000000000LL / 50);
|
||||
}
|
||||
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
assert_bit_set(msr, BUSY | RQM | DIO);
|
||||
|
||||
st0 = floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
cyl = floppy_recv();
|
||||
head = floppy_recv();
|
||||
floppy_recv();
|
||||
g_assert(get_irq(FLOPPY_IRQ));
|
||||
floppy_recv();
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
|
||||
g_assert_cmpint(cyl, ==, 0);
|
||||
g_assert_cmpint(head, ==, 0);
|
||||
g_assert_cmpint(st0, ==, head << 2);
|
||||
|
||||
/* Seek to track 8 on head 1 and check with READ ID */
|
||||
head = 1;
|
||||
cyl = 8;
|
||||
|
||||
floppy_send(CMD_SEEK);
|
||||
floppy_send(head << 2 | drive);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(cyl);
|
||||
g_assert(get_irq(FLOPPY_IRQ));
|
||||
ack_irq(NULL);
|
||||
|
||||
floppy_send(CMD_READ_ID);
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
floppy_send(head << 2 | drive);
|
||||
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
if (!get_irq(FLOPPY_IRQ)) {
|
||||
assert_bit_set(msr, BUSY);
|
||||
assert_bit_clear(msr, RQM);
|
||||
}
|
||||
|
||||
while (!get_irq(FLOPPY_IRQ)) {
|
||||
/* qemu involves a timer with READ ID... */
|
||||
clock_step(1000000000LL / 50);
|
||||
}
|
||||
|
||||
msr = inb(FLOPPY_BASE + reg_msr);
|
||||
assert_bit_set(msr, BUSY | RQM | DIO);
|
||||
|
||||
st0 = floppy_recv();
|
||||
floppy_recv();
|
||||
floppy_recv();
|
||||
cyl = floppy_recv();
|
||||
head = floppy_recv();
|
||||
floppy_recv();
|
||||
g_assert(get_irq(FLOPPY_IRQ));
|
||||
floppy_recv();
|
||||
g_assert(!get_irq(FLOPPY_IRQ));
|
||||
|
||||
g_assert_cmpint(cyl, ==, 8);
|
||||
g_assert_cmpint(head, ==, 1);
|
||||
g_assert_cmpint(st0, ==, head << 2);
|
||||
}
|
||||
|
||||
static void test_read_no_dma_1(void)
|
||||
{
|
||||
uint8_t ret;
|
||||
|
||||
outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
|
||||
send_seek(0);
|
||||
ret = send_read_no_dma_command(1, 0x04);
|
||||
g_assert(ret == 0);
|
||||
}
|
||||
|
||||
static void test_read_no_dma_18(void)
|
||||
{
|
||||
uint8_t ret;
|
||||
|
||||
outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
|
||||
send_seek(0);
|
||||
ret = send_read_no_dma_command(18, 0x04);
|
||||
g_assert(ret == 0);
|
||||
}
|
||||
|
||||
static void test_read_no_dma_19(void)
|
||||
{
|
||||
uint8_t ret;
|
||||
|
||||
outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
|
||||
send_seek(0);
|
||||
ret = send_read_no_dma_command(19, 0x20);
|
||||
g_assert(ret == 0);
|
||||
}
|
||||
|
||||
static void test_verify(void)
|
||||
{
|
||||
uint8_t ret;
|
||||
|
||||
ret = send_read_command(CMD_VERIFY);
|
||||
g_assert(ret == 0);
|
||||
}
|
||||
|
||||
/* success if no crash or abort */
|
||||
static void fuzz_registers(void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < 1000; i++) {
|
||||
uint8_t reg, val;
|
||||
|
||||
reg = (uint8_t)g_test_rand_int_range(0, 8);
|
||||
val = (uint8_t)g_test_rand_int_range(0, 256);
|
||||
|
||||
outb(FLOPPY_BASE + reg, val);
|
||||
inb(FLOPPY_BASE + reg);
|
||||
}
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int fd;
|
||||
int ret;
|
||||
|
||||
/* Create a temporary raw image */
|
||||
fd = mkstemp(test_image);
|
||||
g_assert(fd >= 0);
|
||||
ret = ftruncate(fd, TEST_IMAGE_SIZE);
|
||||
g_assert(ret == 0);
|
||||
close(fd);
|
||||
|
||||
/* Run the tests */
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
qtest_start("-device floppy,id=floppy0");
|
||||
qtest_irq_intercept_in(global_qtest, "ioapic");
|
||||
qtest_add_func("/fdc/cmos", test_cmos);
|
||||
qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
|
||||
qtest_add_func("/fdc/read_without_media", test_read_without_media);
|
||||
qtest_add_func("/fdc/media_change", test_media_change);
|
||||
qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
|
||||
qtest_add_func("/fdc/relative_seek", test_relative_seek);
|
||||
qtest_add_func("/fdc/read_id", test_read_id);
|
||||
qtest_add_func("/fdc/verify", test_verify);
|
||||
qtest_add_func("/fdc/media_insert", test_media_insert);
|
||||
qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
|
||||
qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
|
||||
qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
|
||||
qtest_add_func("/fdc/fuzz-registers", fuzz_registers);
|
||||
|
||||
ret = g_test_run();
|
||||
|
||||
/* Cleanup */
|
||||
qtest_end();
|
||||
unlink(test_image);
|
||||
|
||||
return ret;
|
||||
}
|
||||
260
tests/qtest/fw_cfg-test.c
Normal file
260
tests/qtest/fw_cfg-test.c
Normal file
|
|
@ -0,0 +1,260 @@
|
|||
/*
|
||||
* qtest fw_cfg test case
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
|
||||
#include "libqtest.h"
|
||||
#include "standard-headers/linux/qemu_fw_cfg.h"
|
||||
#include "libqos/fw_cfg.h"
|
||||
#include "qemu/bswap.h"
|
||||
|
||||
static uint64_t ram_size = 128 << 20;
|
||||
static uint16_t nb_cpus = 1;
|
||||
static uint16_t max_cpus = 1;
|
||||
static uint64_t nb_nodes = 0;
|
||||
static uint16_t boot_menu = 0;
|
||||
|
||||
static void test_fw_cfg_signature(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
char buf[5];
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
qfw_cfg_get(fw_cfg, FW_CFG_SIGNATURE, buf, 4);
|
||||
buf[4] = 0;
|
||||
|
||||
g_assert_cmpstr(buf, ==, "QEMU");
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_id(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
uint32_t id;
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
id = qfw_cfg_get_u32(fw_cfg, FW_CFG_ID);
|
||||
g_assert((id == 1) ||
|
||||
(id == 3));
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_uuid(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
|
||||
uint8_t buf[16];
|
||||
static const uint8_t uuid[16] = {
|
||||
0x46, 0x00, 0xcb, 0x32, 0x38, 0xec, 0x4b, 0x2f,
|
||||
0x8a, 0xcb, 0x81, 0xc6, 0xea, 0x54, 0xf2, 0xd8,
|
||||
};
|
||||
|
||||
s = qtest_init("-uuid 4600cb32-38ec-4b2f-8acb-81c6ea54f2d8");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
qfw_cfg_get(fw_cfg, FW_CFG_UUID, buf, 16);
|
||||
g_assert(memcmp(buf, uuid, sizeof(buf)) == 0);
|
||||
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
|
||||
}
|
||||
|
||||
static void test_fw_cfg_ram_size(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
g_assert_cmpint(qfw_cfg_get_u64(fw_cfg, FW_CFG_RAM_SIZE), ==, ram_size);
|
||||
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_nographic(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
g_assert_cmpint(qfw_cfg_get_u16(fw_cfg, FW_CFG_NOGRAPHIC), ==, 0);
|
||||
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_nb_cpus(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
g_assert_cmpint(qfw_cfg_get_u16(fw_cfg, FW_CFG_NB_CPUS), ==, nb_cpus);
|
||||
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_max_cpus(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
g_assert_cmpint(qfw_cfg_get_u16(fw_cfg, FW_CFG_MAX_CPUS), ==, max_cpus);
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_numa(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
uint64_t *cpu_mask;
|
||||
uint64_t *node_mask;
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
g_assert_cmpint(qfw_cfg_get_u64(fw_cfg, FW_CFG_NUMA), ==, nb_nodes);
|
||||
|
||||
cpu_mask = g_new0(uint64_t, max_cpus);
|
||||
node_mask = g_new0(uint64_t, nb_nodes);
|
||||
|
||||
qfw_cfg_read_data(fw_cfg, cpu_mask, sizeof(uint64_t) * max_cpus);
|
||||
qfw_cfg_read_data(fw_cfg, node_mask, sizeof(uint64_t) * nb_nodes);
|
||||
|
||||
if (nb_nodes) {
|
||||
g_assert(cpu_mask[0] & 0x01);
|
||||
g_assert_cmpint(node_mask[0], ==, ram_size);
|
||||
}
|
||||
|
||||
g_free(node_mask);
|
||||
g_free(cpu_mask);
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_boot_menu(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
|
||||
s = qtest_init("");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
g_assert_cmpint(qfw_cfg_get_u16(fw_cfg, FW_CFG_BOOT_MENU), ==, boot_menu);
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_reboot_timeout(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
uint32_t reboot_timeout = 0;
|
||||
size_t filesize;
|
||||
|
||||
s = qtest_init("-boot reboot-timeout=15");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
filesize = qfw_cfg_get_file(fw_cfg, "etc/boot-fail-wait",
|
||||
&reboot_timeout, sizeof(reboot_timeout));
|
||||
g_assert_cmpint(filesize, ==, sizeof(reboot_timeout));
|
||||
reboot_timeout = le32_to_cpu(reboot_timeout);
|
||||
g_assert_cmpint(reboot_timeout, ==, 15);
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_no_reboot_timeout(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
uint32_t reboot_timeout = 0;
|
||||
size_t filesize;
|
||||
|
||||
/* Special value -1 means "don't reboot" */
|
||||
s = qtest_init("-boot reboot-timeout=-1");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
filesize = qfw_cfg_get_file(fw_cfg, "etc/boot-fail-wait",
|
||||
&reboot_timeout, sizeof(reboot_timeout));
|
||||
g_assert_cmpint(filesize, ==, sizeof(reboot_timeout));
|
||||
reboot_timeout = le32_to_cpu(reboot_timeout);
|
||||
g_assert_cmpint(reboot_timeout, ==, UINT32_MAX);
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
static void test_fw_cfg_splash_time(void)
|
||||
{
|
||||
QFWCFG *fw_cfg;
|
||||
QTestState *s;
|
||||
uint16_t splash_time = 0;
|
||||
size_t filesize;
|
||||
|
||||
s = qtest_init("-boot splash-time=12");
|
||||
fw_cfg = pc_fw_cfg_init(s);
|
||||
|
||||
filesize = qfw_cfg_get_file(fw_cfg, "etc/boot-menu-wait",
|
||||
&splash_time, sizeof(splash_time));
|
||||
g_assert_cmpint(filesize, ==, sizeof(splash_time));
|
||||
splash_time = le16_to_cpu(splash_time);
|
||||
g_assert_cmpint(splash_time, ==, 12);
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
qtest_add_func("fw_cfg/signature", test_fw_cfg_signature);
|
||||
qtest_add_func("fw_cfg/id", test_fw_cfg_id);
|
||||
qtest_add_func("fw_cfg/uuid", test_fw_cfg_uuid);
|
||||
qtest_add_func("fw_cfg/ram_size", test_fw_cfg_ram_size);
|
||||
qtest_add_func("fw_cfg/nographic", test_fw_cfg_nographic);
|
||||
qtest_add_func("fw_cfg/nb_cpus", test_fw_cfg_nb_cpus);
|
||||
#if 0
|
||||
qtest_add_func("fw_cfg/machine_id", test_fw_cfg_machine_id);
|
||||
qtest_add_func("fw_cfg/kernel", test_fw_cfg_kernel);
|
||||
qtest_add_func("fw_cfg/initrd", test_fw_cfg_initrd);
|
||||
qtest_add_func("fw_cfg/boot_device", test_fw_cfg_boot_device);
|
||||
#endif
|
||||
qtest_add_func("fw_cfg/max_cpus", test_fw_cfg_max_cpus);
|
||||
qtest_add_func("fw_cfg/numa", test_fw_cfg_numa);
|
||||
qtest_add_func("fw_cfg/boot_menu", test_fw_cfg_boot_menu);
|
||||
qtest_add_func("fw_cfg/reboot_timeout", test_fw_cfg_reboot_timeout);
|
||||
qtest_add_func("fw_cfg/no_reboot_timeout", test_fw_cfg_no_reboot_timeout);
|
||||
qtest_add_func("fw_cfg/splash_time", test_fw_cfg_splash_time);
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
988
tests/qtest/hd-geo-test.c
Normal file
988
tests/qtest/hd-geo-test.c
Normal file
|
|
@ -0,0 +1,988 @@
|
|||
/*
|
||||
* Hard disk geometry test cases.
|
||||
*
|
||||
* Copyright (c) 2012 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Markus Armbruster <armbru@redhat.com>,
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Covers only IDE and tests only CMOS contents. Better than nothing.
|
||||
* Improvements welcome.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu-common.h"
|
||||
#include "qemu/bswap.h"
|
||||
#include "qapi/qmp/qlist.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/fw_cfg.h"
|
||||
#include "libqos/libqos.h"
|
||||
#include "standard-headers/linux/qemu_fw_cfg.h"
|
||||
|
||||
#define ARGV_SIZE 256
|
||||
|
||||
static char *create_test_img(int secs)
|
||||
{
|
||||
char *template = strdup("/tmp/qtest.XXXXXX");
|
||||
int fd, ret;
|
||||
|
||||
fd = mkstemp(template);
|
||||
g_assert(fd >= 0);
|
||||
ret = ftruncate(fd, (off_t)secs * 512);
|
||||
close(fd);
|
||||
|
||||
if (ret) {
|
||||
free(template);
|
||||
template = NULL;
|
||||
}
|
||||
|
||||
return template;
|
||||
}
|
||||
|
||||
typedef struct {
|
||||
int cyls, heads, secs, trans;
|
||||
} CHST;
|
||||
|
||||
typedef enum {
|
||||
mbr_blank, mbr_lba, mbr_chs,
|
||||
mbr_last
|
||||
} MBRcontents;
|
||||
|
||||
typedef enum {
|
||||
/* order is relevant */
|
||||
backend_small, backend_large, backend_empty,
|
||||
backend_last
|
||||
} Backend;
|
||||
|
||||
static const int img_secs[backend_last] = {
|
||||
[backend_small] = 61440,
|
||||
[backend_large] = 8388608,
|
||||
[backend_empty] = -1,
|
||||
};
|
||||
|
||||
static const CHST hd_chst[backend_last][mbr_last] = {
|
||||
[backend_small] = {
|
||||
[mbr_blank] = { 60, 16, 63, 0 },
|
||||
[mbr_lba] = { 60, 16, 63, 2 },
|
||||
[mbr_chs] = { 60, 16, 63, 0 }
|
||||
},
|
||||
[backend_large] = {
|
||||
[mbr_blank] = { 8322, 16, 63, 1 },
|
||||
[mbr_lba] = { 8322, 16, 63, 1 },
|
||||
[mbr_chs] = { 8322, 16, 63, 0 }
|
||||
},
|
||||
};
|
||||
|
||||
static char *img_file_name[backend_last];
|
||||
|
||||
static const CHST *cur_ide[4];
|
||||
|
||||
static bool is_hd(const CHST *expected_chst)
|
||||
{
|
||||
return expected_chst && expected_chst->cyls;
|
||||
}
|
||||
|
||||
static void test_cmos_byte(QTestState *qts, int reg, int expected)
|
||||
{
|
||||
enum { cmos_base = 0x70 };
|
||||
int actual;
|
||||
|
||||
qtest_outb(qts, cmos_base + 0, reg);
|
||||
actual = qtest_inb(qts, cmos_base + 1);
|
||||
g_assert(actual == expected);
|
||||
}
|
||||
|
||||
static void test_cmos_bytes(QTestState *qts, int reg0, int n,
|
||||
uint8_t expected[])
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 9; i++) {
|
||||
test_cmos_byte(qts, reg0 + i, expected[i]);
|
||||
}
|
||||
}
|
||||
|
||||
static void test_cmos_disk_data(QTestState *qts)
|
||||
{
|
||||
test_cmos_byte(qts, 0x12,
|
||||
(is_hd(cur_ide[0]) ? 0xf0 : 0) |
|
||||
(is_hd(cur_ide[1]) ? 0x0f : 0));
|
||||
}
|
||||
|
||||
static void test_cmos_drive_cyl(QTestState *qts, int reg0,
|
||||
const CHST *expected_chst)
|
||||
{
|
||||
if (is_hd(expected_chst)) {
|
||||
int c = expected_chst->cyls;
|
||||
int h = expected_chst->heads;
|
||||
int s = expected_chst->secs;
|
||||
uint8_t expected_bytes[9] = {
|
||||
c & 0xff, c >> 8, h, 0xff, 0xff, 0xc0 | ((h > 8) << 3),
|
||||
c & 0xff, c >> 8, s
|
||||
};
|
||||
test_cmos_bytes(qts, reg0, 9, expected_bytes);
|
||||
} else {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 9; i++) {
|
||||
test_cmos_byte(qts, reg0 + i, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void test_cmos_drive1(QTestState *qts)
|
||||
{
|
||||
test_cmos_byte(qts, 0x19, is_hd(cur_ide[0]) ? 47 : 0);
|
||||
test_cmos_drive_cyl(qts, 0x1b, cur_ide[0]);
|
||||
}
|
||||
|
||||
static void test_cmos_drive2(QTestState *qts)
|
||||
{
|
||||
test_cmos_byte(qts, 0x1a, is_hd(cur_ide[1]) ? 47 : 0);
|
||||
test_cmos_drive_cyl(qts, 0x24, cur_ide[1]);
|
||||
}
|
||||
|
||||
static void test_cmos_disktransflag(QTestState *qts)
|
||||
{
|
||||
int val, i;
|
||||
|
||||
val = 0;
|
||||
for (i = 0; i < ARRAY_SIZE(cur_ide); i++) {
|
||||
if (is_hd(cur_ide[i])) {
|
||||
val |= cur_ide[i]->trans << (2 * i);
|
||||
}
|
||||
}
|
||||
test_cmos_byte(qts, 0x39, val);
|
||||
}
|
||||
|
||||
static void test_cmos(QTestState *qts)
|
||||
{
|
||||
test_cmos_disk_data(qts);
|
||||
test_cmos_drive1(qts);
|
||||
test_cmos_drive2(qts);
|
||||
test_cmos_disktransflag(qts);
|
||||
}
|
||||
|
||||
static int append_arg(int argc, char *argv[], int argv_sz, char *arg)
|
||||
{
|
||||
g_assert(argc + 1 < argv_sz);
|
||||
argv[argc++] = arg;
|
||||
argv[argc] = NULL;
|
||||
return argc;
|
||||
}
|
||||
|
||||
static int setup_common(char *argv[], int argv_sz)
|
||||
{
|
||||
memset(cur_ide, 0, sizeof(cur_ide));
|
||||
return append_arg(0, argv, argv_sz,
|
||||
g_strdup("-nodefaults"));
|
||||
}
|
||||
|
||||
static void setup_mbr(int img_idx, MBRcontents mbr)
|
||||
{
|
||||
static const uint8_t part_lba[16] = {
|
||||
/* chs 0,1,1 (lba 63) to chs 0,127,63 (8001 sectors) */
|
||||
0x80, 1, 1, 0, 6, 127, 63, 0, 63, 0, 0, 0, 0x41, 0x1F, 0, 0,
|
||||
};
|
||||
static const uint8_t part_chs[16] = {
|
||||
/* chs 0,1,1 (lba 63) to chs 7,15,63 (8001 sectors) */
|
||||
0x80, 1, 1, 0, 6, 15, 63, 7, 63, 0, 0, 0, 0x41, 0x1F, 0, 0,
|
||||
};
|
||||
uint8_t buf[512];
|
||||
int fd, ret;
|
||||
|
||||
memset(buf, 0, sizeof(buf));
|
||||
|
||||
if (mbr != mbr_blank) {
|
||||
buf[0x1fe] = 0x55;
|
||||
buf[0x1ff] = 0xAA;
|
||||
memcpy(buf + 0x1BE, mbr == mbr_lba ? part_lba : part_chs, 16);
|
||||
}
|
||||
|
||||
fd = open(img_file_name[img_idx], O_WRONLY);
|
||||
g_assert(fd >= 0);
|
||||
ret = write(fd, buf, sizeof(buf));
|
||||
g_assert(ret == sizeof(buf));
|
||||
close(fd);
|
||||
}
|
||||
|
||||
static int setup_ide(int argc, char *argv[], int argv_sz,
|
||||
int ide_idx, const char *dev, int img_idx,
|
||||
MBRcontents mbr)
|
||||
{
|
||||
char *s1, *s2, *s3;
|
||||
|
||||
s1 = g_strdup_printf("-drive id=drive%d,if=%s",
|
||||
ide_idx, dev ? "none" : "ide");
|
||||
s2 = dev ? g_strdup("") : g_strdup_printf(",index=%d", ide_idx);
|
||||
|
||||
if (img_secs[img_idx] >= 0) {
|
||||
setup_mbr(img_idx, mbr);
|
||||
s3 = g_strdup_printf(",format=raw,file=%s", img_file_name[img_idx]);
|
||||
} else {
|
||||
s3 = g_strdup(",media=cdrom");
|
||||
}
|
||||
argc = append_arg(argc, argv, argv_sz,
|
||||
g_strdup_printf("%s%s%s", s1, s2, s3));
|
||||
g_free(s1);
|
||||
g_free(s2);
|
||||
g_free(s3);
|
||||
|
||||
if (dev) {
|
||||
argc = append_arg(argc, argv, argv_sz,
|
||||
g_strdup_printf("-device %s,drive=drive%d,"
|
||||
"bus=ide.%d,unit=%d",
|
||||
dev, ide_idx,
|
||||
ide_idx / 2, ide_idx % 2));
|
||||
}
|
||||
return argc;
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: no IDE devices
|
||||
*/
|
||||
static void test_ide_none(void)
|
||||
{
|
||||
char **argv = g_new0(char *, ARGV_SIZE);
|
||||
char *args;
|
||||
QTestState *qts;
|
||||
|
||||
setup_common(argv, ARGV_SIZE);
|
||||
args = g_strjoinv(" ", argv);
|
||||
qts = qtest_init(args);
|
||||
g_strfreev(argv);
|
||||
g_free(args);
|
||||
test_cmos(qts);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_ide_mbr(bool use_device, MBRcontents mbr)
|
||||
{
|
||||
char **argv = g_new0(char *, ARGV_SIZE);
|
||||
char *args;
|
||||
int argc;
|
||||
Backend i;
|
||||
const char *dev;
|
||||
QTestState *qts;
|
||||
|
||||
argc = setup_common(argv, ARGV_SIZE);
|
||||
for (i = 0; i < backend_last; i++) {
|
||||
cur_ide[i] = &hd_chst[i][mbr];
|
||||
dev = use_device ? (is_hd(cur_ide[i]) ? "ide-hd" : "ide-cd") : NULL;
|
||||
argc = setup_ide(argc, argv, ARGV_SIZE, i, dev, i, mbr);
|
||||
}
|
||||
args = g_strjoinv(" ", argv);
|
||||
qts = qtest_init(args);
|
||||
g_strfreev(argv);
|
||||
g_free(args);
|
||||
test_cmos(qts);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE devices (if=ide) with blank MBRs
|
||||
*/
|
||||
static void test_ide_drive_mbr_blank(void)
|
||||
{
|
||||
test_ide_mbr(false, mbr_blank);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE devices (if=ide) with MBRs indicating LBA is in use
|
||||
*/
|
||||
static void test_ide_drive_mbr_lba(void)
|
||||
{
|
||||
test_ide_mbr(false, mbr_lba);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE devices (if=ide) with MBRs indicating CHS is in use
|
||||
*/
|
||||
static void test_ide_drive_mbr_chs(void)
|
||||
{
|
||||
test_ide_mbr(false, mbr_chs);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE devices (if=none) with blank MBRs
|
||||
*/
|
||||
static void test_ide_device_mbr_blank(void)
|
||||
{
|
||||
test_ide_mbr(true, mbr_blank);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE devices (if=none) with MBRs indicating LBA is in use
|
||||
*/
|
||||
static void test_ide_device_mbr_lba(void)
|
||||
{
|
||||
test_ide_mbr(true, mbr_lba);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE devices (if=none) with MBRs indicating CHS is in use
|
||||
*/
|
||||
static void test_ide_device_mbr_chs(void)
|
||||
{
|
||||
test_ide_mbr(true, mbr_chs);
|
||||
}
|
||||
|
||||
static void test_ide_drive_user(const char *dev, bool trans)
|
||||
{
|
||||
char **argv = g_new0(char *, ARGV_SIZE);
|
||||
char *args, *opts;
|
||||
int argc;
|
||||
int secs = img_secs[backend_small];
|
||||
const CHST expected_chst = { secs / (4 * 32) , 4, 32, trans };
|
||||
QTestState *qts;
|
||||
|
||||
argc = setup_common(argv, ARGV_SIZE);
|
||||
opts = g_strdup_printf("%s,%scyls=%d,heads=%d,secs=%d",
|
||||
dev, trans ? "bios-chs-trans=lba," : "",
|
||||
expected_chst.cyls, expected_chst.heads,
|
||||
expected_chst.secs);
|
||||
cur_ide[0] = &expected_chst;
|
||||
argc = setup_ide(argc, argv, ARGV_SIZE, 0, opts, backend_small, mbr_chs);
|
||||
g_free(opts);
|
||||
args = g_strjoinv(" ", argv);
|
||||
qts = qtest_init(args);
|
||||
g_strfreev(argv);
|
||||
g_free(args);
|
||||
test_cmos(qts);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE device (if=none) with explicit CHS
|
||||
*/
|
||||
static void test_ide_device_user_chs(void)
|
||||
{
|
||||
test_ide_drive_user("ide-hd", false);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE device (if=none) with explicit CHS and translation
|
||||
*/
|
||||
static void test_ide_device_user_chst(void)
|
||||
{
|
||||
test_ide_drive_user("ide-hd", true);
|
||||
}
|
||||
|
||||
/*
|
||||
* Test case: IDE devices (if=ide), but use index=0 for CD-ROM
|
||||
*/
|
||||
static void test_ide_drive_cd_0(void)
|
||||
{
|
||||
char **argv = g_new0(char *, ARGV_SIZE);
|
||||
char *args;
|
||||
int argc, ide_idx;
|
||||
Backend i;
|
||||
QTestState *qts;
|
||||
|
||||
argc = setup_common(argv, ARGV_SIZE);
|
||||
for (i = 0; i <= backend_empty; i++) {
|
||||
ide_idx = backend_empty - i;
|
||||
cur_ide[ide_idx] = &hd_chst[i][mbr_blank];
|
||||
argc = setup_ide(argc, argv, ARGV_SIZE, ide_idx, NULL, i, mbr_blank);
|
||||
}
|
||||
args = g_strjoinv(" ", argv);
|
||||
qts = qtest_init(args);
|
||||
g_strfreev(argv);
|
||||
g_free(args);
|
||||
test_cmos(qts);
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
typedef struct {
|
||||
bool active;
|
||||
uint32_t head;
|
||||
uint32_t sector;
|
||||
uint32_t cyl;
|
||||
uint32_t end_head;
|
||||
uint32_t end_sector;
|
||||
uint32_t end_cyl;
|
||||
uint32_t start_sect;
|
||||
uint32_t nr_sects;
|
||||
} MBRpartitions[4];
|
||||
|
||||
static MBRpartitions empty_mbr = { {false, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||
{false, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||
{false, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||
{false, 0, 0, 0, 0, 0, 0, 0, 0} };
|
||||
|
||||
static char *create_qcow2_with_mbr(MBRpartitions mbr, uint64_t sectors)
|
||||
{
|
||||
const char *template = "/tmp/qtest.XXXXXX";
|
||||
char *raw_path = strdup(template);
|
||||
char *qcow2_path = strdup(template);
|
||||
char cmd[100 + 2 * PATH_MAX];
|
||||
uint8_t buf[512];
|
||||
int i, ret, fd, offset;
|
||||
uint64_t qcow2_size = sectors * 512;
|
||||
uint8_t status, parttype, head, sector, cyl;
|
||||
char *qemu_img_path;
|
||||
char *qemu_img_abs_path;
|
||||
|
||||
offset = 0xbe;
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
status = mbr[i].active ? 0x80 : 0x00;
|
||||
g_assert(mbr[i].head < 256);
|
||||
g_assert(mbr[i].sector < 64);
|
||||
g_assert(mbr[i].cyl < 1024);
|
||||
head = mbr[i].head;
|
||||
sector = mbr[i].sector + ((mbr[i].cyl & 0x300) >> 2);
|
||||
cyl = mbr[i].cyl & 0xff;
|
||||
|
||||
buf[offset + 0x0] = status;
|
||||
buf[offset + 0x1] = head;
|
||||
buf[offset + 0x2] = sector;
|
||||
buf[offset + 0x3] = cyl;
|
||||
|
||||
parttype = 0;
|
||||
g_assert(mbr[i].end_head < 256);
|
||||
g_assert(mbr[i].end_sector < 64);
|
||||
g_assert(mbr[i].end_cyl < 1024);
|
||||
head = mbr[i].end_head;
|
||||
sector = mbr[i].end_sector + ((mbr[i].end_cyl & 0x300) >> 2);
|
||||
cyl = mbr[i].end_cyl & 0xff;
|
||||
|
||||
buf[offset + 0x4] = parttype;
|
||||
buf[offset + 0x5] = head;
|
||||
buf[offset + 0x6] = sector;
|
||||
buf[offset + 0x7] = cyl;
|
||||
|
||||
(*(uint32_t *)&buf[offset + 0x8]) = cpu_to_le32(mbr[i].start_sect);
|
||||
(*(uint32_t *)&buf[offset + 0xc]) = cpu_to_le32(mbr[i].nr_sects);
|
||||
|
||||
offset += 0x10;
|
||||
}
|
||||
|
||||
fd = mkstemp(raw_path);
|
||||
g_assert(fd);
|
||||
close(fd);
|
||||
|
||||
fd = open(raw_path, O_WRONLY);
|
||||
g_assert(fd >= 0);
|
||||
ret = write(fd, buf, sizeof(buf));
|
||||
g_assert(ret == sizeof(buf));
|
||||
close(fd);
|
||||
|
||||
fd = mkstemp(qcow2_path);
|
||||
g_assert(fd);
|
||||
close(fd);
|
||||
|
||||
qemu_img_path = getenv("QTEST_QEMU_IMG");
|
||||
g_assert(qemu_img_path);
|
||||
qemu_img_abs_path = realpath(qemu_img_path, NULL);
|
||||
g_assert(qemu_img_abs_path);
|
||||
|
||||
ret = snprintf(cmd, sizeof(cmd),
|
||||
"%s convert -f raw -O qcow2 %s %s > /dev/null",
|
||||
qemu_img_abs_path,
|
||||
raw_path, qcow2_path);
|
||||
g_assert((0 < ret) && (ret <= sizeof(cmd)));
|
||||
ret = system(cmd);
|
||||
g_assert(ret == 0);
|
||||
|
||||
ret = snprintf(cmd, sizeof(cmd),
|
||||
"%s resize %s %" PRIu64 " > /dev/null",
|
||||
qemu_img_abs_path,
|
||||
qcow2_path, qcow2_size);
|
||||
g_assert((0 < ret) && (ret <= sizeof(cmd)));
|
||||
ret = system(cmd);
|
||||
g_assert(ret == 0);
|
||||
|
||||
free(qemu_img_abs_path);
|
||||
|
||||
unlink(raw_path);
|
||||
free(raw_path);
|
||||
|
||||
return qcow2_path;
|
||||
}
|
||||
|
||||
#define BIOS_GEOMETRY_MAX_SIZE 10000
|
||||
|
||||
typedef struct {
|
||||
uint32_t c;
|
||||
uint32_t h;
|
||||
uint32_t s;
|
||||
} CHS;
|
||||
|
||||
typedef struct {
|
||||
const char *dev_path;
|
||||
CHS chs;
|
||||
} CHSResult;
|
||||
|
||||
static void read_bootdevices(QFWCFG *fw_cfg, CHSResult expected[])
|
||||
{
|
||||
char *buf = g_malloc0(BIOS_GEOMETRY_MAX_SIZE);
|
||||
char *cur;
|
||||
GList *results = NULL, *cur_result;
|
||||
CHSResult *r;
|
||||
int i;
|
||||
int res;
|
||||
bool found;
|
||||
|
||||
qfw_cfg_get_file(fw_cfg, "bios-geometry", buf, BIOS_GEOMETRY_MAX_SIZE);
|
||||
|
||||
for (cur = buf; *cur; cur++) {
|
||||
if (*cur == '\n') {
|
||||
*cur = '\0';
|
||||
}
|
||||
}
|
||||
cur = buf;
|
||||
|
||||
while (strlen(cur)) {
|
||||
|
||||
r = g_malloc0(sizeof(*r));
|
||||
r->dev_path = g_malloc0(strlen(cur) + 1);
|
||||
res = sscanf(cur, "%s %" PRIu32 " %" PRIu32 " %" PRIu32,
|
||||
(char *)r->dev_path,
|
||||
&(r->chs.c), &(r->chs.h), &(r->chs.s));
|
||||
|
||||
g_assert(res == 4);
|
||||
|
||||
results = g_list_prepend(results, r);
|
||||
|
||||
cur += strlen(cur) + 1;
|
||||
}
|
||||
|
||||
i = 0;
|
||||
|
||||
while (expected[i].dev_path) {
|
||||
found = false;
|
||||
cur_result = results;
|
||||
while (cur_result) {
|
||||
r = cur_result->data;
|
||||
if (!strcmp(r->dev_path, expected[i].dev_path) &&
|
||||
!memcmp(&(r->chs), &(expected[i].chs), sizeof(r->chs))) {
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
cur_result = g_list_next(cur_result);
|
||||
}
|
||||
g_assert(found);
|
||||
g_free((char *)((CHSResult *)cur_result->data)->dev_path);
|
||||
g_free(cur_result->data);
|
||||
results = g_list_delete_link(results, cur_result);
|
||||
i++;
|
||||
}
|
||||
|
||||
g_assert(results == NULL);
|
||||
|
||||
g_free(buf);
|
||||
}
|
||||
|
||||
#define MAX_DRIVES 30
|
||||
|
||||
typedef struct {
|
||||
char **argv;
|
||||
int argc;
|
||||
char **drives;
|
||||
int n_drives;
|
||||
int n_scsi_disks;
|
||||
int n_scsi_controllers;
|
||||
int n_virtio_disks;
|
||||
} TestArgs;
|
||||
|
||||
static TestArgs *create_args(void)
|
||||
{
|
||||
TestArgs *args = g_malloc0(sizeof(*args));
|
||||
args->argv = g_new0(char *, ARGV_SIZE);
|
||||
args->argc = append_arg(args->argc, args->argv,
|
||||
ARGV_SIZE, g_strdup("-nodefaults"));
|
||||
args->drives = g_new0(char *, MAX_DRIVES);
|
||||
return args;
|
||||
}
|
||||
|
||||
static void add_drive_with_mbr(TestArgs *args,
|
||||
MBRpartitions mbr, uint64_t sectors)
|
||||
{
|
||||
char *img_file_name;
|
||||
char part[300];
|
||||
int ret;
|
||||
|
||||
g_assert(args->n_drives < MAX_DRIVES);
|
||||
|
||||
img_file_name = create_qcow2_with_mbr(mbr, sectors);
|
||||
|
||||
args->drives[args->n_drives] = img_file_name;
|
||||
ret = snprintf(part, sizeof(part),
|
||||
"-drive file=%s,if=none,format=qcow2,id=disk%d",
|
||||
img_file_name, args->n_drives);
|
||||
g_assert((0 < ret) && (ret <= sizeof(part)));
|
||||
args->argc = append_arg(args->argc, args->argv, ARGV_SIZE, g_strdup(part));
|
||||
args->n_drives++;
|
||||
}
|
||||
|
||||
static void add_ide_disk(TestArgs *args,
|
||||
int drive_idx, int bus, int unit, int c, int h, int s)
|
||||
{
|
||||
char part[300];
|
||||
int ret;
|
||||
|
||||
ret = snprintf(part, sizeof(part),
|
||||
"-device ide-hd,drive=disk%d,bus=ide.%d,unit=%d,"
|
||||
"lcyls=%d,lheads=%d,lsecs=%d",
|
||||
drive_idx, bus, unit, c, h, s);
|
||||
g_assert((0 < ret) && (ret <= sizeof(part)));
|
||||
args->argc = append_arg(args->argc, args->argv, ARGV_SIZE, g_strdup(part));
|
||||
}
|
||||
|
||||
static void add_scsi_controller(TestArgs *args,
|
||||
const char *type,
|
||||
const char *bus,
|
||||
int addr)
|
||||
{
|
||||
char part[300];
|
||||
int ret;
|
||||
|
||||
ret = snprintf(part, sizeof(part),
|
||||
"-device %s,id=scsi%d,bus=%s,addr=%d",
|
||||
type, args->n_scsi_controllers, bus, addr);
|
||||
g_assert((0 < ret) && (ret <= sizeof(part)));
|
||||
args->argc = append_arg(args->argc, args->argv, ARGV_SIZE, g_strdup(part));
|
||||
args->n_scsi_controllers++;
|
||||
}
|
||||
|
||||
static void add_scsi_disk(TestArgs *args,
|
||||
int drive_idx, int bus,
|
||||
int channel, int scsi_id, int lun,
|
||||
int c, int h, int s)
|
||||
{
|
||||
char part[300];
|
||||
int ret;
|
||||
|
||||
ret = snprintf(part, sizeof(part),
|
||||
"-device scsi-hd,id=scsi-disk%d,drive=disk%d,"
|
||||
"bus=scsi%d.0,"
|
||||
"channel=%d,scsi-id=%d,lun=%d,"
|
||||
"lcyls=%d,lheads=%d,lsecs=%d",
|
||||
args->n_scsi_disks, drive_idx, bus, channel, scsi_id, lun,
|
||||
c, h, s);
|
||||
g_assert((0 < ret) && (ret <= sizeof(part)));
|
||||
args->argc = append_arg(args->argc, args->argv, ARGV_SIZE, g_strdup(part));
|
||||
args->n_scsi_disks++;
|
||||
}
|
||||
|
||||
static void add_virtio_disk(TestArgs *args,
|
||||
int drive_idx, const char *bus, int addr,
|
||||
int c, int h, int s)
|
||||
{
|
||||
char part[300];
|
||||
int ret;
|
||||
|
||||
ret = snprintf(part, sizeof(part),
|
||||
"-device virtio-blk-pci,id=virtio-disk%d,"
|
||||
"drive=disk%d,bus=%s,addr=%d,"
|
||||
"lcyls=%d,lheads=%d,lsecs=%d",
|
||||
args->n_virtio_disks, drive_idx, bus, addr, c, h, s);
|
||||
g_assert((0 < ret) && (ret <= sizeof(part)));
|
||||
args->argc = append_arg(args->argc, args->argv, ARGV_SIZE, g_strdup(part));
|
||||
args->n_virtio_disks++;
|
||||
}
|
||||
|
||||
static void test_override(TestArgs *args, CHSResult expected[])
|
||||
{
|
||||
QTestState *qts;
|
||||
char *joined_args;
|
||||
QFWCFG *fw_cfg;
|
||||
int i;
|
||||
|
||||
joined_args = g_strjoinv(" ", args->argv);
|
||||
|
||||
qts = qtest_init(joined_args);
|
||||
fw_cfg = pc_fw_cfg_init(qts);
|
||||
|
||||
read_bootdevices(fw_cfg, expected);
|
||||
|
||||
g_free(joined_args);
|
||||
qtest_quit(qts);
|
||||
|
||||
g_free(fw_cfg);
|
||||
|
||||
for (i = 0; i < args->n_drives; i++) {
|
||||
unlink(args->drives[i]);
|
||||
free(args->drives[i]);
|
||||
}
|
||||
g_free(args->drives);
|
||||
g_strfreev(args->argv);
|
||||
g_free(args);
|
||||
}
|
||||
|
||||
static void test_override_ide(void)
|
||||
{
|
||||
TestArgs *args = create_args();
|
||||
CHSResult expected[] = {
|
||||
{"/pci@i0cf8/ide@1,1/drive@0/disk@0", {10000, 120, 30} },
|
||||
{"/pci@i0cf8/ide@1,1/drive@0/disk@1", {9000, 120, 30} },
|
||||
{"/pci@i0cf8/ide@1,1/drive@1/disk@0", {0, 1, 1} },
|
||||
{"/pci@i0cf8/ide@1,1/drive@1/disk@1", {1, 0, 0} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_ide_disk(args, 0, 0, 0, 10000, 120, 30);
|
||||
add_ide_disk(args, 1, 0, 1, 9000, 120, 30);
|
||||
add_ide_disk(args, 2, 1, 0, 0, 1, 1);
|
||||
add_ide_disk(args, 3, 1, 1, 1, 0, 0);
|
||||
test_override(args, expected);
|
||||
}
|
||||
|
||||
static void test_override_scsi(void)
|
||||
{
|
||||
TestArgs *args = create_args();
|
||||
CHSResult expected[] = {
|
||||
{"/pci@i0cf8/scsi@3/channel@0/disk@0,0", {10000, 120, 30} },
|
||||
{"/pci@i0cf8/scsi@3/channel@0/disk@1,0", {9000, 120, 30} },
|
||||
{"/pci@i0cf8/scsi@3/channel@0/disk@2,0", {1, 0, 0} },
|
||||
{"/pci@i0cf8/scsi@3/channel@0/disk@3,0", {0, 1, 0} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_scsi_controller(args, "lsi53c895a", "pci.0", 3);
|
||||
add_scsi_disk(args, 0, 0, 0, 0, 0, 10000, 120, 30);
|
||||
add_scsi_disk(args, 1, 0, 0, 1, 0, 9000, 120, 30);
|
||||
add_scsi_disk(args, 2, 0, 0, 2, 0, 1, 0, 0);
|
||||
add_scsi_disk(args, 3, 0, 0, 3, 0, 0, 1, 0);
|
||||
test_override(args, expected);
|
||||
}
|
||||
|
||||
static void test_override_scsi_2_controllers(void)
|
||||
{
|
||||
TestArgs *args = create_args();
|
||||
CHSResult expected[] = {
|
||||
{"/pci@i0cf8/scsi@3/channel@0/disk@0,0", {10000, 120, 30} },
|
||||
{"/pci@i0cf8/scsi@3/channel@0/disk@1,0", {9000, 120, 30} },
|
||||
{"/pci@i0cf8/scsi@4/channel@0/disk@0,1", {1, 0, 0} },
|
||||
{"/pci@i0cf8/scsi@4/channel@0/disk@1,2", {0, 1, 0} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_scsi_controller(args, "lsi53c895a", "pci.0", 3);
|
||||
add_scsi_controller(args, "virtio-scsi-pci", "pci.0", 4);
|
||||
add_scsi_disk(args, 0, 0, 0, 0, 0, 10000, 120, 30);
|
||||
add_scsi_disk(args, 1, 0, 0, 1, 0, 9000, 120, 30);
|
||||
add_scsi_disk(args, 2, 1, 0, 0, 1, 1, 0, 0);
|
||||
add_scsi_disk(args, 3, 1, 0, 1, 2, 0, 1, 0);
|
||||
test_override(args, expected);
|
||||
}
|
||||
|
||||
static void test_override_virtio_blk(void)
|
||||
{
|
||||
TestArgs *args = create_args();
|
||||
CHSResult expected[] = {
|
||||
{"/pci@i0cf8/scsi@3/disk@0,0", {10000, 120, 30} },
|
||||
{"/pci@i0cf8/scsi@4/disk@0,0", {9000, 120, 30} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_virtio_disk(args, 0, "pci.0", 3, 10000, 120, 30);
|
||||
add_virtio_disk(args, 1, "pci.0", 4, 9000, 120, 30);
|
||||
test_override(args, expected);
|
||||
}
|
||||
|
||||
static void test_override_zero_chs(void)
|
||||
{
|
||||
TestArgs *args = create_args();
|
||||
CHSResult expected[] = {
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_ide_disk(args, 0, 1, 1, 0, 0, 0);
|
||||
test_override(args, expected);
|
||||
}
|
||||
|
||||
static void test_override_scsi_hot_unplug(void)
|
||||
{
|
||||
QTestState *qts;
|
||||
char *joined_args;
|
||||
QFWCFG *fw_cfg;
|
||||
QDict *response;
|
||||
int i;
|
||||
TestArgs *args = create_args();
|
||||
CHSResult expected[] = {
|
||||
{"/pci@i0cf8/scsi@2/channel@0/disk@0,0", {10000, 120, 30} },
|
||||
{"/pci@i0cf8/scsi@2/channel@0/disk@1,0", {20, 20, 20} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
CHSResult expected2[] = {
|
||||
{"/pci@i0cf8/scsi@2/channel@0/disk@1,0", {20, 20, 20} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_scsi_controller(args, "virtio-scsi-pci", "pci.0", 2);
|
||||
add_scsi_disk(args, 0, 0, 0, 0, 0, 10000, 120, 30);
|
||||
add_scsi_disk(args, 1, 0, 0, 1, 0, 20, 20, 20);
|
||||
|
||||
joined_args = g_strjoinv(" ", args->argv);
|
||||
|
||||
qts = qtest_init(joined_args);
|
||||
fw_cfg = pc_fw_cfg_init(qts);
|
||||
|
||||
read_bootdevices(fw_cfg, expected);
|
||||
|
||||
/* unplug device an restart */
|
||||
response = qtest_qmp(qts,
|
||||
"{ 'execute': 'device_del',"
|
||||
" 'arguments': {'id': 'scsi-disk0' }}");
|
||||
g_assert(response);
|
||||
g_assert(!qdict_haskey(response, "error"));
|
||||
qobject_unref(response);
|
||||
response = qtest_qmp(qts,
|
||||
"{ 'execute': 'system_reset', 'arguments': { }}");
|
||||
g_assert(response);
|
||||
g_assert(!qdict_haskey(response, "error"));
|
||||
qobject_unref(response);
|
||||
|
||||
qtest_qmp_eventwait(qts, "RESET");
|
||||
|
||||
read_bootdevices(fw_cfg, expected2);
|
||||
|
||||
g_free(joined_args);
|
||||
qtest_quit(qts);
|
||||
|
||||
g_free(fw_cfg);
|
||||
|
||||
for (i = 0; i < args->n_drives; i++) {
|
||||
unlink(args->drives[i]);
|
||||
free(args->drives[i]);
|
||||
}
|
||||
g_free(args->drives);
|
||||
g_strfreev(args->argv);
|
||||
g_free(args);
|
||||
}
|
||||
|
||||
static void test_override_virtio_hot_unplug(void)
|
||||
{
|
||||
QTestState *qts;
|
||||
char *joined_args;
|
||||
QFWCFG *fw_cfg;
|
||||
QDict *response;
|
||||
int i;
|
||||
TestArgs *args = create_args();
|
||||
CHSResult expected[] = {
|
||||
{"/pci@i0cf8/scsi@2/disk@0,0", {10000, 120, 30} },
|
||||
{"/pci@i0cf8/scsi@3/disk@0,0", {20, 20, 20} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
CHSResult expected2[] = {
|
||||
{"/pci@i0cf8/scsi@3/disk@0,0", {20, 20, 20} },
|
||||
{NULL, {0, 0, 0} }
|
||||
};
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_drive_with_mbr(args, empty_mbr, 1);
|
||||
add_virtio_disk(args, 0, "pci.0", 2, 10000, 120, 30);
|
||||
add_virtio_disk(args, 1, "pci.0", 3, 20, 20, 20);
|
||||
|
||||
joined_args = g_strjoinv(" ", args->argv);
|
||||
|
||||
qts = qtest_init(joined_args);
|
||||
fw_cfg = pc_fw_cfg_init(qts);
|
||||
|
||||
read_bootdevices(fw_cfg, expected);
|
||||
|
||||
/* unplug device an restart */
|
||||
response = qtest_qmp(qts,
|
||||
"{ 'execute': 'device_del',"
|
||||
" 'arguments': {'id': 'virtio-disk0' }}");
|
||||
g_assert(response);
|
||||
g_assert(!qdict_haskey(response, "error"));
|
||||
qobject_unref(response);
|
||||
response = qtest_qmp(qts,
|
||||
"{ 'execute': 'system_reset', 'arguments': { }}");
|
||||
g_assert(response);
|
||||
g_assert(!qdict_haskey(response, "error"));
|
||||
qobject_unref(response);
|
||||
|
||||
qtest_qmp_eventwait(qts, "RESET");
|
||||
|
||||
read_bootdevices(fw_cfg, expected2);
|
||||
|
||||
g_free(joined_args);
|
||||
qtest_quit(qts);
|
||||
|
||||
g_free(fw_cfg);
|
||||
|
||||
for (i = 0; i < args->n_drives; i++) {
|
||||
unlink(args->drives[i]);
|
||||
free(args->drives[i]);
|
||||
}
|
||||
g_free(args->drives);
|
||||
g_strfreev(args->argv);
|
||||
g_free(args);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
Backend i;
|
||||
int ret;
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
for (i = 0; i < backend_last; i++) {
|
||||
if (img_secs[i] >= 0) {
|
||||
img_file_name[i] = create_test_img(img_secs[i]);
|
||||
if (!img_file_name[i]) {
|
||||
g_test_message("Could not create test images.");
|
||||
goto test_add_done;
|
||||
}
|
||||
} else {
|
||||
img_file_name[i] = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
qtest_add_func("hd-geo/ide/none", test_ide_none);
|
||||
qtest_add_func("hd-geo/ide/drive/mbr/blank", test_ide_drive_mbr_blank);
|
||||
qtest_add_func("hd-geo/ide/drive/mbr/lba", test_ide_drive_mbr_lba);
|
||||
qtest_add_func("hd-geo/ide/drive/mbr/chs", test_ide_drive_mbr_chs);
|
||||
qtest_add_func("hd-geo/ide/drive/cd_0", test_ide_drive_cd_0);
|
||||
qtest_add_func("hd-geo/ide/device/mbr/blank", test_ide_device_mbr_blank);
|
||||
qtest_add_func("hd-geo/ide/device/mbr/lba", test_ide_device_mbr_lba);
|
||||
qtest_add_func("hd-geo/ide/device/mbr/chs", test_ide_device_mbr_chs);
|
||||
qtest_add_func("hd-geo/ide/device/user/chs", test_ide_device_user_chs);
|
||||
qtest_add_func("hd-geo/ide/device/user/chst", test_ide_device_user_chst);
|
||||
if (have_qemu_img()) {
|
||||
qtest_add_func("hd-geo/override/ide", test_override_ide);
|
||||
qtest_add_func("hd-geo/override/scsi", test_override_scsi);
|
||||
qtest_add_func("hd-geo/override/scsi_2_controllers",
|
||||
test_override_scsi_2_controllers);
|
||||
qtest_add_func("hd-geo/override/virtio_blk", test_override_virtio_blk);
|
||||
qtest_add_func("hd-geo/override/zero_chs", test_override_zero_chs);
|
||||
qtest_add_func("hd-geo/override/scsi_hot_unplug",
|
||||
test_override_scsi_hot_unplug);
|
||||
qtest_add_func("hd-geo/override/virtio_hot_unplug",
|
||||
test_override_virtio_hot_unplug);
|
||||
} else {
|
||||
g_test_message("QTEST_QEMU_IMG not set or qemu-img missing; "
|
||||
"skipping hd-geo/override/* tests");
|
||||
}
|
||||
|
||||
test_add_done:
|
||||
ret = g_test_run();
|
||||
|
||||
for (i = 0; i < backend_last; i++) {
|
||||
if (img_file_name[i]) {
|
||||
unlink(img_file_name[i]);
|
||||
free(img_file_name[i]);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
45
tests/qtest/hexloader-test.c
Normal file
45
tests/qtest/hexloader-test.c
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* QTest testcase for the Intel Hexadecimal Object File Loader
|
||||
*
|
||||
* Authors:
|
||||
* Su Hang <suhang16@mails.ucas.ac.cn> 2018
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
|
||||
/* Load 'test.hex' and verify that the in-memory contents are as expected.
|
||||
* 'test.hex' is a memory test pattern stored in Hexadecimal Object
|
||||
* format. It loads at 0x10000 in RAM and contains values from 0 through
|
||||
* 255.
|
||||
*/
|
||||
static void hex_loader_test(void)
|
||||
{
|
||||
unsigned int i;
|
||||
const unsigned int base_addr = 0x00010000;
|
||||
|
||||
QTestState *s = qtest_initf(
|
||||
"-M vexpress-a9 -device loader,file=tests/data/hex-loader/test.hex");
|
||||
|
||||
for (i = 0; i < 256; ++i) {
|
||||
uint8_t val = qtest_readb(s, base_addr + i);
|
||||
g_assert_cmpuint(i, ==, val);
|
||||
}
|
||||
qtest_quit(s);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int ret;
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
qtest_add_func("/tmp/hex_loader", hex_loader_test);
|
||||
ret = g_test_run();
|
||||
|
||||
return ret;
|
||||
}
|
||||
413
tests/qtest/i440fx-test.c
Normal file
413
tests/qtest/i440fx-test.c
Normal file
|
|
@ -0,0 +1,413 @@
|
|||
/*
|
||||
* qtest I440FX test case
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
* Copyright Red Hat, Inc. 2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
* Laszlo Ersek <lersek@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
|
||||
#include "libqtest-single.h"
|
||||
#include "libqos/pci.h"
|
||||
#include "libqos/pci-pc.h"
|
||||
#include "hw/pci/pci_regs.h"
|
||||
|
||||
#define BROKEN 1
|
||||
|
||||
typedef struct TestData
|
||||
{
|
||||
int num_cpus;
|
||||
} TestData;
|
||||
|
||||
typedef struct FirmwareTestFixture {
|
||||
/* decides whether we're testing -bios or -pflash */
|
||||
bool is_bios;
|
||||
} FirmwareTestFixture;
|
||||
|
||||
static QPCIBus *test_start_get_bus(const TestData *s)
|
||||
{
|
||||
char *cmdline;
|
||||
|
||||
cmdline = g_strdup_printf("-smp %d", s->num_cpus);
|
||||
qtest_start(cmdline);
|
||||
g_free(cmdline);
|
||||
return qpci_new_pc(global_qtest, NULL);
|
||||
}
|
||||
|
||||
static void test_i440fx_defaults(gconstpointer opaque)
|
||||
{
|
||||
const TestData *s = opaque;
|
||||
QPCIBus *bus;
|
||||
QPCIDevice *dev;
|
||||
uint32_t value;
|
||||
|
||||
bus = test_start_get_bus(s);
|
||||
dev = qpci_device_find(bus, QPCI_DEVFN(0, 0));
|
||||
g_assert(dev != NULL);
|
||||
|
||||
/* 3.2.2 */
|
||||
g_assert_cmpint(qpci_config_readw(dev, PCI_VENDOR_ID), ==, 0x8086);
|
||||
/* 3.2.3 */
|
||||
g_assert_cmpint(qpci_config_readw(dev, PCI_DEVICE_ID), ==, 0x1237);
|
||||
#ifndef BROKEN
|
||||
/* 3.2.4 */
|
||||
g_assert_cmpint(qpci_config_readw(dev, PCI_COMMAND), ==, 0x0006);
|
||||
/* 3.2.5 */
|
||||
g_assert_cmpint(qpci_config_readw(dev, PCI_STATUS), ==, 0x0280);
|
||||
#endif
|
||||
/* 3.2.7 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, PCI_CLASS_PROG), ==, 0x00);
|
||||
g_assert_cmpint(qpci_config_readw(dev, PCI_CLASS_DEVICE), ==, 0x0600);
|
||||
/* 3.2.8 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, PCI_LATENCY_TIMER), ==, 0x00);
|
||||
/* 3.2.9 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, PCI_HEADER_TYPE), ==, 0x00);
|
||||
/* 3.2.10 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, PCI_BIST), ==, 0x00);
|
||||
|
||||
/* 3.2.11 */
|
||||
value = qpci_config_readw(dev, 0x50); /* PMCCFG */
|
||||
if (s->num_cpus == 1) { /* WPE */
|
||||
g_assert(!(value & (1 << 15)));
|
||||
} else {
|
||||
g_assert((value & (1 << 15)));
|
||||
}
|
||||
|
||||
g_assert(!(value & (1 << 6))); /* EPTE */
|
||||
|
||||
/* 3.2.12 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x52), ==, 0x00); /* DETURBO */
|
||||
/* 3.2.13 */
|
||||
#ifndef BROKEN
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x53), ==, 0x80); /* DBC */
|
||||
#endif
|
||||
/* 3.2.14 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x54), ==, 0x00); /* AXC */
|
||||
/* 3.2.15 */
|
||||
g_assert_cmpint(qpci_config_readw(dev, 0x55), ==, 0x0000); /* DRT */
|
||||
#ifndef BROKEN
|
||||
/* 3.2.16 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x57), ==, 0x01); /* DRAMC */
|
||||
/* 3.2.17 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x58), ==, 0x10); /* DRAMT */
|
||||
#endif
|
||||
/* 3.2.18 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x59), ==, 0x00); /* PAM0 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x5A), ==, 0x00); /* PAM1 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x5B), ==, 0x00); /* PAM2 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x5C), ==, 0x00); /* PAM3 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x5D), ==, 0x00); /* PAM4 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x5E), ==, 0x00); /* PAM5 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x5F), ==, 0x00); /* PAM6 */
|
||||
#ifndef BROKEN
|
||||
/* 3.2.19 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x60), ==, 0x01); /* DRB0 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x61), ==, 0x01); /* DRB1 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x62), ==, 0x01); /* DRB2 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x63), ==, 0x01); /* DRB3 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x64), ==, 0x01); /* DRB4 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x65), ==, 0x01); /* DRB5 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x66), ==, 0x01); /* DRB6 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x67), ==, 0x01); /* DRB7 */
|
||||
#endif
|
||||
/* 3.2.20 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x68), ==, 0x00); /* FDHC */
|
||||
/* 3.2.21 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x70), ==, 0x00); /* MTT */
|
||||
#ifndef BROKEN
|
||||
/* 3.2.22 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x71), ==, 0x10); /* CLT */
|
||||
#endif
|
||||
/* 3.2.23 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x72), ==, 0x02); /* SMRAM */
|
||||
/* 3.2.24 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x90), ==, 0x00); /* ERRCMD */
|
||||
/* 3.2.25 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x91), ==, 0x00); /* ERRSTS */
|
||||
/* 3.2.26 */
|
||||
g_assert_cmpint(qpci_config_readb(dev, 0x93), ==, 0x00); /* TRC */
|
||||
|
||||
g_free(dev);
|
||||
qpci_free_pc(bus);
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
#define PAM_RE 1
|
||||
#define PAM_WE 2
|
||||
|
||||
static void pam_set(QPCIDevice *dev, int index, int flags)
|
||||
{
|
||||
int regno = 0x59 + (index / 2);
|
||||
uint8_t reg;
|
||||
|
||||
reg = qpci_config_readb(dev, regno);
|
||||
if (index & 1) {
|
||||
reg = (reg & 0x0F) | (flags << 4);
|
||||
} else {
|
||||
reg = (reg & 0xF0) | flags;
|
||||
}
|
||||
qpci_config_writeb(dev, regno, reg);
|
||||
}
|
||||
|
||||
static gboolean verify_area(uint32_t start, uint32_t end, uint8_t value)
|
||||
{
|
||||
uint32_t size = end - start + 1;
|
||||
gboolean ret = TRUE;
|
||||
uint8_t *data;
|
||||
int i;
|
||||
|
||||
data = g_malloc0(size);
|
||||
memread(start, data, size);
|
||||
|
||||
g_test_message("verify_area: data[0] = 0x%x", data[0]);
|
||||
|
||||
for (i = 0; i < size; i++) {
|
||||
if (data[i] != value) {
|
||||
ret = FALSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
g_free(data);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void write_area(uint32_t start, uint32_t end, uint8_t value)
|
||||
{
|
||||
uint32_t size = end - start + 1;
|
||||
uint8_t *data;
|
||||
|
||||
data = g_malloc(size);
|
||||
memset(data, value, size);
|
||||
memwrite(start, data, size);
|
||||
|
||||
g_free(data);
|
||||
}
|
||||
|
||||
static void test_i440fx_pam(gconstpointer opaque)
|
||||
{
|
||||
const TestData *s = opaque;
|
||||
QPCIBus *bus;
|
||||
QPCIDevice *dev;
|
||||
int i;
|
||||
static struct {
|
||||
uint32_t start;
|
||||
uint32_t end;
|
||||
} pam_area[] = {
|
||||
{ 0, 0 }, /* Reserved */
|
||||
{ 0xF0000, 0xFFFFF }, /* BIOS Area */
|
||||
{ 0xC0000, 0xC3FFF }, /* Option ROM */
|
||||
{ 0xC4000, 0xC7FFF }, /* Option ROM */
|
||||
{ 0xC8000, 0xCBFFF }, /* Option ROM */
|
||||
{ 0xCC000, 0xCFFFF }, /* Option ROM */
|
||||
{ 0xD0000, 0xD3FFF }, /* Option ROM */
|
||||
{ 0xD4000, 0xD7FFF }, /* Option ROM */
|
||||
{ 0xD8000, 0xDBFFF }, /* Option ROM */
|
||||
{ 0xDC000, 0xDFFFF }, /* Option ROM */
|
||||
{ 0xE0000, 0xE3FFF }, /* BIOS Extension */
|
||||
{ 0xE4000, 0xE7FFF }, /* BIOS Extension */
|
||||
{ 0xE8000, 0xEBFFF }, /* BIOS Extension */
|
||||
{ 0xEC000, 0xEFFFF }, /* BIOS Extension */
|
||||
};
|
||||
|
||||
bus = test_start_get_bus(s);
|
||||
dev = qpci_device_find(bus, QPCI_DEVFN(0, 0));
|
||||
g_assert(dev != NULL);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(pam_area); i++) {
|
||||
if (pam_area[i].start == pam_area[i].end) {
|
||||
continue;
|
||||
}
|
||||
|
||||
g_test_message("Checking area 0x%05x..0x%05x",
|
||||
pam_area[i].start, pam_area[i].end);
|
||||
/* Switch to RE for the area */
|
||||
pam_set(dev, i, PAM_RE);
|
||||
/* Verify the RAM is all zeros */
|
||||
g_assert(verify_area(pam_area[i].start, pam_area[i].end, 0));
|
||||
|
||||
/* Switch to WE for the area */
|
||||
pam_set(dev, i, PAM_RE | PAM_WE);
|
||||
/* Write out a non-zero mask to the full area */
|
||||
write_area(pam_area[i].start, pam_area[i].end, 0x42);
|
||||
|
||||
#ifndef BROKEN
|
||||
/* QEMU only supports a limited form of PAM */
|
||||
|
||||
/* Switch to !RE for the area */
|
||||
pam_set(dev, i, PAM_WE);
|
||||
/* Verify the area is not our mask */
|
||||
g_assert(!verify_area(pam_area[i].start, pam_area[i].end, 0x42));
|
||||
#endif
|
||||
|
||||
/* Verify the area is our new mask */
|
||||
g_assert(verify_area(pam_area[i].start, pam_area[i].end, 0x42));
|
||||
|
||||
/* Write out a new mask */
|
||||
write_area(pam_area[i].start, pam_area[i].end, 0x82);
|
||||
|
||||
#ifndef BROKEN
|
||||
/* QEMU only supports a limited form of PAM */
|
||||
|
||||
/* Verify the area is not our mask */
|
||||
g_assert(!verify_area(pam_area[i].start, pam_area[i].end, 0x82));
|
||||
|
||||
/* Switch to RE for the area */
|
||||
pam_set(dev, i, PAM_RE | PAM_WE);
|
||||
#endif
|
||||
/* Verify the area is our new mask */
|
||||
g_assert(verify_area(pam_area[i].start, pam_area[i].end, 0x82));
|
||||
|
||||
/* Reset area */
|
||||
pam_set(dev, i, 0);
|
||||
|
||||
/* Verify the area is not our new mask */
|
||||
g_assert(!verify_area(pam_area[i].start, pam_area[i].end, 0x82));
|
||||
}
|
||||
|
||||
g_free(dev);
|
||||
qpci_free_pc(bus);
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
#define BLOB_SIZE ((size_t)65536)
|
||||
#define ISA_BIOS_MAXSZ ((size_t)(128 * 1024))
|
||||
|
||||
/* Create a blob file, and return its absolute pathname as a dynamically
|
||||
* allocated string.
|
||||
* The file is closed before the function returns.
|
||||
* In case of error, NULL is returned. The function prints the error message.
|
||||
*/
|
||||
static char *create_blob_file(void)
|
||||
{
|
||||
int ret, fd;
|
||||
char *pathname;
|
||||
GError *error = NULL;
|
||||
|
||||
ret = -1;
|
||||
fd = g_file_open_tmp("blob_XXXXXX", &pathname, &error);
|
||||
if (fd == -1) {
|
||||
fprintf(stderr, "unable to create blob file: %s\n", error->message);
|
||||
g_error_free(error);
|
||||
} else {
|
||||
if (ftruncate(fd, BLOB_SIZE) == -1) {
|
||||
fprintf(stderr, "ftruncate(\"%s\", %zu): %s\n", pathname,
|
||||
BLOB_SIZE, strerror(errno));
|
||||
} else {
|
||||
void *buf;
|
||||
|
||||
buf = mmap(NULL, BLOB_SIZE, PROT_WRITE, MAP_SHARED, fd, 0);
|
||||
if (buf == MAP_FAILED) {
|
||||
fprintf(stderr, "mmap(\"%s\", %zu): %s\n", pathname, BLOB_SIZE,
|
||||
strerror(errno));
|
||||
} else {
|
||||
size_t i;
|
||||
|
||||
for (i = 0; i < BLOB_SIZE; ++i) {
|
||||
((uint8_t *)buf)[i] = i;
|
||||
}
|
||||
munmap(buf, BLOB_SIZE);
|
||||
ret = 0;
|
||||
}
|
||||
}
|
||||
close(fd);
|
||||
if (ret == -1) {
|
||||
unlink(pathname);
|
||||
g_free(pathname);
|
||||
}
|
||||
}
|
||||
|
||||
return ret == -1 ? NULL : pathname;
|
||||
}
|
||||
|
||||
static void test_i440fx_firmware(FirmwareTestFixture *fixture,
|
||||
gconstpointer user_data)
|
||||
{
|
||||
char *fw_pathname, *cmdline;
|
||||
uint8_t *buf;
|
||||
size_t i, isa_bios_size;
|
||||
|
||||
fw_pathname = create_blob_file();
|
||||
g_assert(fw_pathname != NULL);
|
||||
|
||||
/* Better hope the user didn't put metacharacters in TMPDIR and co. */
|
||||
cmdline = g_strdup_printf("-S %s%s", fixture->is_bios
|
||||
? "-bios "
|
||||
: "-drive if=pflash,format=raw,file=",
|
||||
fw_pathname);
|
||||
g_test_message("qemu cmdline: %s", cmdline);
|
||||
qtest_start(cmdline);
|
||||
g_free(cmdline);
|
||||
|
||||
/* QEMU has loaded the firmware (because qtest_start() only returns after
|
||||
* the QMP handshake completes). We must unlink the firmware blob right
|
||||
* here, because any assertion firing below would leak it in the
|
||||
* filesystem. This is also the reason why we recreate the blob every time
|
||||
* this function is invoked.
|
||||
*/
|
||||
unlink(fw_pathname);
|
||||
g_free(fw_pathname);
|
||||
|
||||
/* check below 4G */
|
||||
buf = g_malloc0(BLOB_SIZE);
|
||||
memread(0x100000000ULL - BLOB_SIZE, buf, BLOB_SIZE);
|
||||
for (i = 0; i < BLOB_SIZE; ++i) {
|
||||
g_assert_cmphex(buf[i], ==, (uint8_t)i);
|
||||
}
|
||||
|
||||
/* check in ISA space too */
|
||||
memset(buf, 0, BLOB_SIZE);
|
||||
isa_bios_size = ISA_BIOS_MAXSZ < BLOB_SIZE ? ISA_BIOS_MAXSZ : BLOB_SIZE;
|
||||
memread(0x100000 - isa_bios_size, buf, isa_bios_size);
|
||||
for (i = 0; i < isa_bios_size; ++i) {
|
||||
g_assert_cmphex(buf[i], ==,
|
||||
(uint8_t)((BLOB_SIZE - isa_bios_size) + i));
|
||||
}
|
||||
|
||||
g_free(buf);
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
static void add_firmware_test(const char *testpath,
|
||||
void (*setup_fixture)(FirmwareTestFixture *f,
|
||||
gconstpointer test_data))
|
||||
{
|
||||
qtest_add(testpath, FirmwareTestFixture, NULL, setup_fixture,
|
||||
test_i440fx_firmware, NULL);
|
||||
}
|
||||
|
||||
static void request_bios(FirmwareTestFixture *fixture,
|
||||
gconstpointer user_data)
|
||||
{
|
||||
fixture->is_bios = true;
|
||||
}
|
||||
|
||||
static void request_pflash(FirmwareTestFixture *fixture,
|
||||
gconstpointer user_data)
|
||||
{
|
||||
fixture->is_bios = false;
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
TestData data;
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
data.num_cpus = 1;
|
||||
|
||||
qtest_add_data_func("i440fx/defaults", &data, test_i440fx_defaults);
|
||||
qtest_add_data_func("i440fx/pam", &data, test_i440fx_pam);
|
||||
add_firmware_test("i440fx/firmware/bios", request_bios);
|
||||
add_firmware_test("i440fx/firmware/pflash", request_pflash);
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
31
tests/qtest/i82801b11-test.c
Normal file
31
tests/qtest/i82801b11-test.c
Normal file
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* QTest testcase for i82801b11
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest-single.h"
|
||||
|
||||
/* Tests only initialization so far. TODO: Replace with functional tests */
|
||||
static void nop(void)
|
||||
{
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int ret;
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
qtest_add_func("/i82801b11/nop", nop);
|
||||
|
||||
qtest_start("-machine q35 -device i82801b11-bridge,bus=pcie.0,addr=1e.0");
|
||||
ret = g_test_run();
|
||||
|
||||
qtest_end();
|
||||
|
||||
return ret;
|
||||
}
|
||||
1092
tests/qtest/ide-test.c
Normal file
1092
tests/qtest/ide-test.c
Normal file
File diff suppressed because it is too large
Load diff
39
tests/qtest/intel-hda-test.c
Normal file
39
tests/qtest/intel-hda-test.c
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
/*
|
||||
* QTest testcase for Intel HDA
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest-single.h"
|
||||
|
||||
#define HDA_ID "hda0"
|
||||
#define CODEC_DEVICES " -device hda-output,bus=" HDA_ID ".0" \
|
||||
" -device hda-micro,bus=" HDA_ID ".0" \
|
||||
" -device hda-duplex,bus=" HDA_ID ".0"
|
||||
|
||||
/* Tests only initialization so far. TODO: Replace with functional tests */
|
||||
static void ich6_test(void)
|
||||
{
|
||||
qtest_start("-device intel-hda,id=" HDA_ID CODEC_DEVICES);
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
static void ich9_test(void)
|
||||
{
|
||||
qtest_start("-machine q35 -device ich9-intel-hda,bus=pcie.0,addr=1b.0,id="
|
||||
HDA_ID CODEC_DEVICES);
|
||||
qtest_end();
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
qtest_add_func("/intel-hda/ich6", ich6_test);
|
||||
qtest_add_func("/intel-hda/ich9", ich9_test);
|
||||
|
||||
return g_test_run();
|
||||
}
|
||||
32
tests/qtest/ioh3420-test.c
Normal file
32
tests/qtest/ioh3420-test.c
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
* QTest testcase for Intel X58 north bridge IOH
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest-single.h"
|
||||
|
||||
/* Tests only initialization so far. TODO: Replace with functional tests */
|
||||
static void nop(void)
|
||||
{
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int ret;
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
qtest_add_func("/ioh3420/nop", nop);
|
||||
|
||||
qtest_start("-machine q35 -device ioh3420,bus=pcie.0,addr=1c.0,port=1,"
|
||||
"chassis=1,multifunction=on");
|
||||
ret = g_test_run();
|
||||
|
||||
qtest_end();
|
||||
|
||||
return ret;
|
||||
}
|
||||
425
tests/qtest/ipmi-bt-test.c
Normal file
425
tests/qtest/ipmi-bt-test.c
Normal file
|
|
@ -0,0 +1,425 @@
|
|||
/*
|
||||
* IPMI BT test cases, using the external interface for checking
|
||||
*
|
||||
* Copyright (c) 2012 Corey Minyard <cminyard@mvista.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
|
||||
#include <sys/socket.h>
|
||||
#include <netinet/in.h>
|
||||
#include <netinet/ip.h>
|
||||
#include <netinet/tcp.h>
|
||||
|
||||
|
||||
#include "libqtest-single.h"
|
||||
#include "qemu-common.h"
|
||||
|
||||
#define IPMI_IRQ 5
|
||||
|
||||
#define IPMI_BT_BASE 0xe4
|
||||
|
||||
#define IPMI_BT_CTLREG_CLR_WR_PTR 0
|
||||
#define IPMI_BT_CTLREG_CLR_RD_PTR 1
|
||||
#define IPMI_BT_CTLREG_H2B_ATN 2
|
||||
#define IPMI_BT_CTLREG_B2H_ATN 3
|
||||
#define IPMI_BT_CTLREG_SMS_ATN 4
|
||||
#define IPMI_BT_CTLREG_H_BUSY 6
|
||||
#define IPMI_BT_CTLREG_B_BUSY 7
|
||||
|
||||
#define IPMI_BT_CTLREG_GET(b) ((bt_get_ctrlreg() >> (b)) & 1)
|
||||
#define IPMI_BT_CTLREG_GET_H2B_ATN() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_H2B_ATN)
|
||||
#define IPMI_BT_CTLREG_GET_B2H_ATN() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_B2H_ATN)
|
||||
#define IPMI_BT_CTLREG_GET_SMS_ATN() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_SMS_ATN)
|
||||
#define IPMI_BT_CTLREG_GET_H_BUSY() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_H_BUSY)
|
||||
#define IPMI_BT_CTLREG_GET_B_BUSY() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_B_BUSY)
|
||||
|
||||
#define IPMI_BT_CTLREG_SET(b) bt_write_ctrlreg(1 << (b))
|
||||
#define IPMI_BT_CTLREG_SET_CLR_WR_PTR() IPMI_BT_CTLREG_SET( \
|
||||
IPMI_BT_CTLREG_CLR_WR_PTR)
|
||||
#define IPMI_BT_CTLREG_SET_CLR_RD_PTR() IPMI_BT_CTLREG_SET( \
|
||||
IPMI_BT_CTLREG_CLR_RD_PTR)
|
||||
#define IPMI_BT_CTLREG_SET_H2B_ATN() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_H2B_ATN)
|
||||
#define IPMI_BT_CTLREG_SET_B2H_ATN() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_B2H_ATN)
|
||||
#define IPMI_BT_CTLREG_SET_SMS_ATN() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_SMS_ATN)
|
||||
#define IPMI_BT_CTLREG_SET_H_BUSY() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_H_BUSY)
|
||||
|
||||
static int bt_ints_enabled;
|
||||
|
||||
static uint8_t bt_get_ctrlreg(void)
|
||||
{
|
||||
return inb(IPMI_BT_BASE);
|
||||
}
|
||||
|
||||
static void bt_write_ctrlreg(uint8_t val)
|
||||
{
|
||||
outb(IPMI_BT_BASE, val);
|
||||
}
|
||||
|
||||
static uint8_t bt_get_buf(void)
|
||||
{
|
||||
return inb(IPMI_BT_BASE + 1);
|
||||
}
|
||||
|
||||
static void bt_write_buf(uint8_t val)
|
||||
{
|
||||
outb(IPMI_BT_BASE + 1, val);
|
||||
}
|
||||
|
||||
static uint8_t bt_get_irqreg(void)
|
||||
{
|
||||
return inb(IPMI_BT_BASE + 2);
|
||||
}
|
||||
|
||||
static void bt_write_irqreg(uint8_t val)
|
||||
{
|
||||
outb(IPMI_BT_BASE + 2, val);
|
||||
}
|
||||
|
||||
static void bt_wait_b_busy(void)
|
||||
{
|
||||
unsigned int count = 1000;
|
||||
while (IPMI_BT_CTLREG_GET_B_BUSY() != 0) {
|
||||
g_assert(--count != 0);
|
||||
usleep(100);
|
||||
}
|
||||
}
|
||||
|
||||
static void bt_wait_b2h_atn(void)
|
||||
{
|
||||
unsigned int count = 1000;
|
||||
while (IPMI_BT_CTLREG_GET_B2H_ATN() == 0) {
|
||||
g_assert(--count != 0);
|
||||
usleep(100);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static int emu_lfd;
|
||||
static int emu_fd;
|
||||
static in_port_t emu_port;
|
||||
static uint8_t inbuf[100];
|
||||
static unsigned int inbuf_len;
|
||||
static unsigned int inbuf_pos;
|
||||
static int last_was_aa;
|
||||
|
||||
static void read_emu_data(void)
|
||||
{
|
||||
fd_set readfds;
|
||||
int rv;
|
||||
struct timeval tv;
|
||||
|
||||
FD_ZERO(&readfds);
|
||||
FD_SET(emu_fd, &readfds);
|
||||
tv.tv_sec = 10;
|
||||
tv.tv_usec = 0;
|
||||
rv = select(emu_fd + 1, &readfds, NULL, NULL, &tv);
|
||||
if (rv == -1) {
|
||||
perror("select");
|
||||
}
|
||||
g_assert(rv == 1);
|
||||
rv = read(emu_fd, inbuf, sizeof(inbuf));
|
||||
if (rv == -1) {
|
||||
perror("read");
|
||||
}
|
||||
g_assert(rv > 0);
|
||||
inbuf_len = rv;
|
||||
inbuf_pos = 0;
|
||||
}
|
||||
|
||||
static void write_emu_msg(uint8_t *msg, unsigned int len)
|
||||
{
|
||||
int rv;
|
||||
|
||||
#ifdef DEBUG_TEST
|
||||
{
|
||||
unsigned int i;
|
||||
printf("sending:");
|
||||
for (i = 0; i < len; i++) {
|
||||
printf(" %2.2x", msg[i]);
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
#endif
|
||||
rv = write(emu_fd, msg, len);
|
||||
g_assert(rv == len);
|
||||
}
|
||||
|
||||
static void get_emu_msg(uint8_t *msg, unsigned int *len)
|
||||
{
|
||||
unsigned int outpos = 0;
|
||||
|
||||
for (;;) {
|
||||
while (inbuf_pos < inbuf_len) {
|
||||
uint8_t ch = inbuf[inbuf_pos++];
|
||||
|
||||
g_assert(outpos < *len);
|
||||
if (last_was_aa) {
|
||||
assert(ch & 0x10);
|
||||
msg[outpos++] = ch & ~0x10;
|
||||
last_was_aa = 0;
|
||||
} else if (ch == 0xaa) {
|
||||
last_was_aa = 1;
|
||||
} else {
|
||||
msg[outpos++] = ch;
|
||||
if ((ch == 0xa0) || (ch == 0xa1)) {
|
||||
/* Message complete */
|
||||
*len = outpos;
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
}
|
||||
read_emu_data();
|
||||
}
|
||||
done:
|
||||
#ifdef DEBUG_TEST
|
||||
{
|
||||
unsigned int i;
|
||||
printf("Msg:");
|
||||
for (i = 0; i < outpos; i++) {
|
||||
printf(" %2.2x", msg[i]);
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
ipmb_checksum(const unsigned char *data, int size, unsigned char start)
|
||||
{
|
||||
unsigned char csum = start;
|
||||
|
||||
for (; size > 0; size--, data++) {
|
||||
csum += *data;
|
||||
}
|
||||
return csum;
|
||||
}
|
||||
|
||||
static uint8_t get_dev_id_cmd[] = { 0x18, 0x01 };
|
||||
static uint8_t get_dev_id_rsp[] = { 0x1c, 0x01, 0x00, 0x20, 0x00, 0x00, 0x00,
|
||||
0x02, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00 };
|
||||
|
||||
static uint8_t set_bmc_globals_cmd[] = { 0x18, 0x2e, 0x0f };
|
||||
static uint8_t set_bmc_globals_rsp[] = { 0x1c, 0x2e, 0x00 };
|
||||
static uint8_t enable_irq_cmd[] = { 0x05, 0xa1 };
|
||||
|
||||
static void emu_msg_handler(void)
|
||||
{
|
||||
uint8_t msg[100];
|
||||
unsigned int msg_len = sizeof(msg);
|
||||
|
||||
get_emu_msg(msg, &msg_len);
|
||||
g_assert(msg_len >= 5);
|
||||
g_assert(msg[msg_len - 1] == 0xa0);
|
||||
msg_len--;
|
||||
g_assert(ipmb_checksum(msg, msg_len, 0) == 0);
|
||||
msg_len--;
|
||||
if ((msg[1] == get_dev_id_cmd[0]) && (msg[2] == get_dev_id_cmd[1])) {
|
||||
memcpy(msg + 1, get_dev_id_rsp, sizeof(get_dev_id_rsp));
|
||||
msg_len = sizeof(get_dev_id_rsp) + 1;
|
||||
msg[msg_len] = -ipmb_checksum(msg, msg_len, 0);
|
||||
msg_len++;
|
||||
msg[msg_len++] = 0xa0;
|
||||
write_emu_msg(msg, msg_len);
|
||||
} else if ((msg[1] == set_bmc_globals_cmd[0]) &&
|
||||
(msg[2] == set_bmc_globals_cmd[1])) {
|
||||
write_emu_msg(enable_irq_cmd, sizeof(enable_irq_cmd));
|
||||
memcpy(msg + 1, set_bmc_globals_rsp, sizeof(set_bmc_globals_rsp));
|
||||
msg_len = sizeof(set_bmc_globals_rsp) + 1;
|
||||
msg[msg_len] = -ipmb_checksum(msg, msg_len, 0);
|
||||
msg_len++;
|
||||
msg[msg_len++] = 0xa0;
|
||||
write_emu_msg(msg, msg_len);
|
||||
} else {
|
||||
g_assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
static void bt_cmd(uint8_t *cmd, unsigned int cmd_len,
|
||||
uint8_t *rsp, unsigned int *rsp_len)
|
||||
{
|
||||
unsigned int i, len, j = 0;
|
||||
uint8_t seq = 5;
|
||||
|
||||
/* Should be idle */
|
||||
g_assert(bt_get_ctrlreg() == 0);
|
||||
|
||||
bt_wait_b_busy();
|
||||
IPMI_BT_CTLREG_SET_CLR_WR_PTR();
|
||||
bt_write_buf(cmd_len + 1);
|
||||
bt_write_buf(cmd[0]);
|
||||
bt_write_buf(seq);
|
||||
for (i = 1; i < cmd_len; i++) {
|
||||
bt_write_buf(cmd[i]);
|
||||
}
|
||||
IPMI_BT_CTLREG_SET_H2B_ATN();
|
||||
|
||||
emu_msg_handler(); /* We should get a message on the socket here. */
|
||||
|
||||
bt_wait_b2h_atn();
|
||||
if (bt_ints_enabled) {
|
||||
g_assert((bt_get_irqreg() & 0x02) == 0x02);
|
||||
g_assert(get_irq(IPMI_IRQ));
|
||||
bt_write_irqreg(0x03);
|
||||
} else {
|
||||
g_assert(!get_irq(IPMI_IRQ));
|
||||
}
|
||||
IPMI_BT_CTLREG_SET_H_BUSY();
|
||||
IPMI_BT_CTLREG_SET_B2H_ATN();
|
||||
IPMI_BT_CTLREG_SET_CLR_RD_PTR();
|
||||
len = bt_get_buf();
|
||||
g_assert(len >= 4);
|
||||
rsp[0] = bt_get_buf();
|
||||
assert(bt_get_buf() == seq);
|
||||
len--;
|
||||
for (j = 1; j < len; j++) {
|
||||
rsp[j] = bt_get_buf();
|
||||
}
|
||||
IPMI_BT_CTLREG_SET_H_BUSY();
|
||||
*rsp_len = j;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* We should get a connect request and a short message with capabilities.
|
||||
*/
|
||||
static void test_connect(void)
|
||||
{
|
||||
fd_set readfds;
|
||||
int rv;
|
||||
int val;
|
||||
struct timeval tv;
|
||||
uint8_t msg[100];
|
||||
unsigned int msglen;
|
||||
static uint8_t exp1[] = { 0xff, 0x01, 0xa1 }; /* A protocol version */
|
||||
static uint8_t exp2[] = { 0x08, 0x3f, 0xa1 }; /* A capabilities cmd */
|
||||
|
||||
FD_ZERO(&readfds);
|
||||
FD_SET(emu_lfd, &readfds);
|
||||
tv.tv_sec = 10;
|
||||
tv.tv_usec = 0;
|
||||
rv = select(emu_lfd + 1, &readfds, NULL, NULL, &tv);
|
||||
g_assert(rv == 1);
|
||||
emu_fd = accept(emu_lfd, NULL, 0);
|
||||
if (emu_fd < 0) {
|
||||
perror("accept");
|
||||
}
|
||||
g_assert(emu_fd >= 0);
|
||||
|
||||
val = 1;
|
||||
rv = setsockopt(emu_fd, IPPROTO_TCP, TCP_NODELAY, &val, sizeof(val));
|
||||
g_assert(rv != -1);
|
||||
|
||||
/* Report our version */
|
||||
write_emu_msg(exp1, sizeof(exp1));
|
||||
|
||||
/* Validate that we get the info we expect. */
|
||||
msglen = sizeof(msg);
|
||||
get_emu_msg(msg, &msglen);
|
||||
g_assert(msglen == sizeof(exp1));
|
||||
g_assert(memcmp(msg, exp1, msglen) == 0);
|
||||
msglen = sizeof(msg);
|
||||
get_emu_msg(msg, &msglen);
|
||||
g_assert(msglen == sizeof(exp2));
|
||||
g_assert(memcmp(msg, exp2, msglen) == 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Send a get_device_id to do a basic test.
|
||||
*/
|
||||
static void test_bt_base(void)
|
||||
{
|
||||
uint8_t rsp[20];
|
||||
unsigned int rsplen = sizeof(rsp);
|
||||
|
||||
bt_cmd(get_dev_id_cmd, sizeof(get_dev_id_cmd), rsp, &rsplen);
|
||||
g_assert(rsplen == sizeof(get_dev_id_rsp));
|
||||
g_assert(memcmp(get_dev_id_rsp, rsp, rsplen) == 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable IRQs for the interface.
|
||||
*/
|
||||
static void test_enable_irq(void)
|
||||
{
|
||||
uint8_t rsp[20];
|
||||
unsigned int rsplen = sizeof(rsp);
|
||||
|
||||
bt_cmd(set_bmc_globals_cmd, sizeof(set_bmc_globals_cmd), rsp, &rsplen);
|
||||
g_assert(rsplen == sizeof(set_bmc_globals_rsp));
|
||||
g_assert(memcmp(set_bmc_globals_rsp, rsp, rsplen) == 0);
|
||||
bt_write_irqreg(0x01);
|
||||
bt_ints_enabled = 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Create a local TCP socket with any port, then save off the port we got.
|
||||
*/
|
||||
static void open_socket(void)
|
||||
{
|
||||
struct sockaddr_in myaddr;
|
||||
socklen_t addrlen;
|
||||
|
||||
myaddr.sin_family = AF_INET;
|
||||
myaddr.sin_addr.s_addr = htonl(INADDR_LOOPBACK);
|
||||
myaddr.sin_port = 0;
|
||||
emu_lfd = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
|
||||
if (emu_lfd == -1) {
|
||||
perror("socket");
|
||||
exit(1);
|
||||
}
|
||||
if (bind(emu_lfd, (struct sockaddr *) &myaddr, sizeof(myaddr)) == -1) {
|
||||
perror("bind");
|
||||
exit(1);
|
||||
}
|
||||
addrlen = sizeof(myaddr);
|
||||
if (getsockname(emu_lfd, (struct sockaddr *) &myaddr , &addrlen) == -1) {
|
||||
perror("getsockname");
|
||||
exit(1);
|
||||
}
|
||||
emu_port = ntohs(myaddr.sin_port);
|
||||
assert(listen(emu_lfd, 1) != -1);
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int ret;
|
||||
|
||||
open_socket();
|
||||
|
||||
/* Run the tests */
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
global_qtest = qtest_initf(
|
||||
" -chardev socket,id=ipmi0,host=localhost,port=%d,reconnect=10"
|
||||
" -device ipmi-bmc-extern,chardev=ipmi0,id=bmc0"
|
||||
" -device isa-ipmi-bt,bmc=bmc0", emu_port);
|
||||
qtest_irq_intercept_in(global_qtest, "ioapic");
|
||||
qtest_add_func("/ipmi/extern/connect", test_connect);
|
||||
qtest_add_func("/ipmi/extern/bt_base", test_bt_base);
|
||||
qtest_add_func("/ipmi/extern/bt_enable_irq", test_enable_irq);
|
||||
qtest_add_func("/ipmi/extern/bt_base_irq", test_bt_base);
|
||||
ret = g_test_run();
|
||||
qtest_quit(global_qtest);
|
||||
|
||||
return ret;
|
||||
}
|
||||
285
tests/qtest/ipmi-kcs-test.c
Normal file
285
tests/qtest/ipmi-kcs-test.c
Normal file
|
|
@ -0,0 +1,285 @@
|
|||
/*
|
||||
* IPMI KCS test cases, using the local interface.
|
||||
*
|
||||
* Copyright (c) 2012 Corey Minyard <cminyard@mvista.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
|
||||
#include "libqtest-single.h"
|
||||
|
||||
#define IPMI_IRQ 5
|
||||
|
||||
#define IPMI_KCS_BASE 0xca2
|
||||
|
||||
#define IPMI_KCS_STATUS_ABORT 0x60
|
||||
#define IPMI_KCS_CMD_WRITE_START 0x61
|
||||
#define IPMI_KCS_CMD_WRITE_END 0x62
|
||||
#define IPMI_KCS_CMD_READ 0x68
|
||||
|
||||
#define IPMI_KCS_ABORTED_BY_CMD 0x01
|
||||
|
||||
#define IPMI_KCS_CMDREG_GET_STATE() ((kcs_get_cmdreg() >> 6) & 3)
|
||||
#define IPMI_KCS_STATE_IDLE 0
|
||||
#define IPMI_KCS_STATE_READ 1
|
||||
#define IPMI_KCS_STATE_WRITE 2
|
||||
#define IPMI_KCS_STATE_ERROR 3
|
||||
#define IPMI_KCS_CMDREG_GET_CD() ((kcs_get_cmdreg() >> 3) & 1)
|
||||
#define IPMI_KCS_CMDREG_GET_ATN() ((kcs_get_cmdreg() >> 2) & 1)
|
||||
#define IPMI_KCS_CMDREG_GET_IBF() ((kcs_get_cmdreg() >> 1) & 1)
|
||||
#define IPMI_KCS_CMDREG_GET_OBF() ((kcs_get_cmdreg() >> 0) & 1)
|
||||
|
||||
static int kcs_ints_enabled;
|
||||
|
||||
static uint8_t kcs_get_cmdreg(void)
|
||||
{
|
||||
return inb(IPMI_KCS_BASE + 1);
|
||||
}
|
||||
|
||||
static void kcs_write_cmdreg(uint8_t val)
|
||||
{
|
||||
outb(IPMI_KCS_BASE + 1, val);
|
||||
}
|
||||
|
||||
static uint8_t kcs_get_datareg(void)
|
||||
{
|
||||
return inb(IPMI_KCS_BASE);
|
||||
}
|
||||
|
||||
static void kcs_write_datareg(uint8_t val)
|
||||
{
|
||||
outb(IPMI_KCS_BASE, val);
|
||||
}
|
||||
|
||||
static void kcs_wait_ibf(void)
|
||||
{
|
||||
unsigned int count = 1000;
|
||||
while (IPMI_KCS_CMDREG_GET_IBF() != 0) {
|
||||
g_assert(--count != 0);
|
||||
}
|
||||
}
|
||||
|
||||
static void kcs_wait_obf(void)
|
||||
{
|
||||
unsigned int count = 1000;
|
||||
while (IPMI_KCS_CMDREG_GET_OBF() == 0) {
|
||||
g_assert(--count != 0);
|
||||
}
|
||||
}
|
||||
|
||||
static void kcs_clear_obf(void)
|
||||
{
|
||||
if (kcs_ints_enabled) {
|
||||
g_assert(get_irq(IPMI_IRQ));
|
||||
} else {
|
||||
g_assert(!get_irq(IPMI_IRQ));
|
||||
}
|
||||
g_assert(IPMI_KCS_CMDREG_GET_OBF() == 1);
|
||||
kcs_get_datareg();
|
||||
g_assert(IPMI_KCS_CMDREG_GET_OBF() == 0);
|
||||
g_assert(!get_irq(IPMI_IRQ));
|
||||
}
|
||||
|
||||
static void kcs_check_state(uint8_t state)
|
||||
{
|
||||
g_assert(IPMI_KCS_CMDREG_GET_STATE() == state);
|
||||
}
|
||||
|
||||
static void kcs_cmd(uint8_t *cmd, unsigned int cmd_len,
|
||||
uint8_t *rsp, unsigned int *rsp_len)
|
||||
{
|
||||
unsigned int i, j = 0;
|
||||
|
||||
/* Should be idle */
|
||||
g_assert(kcs_get_cmdreg() == 0);
|
||||
|
||||
kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_START);
|
||||
kcs_wait_ibf();
|
||||
kcs_check_state(IPMI_KCS_STATE_WRITE);
|
||||
kcs_clear_obf();
|
||||
for (i = 0; i < cmd_len; i++) {
|
||||
kcs_write_datareg(cmd[i]);
|
||||
kcs_wait_ibf();
|
||||
kcs_check_state(IPMI_KCS_STATE_WRITE);
|
||||
kcs_clear_obf();
|
||||
}
|
||||
kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_END);
|
||||
kcs_wait_ibf();
|
||||
kcs_check_state(IPMI_KCS_STATE_WRITE);
|
||||
kcs_clear_obf();
|
||||
kcs_write_datareg(0);
|
||||
next_read_byte:
|
||||
kcs_wait_ibf();
|
||||
switch (IPMI_KCS_CMDREG_GET_STATE()) {
|
||||
case IPMI_KCS_STATE_READ:
|
||||
kcs_wait_obf();
|
||||
g_assert(j < *rsp_len);
|
||||
rsp[j++] = kcs_get_datareg();
|
||||
kcs_write_datareg(IPMI_KCS_CMD_READ);
|
||||
goto next_read_byte;
|
||||
break;
|
||||
|
||||
case IPMI_KCS_STATE_IDLE:
|
||||
kcs_wait_obf();
|
||||
kcs_get_datareg();
|
||||
break;
|
||||
|
||||
default:
|
||||
g_assert(0);
|
||||
}
|
||||
*rsp_len = j;
|
||||
}
|
||||
|
||||
static void kcs_abort(uint8_t *cmd, unsigned int cmd_len,
|
||||
uint8_t *rsp, unsigned int *rsp_len)
|
||||
{
|
||||
unsigned int i, j = 0;
|
||||
unsigned int retries = 4;
|
||||
|
||||
/* Should be idle */
|
||||
g_assert(kcs_get_cmdreg() == 0);
|
||||
|
||||
kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_START);
|
||||
kcs_wait_ibf();
|
||||
kcs_check_state(IPMI_KCS_STATE_WRITE);
|
||||
kcs_clear_obf();
|
||||
for (i = 0; i < cmd_len; i++) {
|
||||
kcs_write_datareg(cmd[i]);
|
||||
kcs_wait_ibf();
|
||||
kcs_check_state(IPMI_KCS_STATE_WRITE);
|
||||
kcs_clear_obf();
|
||||
}
|
||||
kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_END);
|
||||
kcs_wait_ibf();
|
||||
kcs_check_state(IPMI_KCS_STATE_WRITE);
|
||||
kcs_clear_obf();
|
||||
kcs_write_datareg(0);
|
||||
kcs_wait_ibf();
|
||||
switch (IPMI_KCS_CMDREG_GET_STATE()) {
|
||||
case IPMI_KCS_STATE_READ:
|
||||
kcs_wait_obf();
|
||||
g_assert(j < *rsp_len);
|
||||
rsp[j++] = kcs_get_datareg();
|
||||
kcs_write_datareg(IPMI_KCS_CMD_READ);
|
||||
break;
|
||||
|
||||
default:
|
||||
g_assert(0);
|
||||
}
|
||||
|
||||
/* Start the abort here */
|
||||
retry_abort:
|
||||
g_assert(retries > 0);
|
||||
|
||||
kcs_wait_ibf();
|
||||
kcs_write_cmdreg(IPMI_KCS_STATUS_ABORT);
|
||||
kcs_wait_ibf();
|
||||
kcs_clear_obf();
|
||||
kcs_write_datareg(0);
|
||||
kcs_wait_ibf();
|
||||
if (IPMI_KCS_CMDREG_GET_STATE() != IPMI_KCS_STATE_READ) {
|
||||
retries--;
|
||||
goto retry_abort;
|
||||
}
|
||||
kcs_wait_obf();
|
||||
rsp[0] = kcs_get_datareg();
|
||||
kcs_write_datareg(IPMI_KCS_CMD_READ);
|
||||
kcs_wait_ibf();
|
||||
if (IPMI_KCS_CMDREG_GET_STATE() != IPMI_KCS_STATE_IDLE) {
|
||||
retries--;
|
||||
goto retry_abort;
|
||||
}
|
||||
kcs_wait_obf();
|
||||
kcs_clear_obf();
|
||||
|
||||
*rsp_len = j;
|
||||
}
|
||||
|
||||
|
||||
static uint8_t get_dev_id_cmd[] = { 0x18, 0x01 };
|
||||
static uint8_t get_dev_id_rsp[] = { 0x1c, 0x01, 0x00, 0x20, 0x00, 0x00, 0x00,
|
||||
0x02, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00 };
|
||||
|
||||
/*
|
||||
* Send a get_device_id to do a basic test.
|
||||
*/
|
||||
static void test_kcs_base(void)
|
||||
{
|
||||
uint8_t rsp[20];
|
||||
unsigned int rsplen = sizeof(rsp);
|
||||
|
||||
kcs_cmd(get_dev_id_cmd, sizeof(get_dev_id_cmd), rsp, &rsplen);
|
||||
g_assert(rsplen == sizeof(get_dev_id_rsp));
|
||||
g_assert(memcmp(get_dev_id_rsp, rsp, rsplen) == 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Abort a kcs operation while reading
|
||||
*/
|
||||
static void test_kcs_abort(void)
|
||||
{
|
||||
uint8_t rsp[20];
|
||||
unsigned int rsplen = sizeof(rsp);
|
||||
|
||||
kcs_abort(get_dev_id_cmd, sizeof(get_dev_id_cmd), rsp, &rsplen);
|
||||
g_assert(rsp[0] == IPMI_KCS_ABORTED_BY_CMD);
|
||||
}
|
||||
|
||||
static uint8_t set_bmc_globals_cmd[] = { 0x18, 0x2e, 0x0f };
|
||||
static uint8_t set_bmc_globals_rsp[] = { 0x1c, 0x2e, 0x00 };
|
||||
|
||||
/*
|
||||
* Enable interrupts
|
||||
*/
|
||||
static void test_enable_irq(void)
|
||||
{
|
||||
uint8_t rsp[20];
|
||||
unsigned int rsplen = sizeof(rsp);
|
||||
|
||||
kcs_cmd(set_bmc_globals_cmd, sizeof(set_bmc_globals_cmd), rsp, &rsplen);
|
||||
g_assert(rsplen == sizeof(set_bmc_globals_rsp));
|
||||
g_assert(memcmp(set_bmc_globals_rsp, rsp, rsplen) == 0);
|
||||
kcs_ints_enabled = 1;
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
char *cmdline;
|
||||
int ret;
|
||||
|
||||
/* Run the tests */
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
cmdline = g_strdup_printf("-device ipmi-bmc-sim,id=bmc0"
|
||||
" -device isa-ipmi-kcs,bmc=bmc0");
|
||||
qtest_start(cmdline);
|
||||
g_free(cmdline);
|
||||
qtest_irq_intercept_in(global_qtest, "ioapic");
|
||||
qtest_add_func("/ipmi/local/kcs_base", test_kcs_base);
|
||||
qtest_add_func("/ipmi/local/kcs_abort", test_kcs_abort);
|
||||
qtest_add_func("/ipmi/local/kcs_enable_irq", test_enable_irq);
|
||||
qtest_add_func("/ipmi/local/kcs_base_irq", test_kcs_base);
|
||||
qtest_add_func("/ipmi/local/kcs_abort_irq", test_kcs_abort);
|
||||
ret = g_test_run();
|
||||
qtest_quit(global_qtest);
|
||||
|
||||
return ret;
|
||||
}
|
||||
49
tests/qtest/ipoctal232-test.c
Normal file
49
tests/qtest/ipoctal232-test.c
Normal file
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* QTest testcase for IndustryPack Octal-RS232
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
typedef struct QIpoctal232 QIpoctal232;
|
||||
|
||||
struct QIpoctal232 {
|
||||
QOSGraphObject obj;
|
||||
};
|
||||
|
||||
/* Tests only initialization so far. TODO: Replace with functional tests */
|
||||
static void nop(void *obj, void *data, QGuestAllocator *alloc)
|
||||
{
|
||||
}
|
||||
|
||||
static void *ipoctal232_create(void *pci_bus, QGuestAllocator *alloc,
|
||||
void *addr)
|
||||
{
|
||||
QIpoctal232 *ipoctal232 = g_new0(QIpoctal232, 1);
|
||||
|
||||
return &ipoctal232->obj;
|
||||
}
|
||||
|
||||
static void ipoctal232_register_nodes(void)
|
||||
{
|
||||
qos_node_create_driver("ipoctal232", ipoctal232_create);
|
||||
qos_node_consumes("ipoctal232", "ipack", &(QOSGraphEdgeOptions) {
|
||||
.extra_device_opts = "bus=ipack0.0",
|
||||
});
|
||||
}
|
||||
|
||||
libqos_init(ipoctal232_register_nodes);
|
||||
|
||||
static void register_ipoctal232_test(void)
|
||||
{
|
||||
qos_add_test("nop", "ipoctal232", nop, NULL);
|
||||
}
|
||||
|
||||
libqos_init(register_ipoctal232_test);
|
||||
500
tests/qtest/ivshmem-test.c
Normal file
500
tests/qtest/ivshmem-test.c
Normal file
|
|
@ -0,0 +1,500 @@
|
|||
/*
|
||||
* QTest testcase for ivshmem
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
* Copyright (c) 2015 Red Hat, Inc.
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include <glib/gstdio.h>
|
||||
#include "contrib/ivshmem-server/ivshmem-server.h"
|
||||
#include "libqos/libqos-pc.h"
|
||||
#include "libqos/libqos-spapr.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu-common.h"
|
||||
|
||||
#define TMPSHMSIZE (1 << 20)
|
||||
static char *tmpshm;
|
||||
static void *tmpshmem;
|
||||
static char *tmpdir;
|
||||
static char *tmpserver;
|
||||
|
||||
static void save_fn(QPCIDevice *dev, int devfn, void *data)
|
||||
{
|
||||
QPCIDevice **pdev = (QPCIDevice **) data;
|
||||
|
||||
*pdev = dev;
|
||||
}
|
||||
|
||||
static QPCIDevice *get_device(QPCIBus *pcibus)
|
||||
{
|
||||
QPCIDevice *dev;
|
||||
|
||||
dev = NULL;
|
||||
qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
|
||||
g_assert(dev != NULL);
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
typedef struct _IVState {
|
||||
QOSState *qs;
|
||||
QPCIBar reg_bar, mem_bar;
|
||||
QPCIDevice *dev;
|
||||
} IVState;
|
||||
|
||||
enum Reg {
|
||||
INTRMASK = 0,
|
||||
INTRSTATUS = 4,
|
||||
IVPOSITION = 8,
|
||||
DOORBELL = 12,
|
||||
};
|
||||
|
||||
static const char* reg2str(enum Reg reg) {
|
||||
switch (reg) {
|
||||
case INTRMASK:
|
||||
return "IntrMask";
|
||||
case INTRSTATUS:
|
||||
return "IntrStatus";
|
||||
case IVPOSITION:
|
||||
return "IVPosition";
|
||||
case DOORBELL:
|
||||
return "DoorBell";
|
||||
default:
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned in_reg(IVState *s, enum Reg reg)
|
||||
{
|
||||
const char *name = reg2str(reg);
|
||||
unsigned res;
|
||||
|
||||
res = qpci_io_readl(s->dev, s->reg_bar, reg);
|
||||
g_test_message("*%s -> %x", name, res);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
|
||||
{
|
||||
const char *name = reg2str(reg);
|
||||
|
||||
g_test_message("%x -> *%s", v, name);
|
||||
qpci_io_writel(s->dev, s->reg_bar, reg, v);
|
||||
}
|
||||
|
||||
static inline void read_mem(IVState *s, uint64_t off, void *buf, size_t len)
|
||||
{
|
||||
qpci_memread(s->dev, s->mem_bar, off, buf, len);
|
||||
}
|
||||
|
||||
static inline void write_mem(IVState *s, uint64_t off,
|
||||
const void *buf, size_t len)
|
||||
{
|
||||
qpci_memwrite(s->dev, s->mem_bar, off, buf, len);
|
||||
}
|
||||
|
||||
static void cleanup_vm(IVState *s)
|
||||
{
|
||||
g_free(s->dev);
|
||||
qtest_shutdown(s->qs);
|
||||
}
|
||||
|
||||
static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
|
||||
{
|
||||
uint64_t barsize;
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
|
||||
s->qs = qtest_pc_boot(cmd);
|
||||
} else if (strcmp(arch, "ppc64") == 0) {
|
||||
s->qs = qtest_spapr_boot(cmd);
|
||||
} else {
|
||||
g_printerr("ivshmem-test tests are only available on x86 or ppc64\n");
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
s->dev = get_device(s->qs->pcibus);
|
||||
|
||||
s->reg_bar = qpci_iomap(s->dev, 0, &barsize);
|
||||
g_assert_cmpuint(barsize, ==, 256);
|
||||
|
||||
if (msix) {
|
||||
qpci_msix_enable(s->dev);
|
||||
}
|
||||
|
||||
s->mem_bar = qpci_iomap(s->dev, 2, &barsize);
|
||||
g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
|
||||
|
||||
qpci_device_enable(s->dev);
|
||||
}
|
||||
|
||||
static void setup_vm(IVState *s)
|
||||
{
|
||||
char *cmd = g_strdup_printf("-object memory-backend-file"
|
||||
",id=mb1,size=1M,share,mem-path=/dev/shm%s"
|
||||
" -device ivshmem-plain,memdev=mb1", tmpshm);
|
||||
|
||||
setup_vm_cmd(s, cmd, false);
|
||||
|
||||
g_free(cmd);
|
||||
}
|
||||
|
||||
static void test_ivshmem_single(void)
|
||||
{
|
||||
IVState state, *s;
|
||||
uint32_t data[1024];
|
||||
int i;
|
||||
|
||||
setup_vm(&state);
|
||||
s = &state;
|
||||
|
||||
/* initial state of readable registers */
|
||||
g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0);
|
||||
g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
|
||||
g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0);
|
||||
|
||||
/* trigger interrupt via registers */
|
||||
out_reg(s, INTRMASK, 0xffffffff);
|
||||
g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
|
||||
out_reg(s, INTRSTATUS, 1);
|
||||
/* check interrupt status */
|
||||
g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
|
||||
/* reading clears */
|
||||
g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
|
||||
/* TODO intercept actual interrupt (needs qtest work) */
|
||||
|
||||
/* invalid register access */
|
||||
out_reg(s, IVPOSITION, 1);
|
||||
in_reg(s, DOORBELL);
|
||||
|
||||
/* ring the (non-functional) doorbell */
|
||||
out_reg(s, DOORBELL, 8 << 16);
|
||||
|
||||
/* write shared memory */
|
||||
for (i = 0; i < G_N_ELEMENTS(data); i++) {
|
||||
data[i] = i;
|
||||
}
|
||||
write_mem(s, 0, data, sizeof(data));
|
||||
|
||||
/* verify write */
|
||||
for (i = 0; i < G_N_ELEMENTS(data); i++) {
|
||||
g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
|
||||
}
|
||||
|
||||
/* read it back and verify read */
|
||||
memset(data, 0, sizeof(data));
|
||||
read_mem(s, 0, data, sizeof(data));
|
||||
for (i = 0; i < G_N_ELEMENTS(data); i++) {
|
||||
g_assert_cmpuint(data[i], ==, i);
|
||||
}
|
||||
|
||||
cleanup_vm(s);
|
||||
}
|
||||
|
||||
static void test_ivshmem_pair(void)
|
||||
{
|
||||
IVState state1, state2, *s1, *s2;
|
||||
char *data;
|
||||
int i;
|
||||
|
||||
setup_vm(&state1);
|
||||
s1 = &state1;
|
||||
setup_vm(&state2);
|
||||
s2 = &state2;
|
||||
|
||||
data = g_malloc0(TMPSHMSIZE);
|
||||
|
||||
/* host write, guest 1 & 2 read */
|
||||
memset(tmpshmem, 0x42, TMPSHMSIZE);
|
||||
read_mem(s1, 0, data, TMPSHMSIZE);
|
||||
for (i = 0; i < TMPSHMSIZE; i++) {
|
||||
g_assert_cmpuint(data[i], ==, 0x42);
|
||||
}
|
||||
read_mem(s2, 0, data, TMPSHMSIZE);
|
||||
for (i = 0; i < TMPSHMSIZE; i++) {
|
||||
g_assert_cmpuint(data[i], ==, 0x42);
|
||||
}
|
||||
|
||||
/* guest 1 write, guest 2 read */
|
||||
memset(data, 0x43, TMPSHMSIZE);
|
||||
write_mem(s1, 0, data, TMPSHMSIZE);
|
||||
memset(data, 0, TMPSHMSIZE);
|
||||
read_mem(s2, 0, data, TMPSHMSIZE);
|
||||
for (i = 0; i < TMPSHMSIZE; i++) {
|
||||
g_assert_cmpuint(data[i], ==, 0x43);
|
||||
}
|
||||
|
||||
/* guest 2 write, guest 1 read */
|
||||
memset(data, 0x44, TMPSHMSIZE);
|
||||
write_mem(s2, 0, data, TMPSHMSIZE);
|
||||
memset(data, 0, TMPSHMSIZE);
|
||||
read_mem(s1, 0, data, TMPSHMSIZE);
|
||||
for (i = 0; i < TMPSHMSIZE; i++) {
|
||||
g_assert_cmpuint(data[i], ==, 0x44);
|
||||
}
|
||||
|
||||
cleanup_vm(s1);
|
||||
cleanup_vm(s2);
|
||||
g_free(data);
|
||||
}
|
||||
|
||||
typedef struct ServerThread {
|
||||
GThread *thread;
|
||||
IvshmemServer *server;
|
||||
int pipe[2]; /* to handle quit */
|
||||
} ServerThread;
|
||||
|
||||
static void *server_thread(void *data)
|
||||
{
|
||||
ServerThread *t = data;
|
||||
IvshmemServer *server = t->server;
|
||||
|
||||
while (true) {
|
||||
fd_set fds;
|
||||
int maxfd, ret;
|
||||
|
||||
FD_ZERO(&fds);
|
||||
FD_SET(t->pipe[0], &fds);
|
||||
maxfd = t->pipe[0] + 1;
|
||||
|
||||
ivshmem_server_get_fds(server, &fds, &maxfd);
|
||||
|
||||
ret = select(maxfd, &fds, NULL, NULL, NULL);
|
||||
|
||||
if (ret < 0) {
|
||||
if (errno == EINTR) {
|
||||
continue;
|
||||
}
|
||||
|
||||
g_critical("select error: %s\n", strerror(errno));
|
||||
break;
|
||||
}
|
||||
if (ret == 0) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (FD_ISSET(t->pipe[0], &fds)) {
|
||||
break;
|
||||
}
|
||||
|
||||
if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
|
||||
g_critical("ivshmem_server_handle_fds() failed\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void setup_vm_with_server(IVState *s, int nvectors)
|
||||
{
|
||||
char *cmd;
|
||||
|
||||
cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s "
|
||||
"-device ivshmem-doorbell,chardev=chr0,vectors=%d",
|
||||
tmpserver, nvectors);
|
||||
|
||||
setup_vm_cmd(s, cmd, true);
|
||||
|
||||
g_free(cmd);
|
||||
}
|
||||
|
||||
static void test_ivshmem_server(void)
|
||||
{
|
||||
IVState state1, state2, *s1, *s2;
|
||||
ServerThread thread;
|
||||
IvshmemServer server;
|
||||
int ret, vm1, vm2;
|
||||
int nvectors = 2;
|
||||
guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
|
||||
|
||||
ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
|
||||
TMPSHMSIZE, nvectors,
|
||||
g_test_verbose());
|
||||
g_assert_cmpint(ret, ==, 0);
|
||||
|
||||
ret = ivshmem_server_start(&server);
|
||||
g_assert_cmpint(ret, ==, 0);
|
||||
|
||||
thread.server = &server;
|
||||
ret = pipe(thread.pipe);
|
||||
g_assert_cmpint(ret, ==, 0);
|
||||
thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
|
||||
g_assert(thread.thread != NULL);
|
||||
|
||||
setup_vm_with_server(&state1, nvectors);
|
||||
s1 = &state1;
|
||||
setup_vm_with_server(&state2, nvectors);
|
||||
s2 = &state2;
|
||||
|
||||
/* check got different VM ids */
|
||||
vm1 = in_reg(s1, IVPOSITION);
|
||||
vm2 = in_reg(s2, IVPOSITION);
|
||||
g_assert_cmpint(vm1, >=, 0);
|
||||
g_assert_cmpint(vm2, >=, 0);
|
||||
g_assert_cmpint(vm1, !=, vm2);
|
||||
|
||||
/* check number of MSI-X vectors */
|
||||
ret = qpci_msix_table_size(s1->dev);
|
||||
g_assert_cmpuint(ret, ==, nvectors);
|
||||
|
||||
/* TODO test behavior before MSI-X is enabled */
|
||||
|
||||
/* ping vm2 -> vm1 on vector 0 */
|
||||
ret = qpci_msix_pending(s1->dev, 0);
|
||||
g_assert_cmpuint(ret, ==, 0);
|
||||
out_reg(s2, DOORBELL, vm1 << 16);
|
||||
do {
|
||||
g_usleep(10000);
|
||||
ret = qpci_msix_pending(s1->dev, 0);
|
||||
} while (ret == 0 && g_get_monotonic_time() < end_time);
|
||||
g_assert_cmpuint(ret, !=, 0);
|
||||
|
||||
/* ping vm1 -> vm2 on vector 1 */
|
||||
ret = qpci_msix_pending(s2->dev, 1);
|
||||
g_assert_cmpuint(ret, ==, 0);
|
||||
out_reg(s1, DOORBELL, vm2 << 16 | 1);
|
||||
do {
|
||||
g_usleep(10000);
|
||||
ret = qpci_msix_pending(s2->dev, 1);
|
||||
} while (ret == 0 && g_get_monotonic_time() < end_time);
|
||||
g_assert_cmpuint(ret, !=, 0);
|
||||
|
||||
cleanup_vm(s2);
|
||||
cleanup_vm(s1);
|
||||
|
||||
if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
|
||||
g_error("qemu_write_full: %s", g_strerror(errno));
|
||||
}
|
||||
|
||||
g_thread_join(thread.thread);
|
||||
|
||||
ivshmem_server_close(&server);
|
||||
close(thread.pipe[1]);
|
||||
close(thread.pipe[0]);
|
||||
}
|
||||
|
||||
#define PCI_SLOT_HP 0x06
|
||||
|
||||
static void test_ivshmem_hotplug(void)
|
||||
{
|
||||
QTestState *qts;
|
||||
const char *arch = qtest_get_arch();
|
||||
|
||||
qts = qtest_init("-object memory-backend-ram,size=1M,id=mb1");
|
||||
|
||||
qtest_qmp_device_add(qts, "ivshmem-plain", "iv1",
|
||||
"{'addr': %s, 'memdev': 'mb1'}",
|
||||
stringify(PCI_SLOT_HP));
|
||||
if (strcmp(arch, "ppc64") != 0) {
|
||||
qpci_unplug_acpi_device_test(qts, "iv1", PCI_SLOT_HP);
|
||||
}
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_ivshmem_memdev(void)
|
||||
{
|
||||
IVState state;
|
||||
|
||||
/* just for the sake of checking memory-backend property */
|
||||
setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
|
||||
" -device ivshmem-plain,memdev=mb1", false);
|
||||
|
||||
cleanup_vm(&state);
|
||||
}
|
||||
|
||||
static void cleanup(void)
|
||||
{
|
||||
if (tmpshmem) {
|
||||
munmap(tmpshmem, TMPSHMSIZE);
|
||||
tmpshmem = NULL;
|
||||
}
|
||||
|
||||
if (tmpshm) {
|
||||
shm_unlink(tmpshm);
|
||||
g_free(tmpshm);
|
||||
tmpshm = NULL;
|
||||
}
|
||||
|
||||
if (tmpserver) {
|
||||
g_unlink(tmpserver);
|
||||
g_free(tmpserver);
|
||||
tmpserver = NULL;
|
||||
}
|
||||
|
||||
if (tmpdir) {
|
||||
g_rmdir(tmpdir);
|
||||
tmpdir = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static void abrt_handler(void *data)
|
||||
{
|
||||
cleanup();
|
||||
}
|
||||
|
||||
static gchar *mktempshm(int size, int *fd)
|
||||
{
|
||||
while (true) {
|
||||
gchar *name;
|
||||
|
||||
name = g_strdup_printf("/qtest-%u-%u", getpid(), g_test_rand_int());
|
||||
*fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
|
||||
S_IRWXU|S_IRWXG|S_IRWXO);
|
||||
if (*fd > 0) {
|
||||
g_assert(ftruncate(*fd, size) == 0);
|
||||
return name;
|
||||
}
|
||||
|
||||
g_free(name);
|
||||
|
||||
if (errno != EEXIST) {
|
||||
perror("shm_open");
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int ret, fd;
|
||||
const char *arch = qtest_get_arch();
|
||||
gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
|
||||
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
|
||||
qtest_add_abrt_handler(abrt_handler, NULL);
|
||||
/* shm */
|
||||
tmpshm = mktempshm(TMPSHMSIZE, &fd);
|
||||
if (!tmpshm) {
|
||||
goto out;
|
||||
}
|
||||
tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
|
||||
g_assert(tmpshmem != MAP_FAILED);
|
||||
/* server */
|
||||
if (mkdtemp(dir) == NULL) {
|
||||
g_error("mkdtemp: %s", g_strerror(errno));
|
||||
}
|
||||
tmpdir = dir;
|
||||
tmpserver = g_strconcat(tmpdir, "/server", NULL);
|
||||
|
||||
qtest_add_func("/ivshmem/single", test_ivshmem_single);
|
||||
qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
|
||||
qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
|
||||
if (g_test_slow()) {
|
||||
qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
|
||||
if (strcmp(arch, "ppc64") != 0) {
|
||||
qtest_add_func("/ivshmem/server", test_ivshmem_server);
|
||||
}
|
||||
}
|
||||
|
||||
out:
|
||||
ret = g_test_run();
|
||||
cleanup();
|
||||
return ret;
|
||||
}
|
||||
95
tests/qtest/libqos/aarch64-xlnx-zcu102-machine.c
Normal file
95
tests/qtest/libqos/aarch64-xlnx-zcu102-machine.c
Normal file
|
|
@ -0,0 +1,95 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "sdhci.h"
|
||||
|
||||
typedef struct QXlnxZCU102Machine QXlnxZCU102Machine;
|
||||
|
||||
struct QXlnxZCU102Machine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
QSDHCI_MemoryMapped sdhci;
|
||||
};
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define XLNX_ZCU102_RAM_ADDR 0
|
||||
#define XLNX_ZCU102_RAM_SIZE 0x20000000
|
||||
|
||||
static void *xlnx_zcu102_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QXlnxZCU102Machine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in aarch64/xlnx-zcu102\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *xlnx_zcu102_get_device(void *obj, const char *device)
|
||||
{
|
||||
QXlnxZCU102Machine *machine = obj;
|
||||
if (!g_strcmp0(device, "generic-sdhci")) {
|
||||
return &machine->sdhci.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in aarch64/xlnx-zcu102\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void xlnx_zcu102_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QXlnxZCU102Machine *machine = (QXlnxZCU102Machine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *qos_create_machine_aarch64_xlnx_zcu102(QTestState *qts)
|
||||
{
|
||||
QXlnxZCU102Machine *machine = g_new0(QXlnxZCU102Machine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
XLNX_ZCU102_RAM_ADDR + (1 << 20),
|
||||
XLNX_ZCU102_RAM_ADDR + XLNX_ZCU102_RAM_SIZE,
|
||||
ARM_PAGE_SIZE);
|
||||
|
||||
machine->obj.get_device = xlnx_zcu102_get_device;
|
||||
machine->obj.get_driver = xlnx_zcu102_get_driver;
|
||||
machine->obj.destructor = xlnx_zcu102_destructor;
|
||||
/* Datasheet: UG1085 (v1.7) */
|
||||
qos_init_sdhci_mm(&machine->sdhci, qts, 0xff160000, &(QSDHCIProperties) {
|
||||
.version = 3,
|
||||
.baseclock = 0,
|
||||
.capab.sdma = true,
|
||||
.capab.reg = 0x280737ec6481
|
||||
});
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void xlnx_zcu102_register_nodes(void)
|
||||
{
|
||||
qos_node_create_machine("aarch64/xlnx-zcu102",
|
||||
qos_create_machine_aarch64_xlnx_zcu102);
|
||||
qos_node_contains("aarch64/xlnx-zcu102", "generic-sdhci", NULL);
|
||||
}
|
||||
|
||||
libqos_init(xlnx_zcu102_register_nodes);
|
||||
1242
tests/qtest/libqos/ahci.c
Normal file
1242
tests/qtest/libqos/ahci.c
Normal file
File diff suppressed because it is too large
Load diff
651
tests/qtest/libqos/ahci.h
Normal file
651
tests/qtest/libqos/ahci.h
Normal file
|
|
@ -0,0 +1,651 @@
|
|||
#ifndef LIBQOS_AHCI_H
|
||||
#define LIBQOS_AHCI_H
|
||||
|
||||
/*
|
||||
* AHCI qtest library functions and definitions
|
||||
*
|
||||
* Copyright (c) 2014 John Snow <jsnow@redhat.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "libqos/libqos.h"
|
||||
#include "libqos/pci.h"
|
||||
#include "libqos/malloc-pc.h"
|
||||
|
||||
/*** Supplementary PCI Config Space IDs & Masks ***/
|
||||
#define PCI_DEVICE_ID_INTEL_Q35_AHCI (0x2922)
|
||||
#define PCI_MSI_FLAGS_RESERVED (0xFF00)
|
||||
#define PCI_PM_CTRL_RESERVED (0xFC)
|
||||
#define PCI_BCC(REG32) ((REG32) >> 24)
|
||||
#define PCI_PI(REG32) (((REG32) >> 8) & 0xFF)
|
||||
#define PCI_SCC(REG32) (((REG32) >> 16) & 0xFF)
|
||||
|
||||
/*** Recognized AHCI Device Types ***/
|
||||
#define AHCI_INTEL_ICH9 (PCI_DEVICE_ID_INTEL_Q35_AHCI << 16 | \
|
||||
PCI_VENDOR_ID_INTEL)
|
||||
|
||||
/*** AHCI/HBA Register Offsets and Bitmasks ***/
|
||||
#define AHCI_CAP (0)
|
||||
#define AHCI_CAP_NP (0x1F)
|
||||
#define AHCI_CAP_SXS (0x20)
|
||||
#define AHCI_CAP_EMS (0x40)
|
||||
#define AHCI_CAP_CCCS (0x80)
|
||||
#define AHCI_CAP_NCS (0x1F00)
|
||||
#define AHCI_CAP_PSC (0x2000)
|
||||
#define AHCI_CAP_SSC (0x4000)
|
||||
#define AHCI_CAP_PMD (0x8000)
|
||||
#define AHCI_CAP_FBSS (0x10000)
|
||||
#define AHCI_CAP_SPM (0x20000)
|
||||
#define AHCI_CAP_SAM (0x40000)
|
||||
#define AHCI_CAP_RESERVED (0x80000)
|
||||
#define AHCI_CAP_ISS (0xF00000)
|
||||
#define AHCI_CAP_SCLO (0x1000000)
|
||||
#define AHCI_CAP_SAL (0x2000000)
|
||||
#define AHCI_CAP_SALP (0x4000000)
|
||||
#define AHCI_CAP_SSS (0x8000000)
|
||||
#define AHCI_CAP_SMPS (0x10000000)
|
||||
#define AHCI_CAP_SSNTF (0x20000000)
|
||||
#define AHCI_CAP_SNCQ (0x40000000)
|
||||
#define AHCI_CAP_S64A (0x80000000)
|
||||
|
||||
#define AHCI_GHC (1)
|
||||
#define AHCI_GHC_HR (0x01)
|
||||
#define AHCI_GHC_IE (0x02)
|
||||
#define AHCI_GHC_MRSM (0x04)
|
||||
#define AHCI_GHC_RESERVED (0x7FFFFFF8)
|
||||
#define AHCI_GHC_AE (0x80000000)
|
||||
|
||||
#define AHCI_IS (2)
|
||||
#define AHCI_PI (3)
|
||||
#define AHCI_VS (4)
|
||||
|
||||
#define AHCI_CCCCTL (5)
|
||||
#define AHCI_CCCCTL_EN (0x01)
|
||||
#define AHCI_CCCCTL_RESERVED (0x06)
|
||||
#define AHCI_CCCCTL_CC (0xFF00)
|
||||
#define AHCI_CCCCTL_TV (0xFFFF0000)
|
||||
|
||||
#define AHCI_CCCPORTS (6)
|
||||
#define AHCI_EMLOC (7)
|
||||
|
||||
#define AHCI_EMCTL (8)
|
||||
#define AHCI_EMCTL_STSMR (0x01)
|
||||
#define AHCI_EMCTL_CTLTM (0x100)
|
||||
#define AHCI_EMCTL_CTLRST (0x200)
|
||||
#define AHCI_EMCTL_RESERVED (0xF0F0FCFE)
|
||||
|
||||
#define AHCI_CAP2 (9)
|
||||
#define AHCI_CAP2_BOH (0x01)
|
||||
#define AHCI_CAP2_NVMP (0x02)
|
||||
#define AHCI_CAP2_APST (0x04)
|
||||
#define AHCI_CAP2_RESERVED (0xFFFFFFF8)
|
||||
|
||||
#define AHCI_BOHC (10)
|
||||
#define AHCI_RESERVED (11)
|
||||
#define AHCI_NVMHCI (24)
|
||||
#define AHCI_VENDOR (40)
|
||||
#define AHCI_PORTS (64)
|
||||
|
||||
/*** Port Memory Offsets & Bitmasks ***/
|
||||
#define AHCI_PX_CLB (0)
|
||||
#define AHCI_PX_CLB_RESERVED (0x1FF)
|
||||
|
||||
#define AHCI_PX_CLBU (1)
|
||||
|
||||
#define AHCI_PX_FB (2)
|
||||
#define AHCI_PX_FB_RESERVED (0xFF)
|
||||
|
||||
#define AHCI_PX_FBU (3)
|
||||
|
||||
#define AHCI_PX_IS (4)
|
||||
#define AHCI_PX_IS_DHRS (0x1)
|
||||
#define AHCI_PX_IS_PSS (0x2)
|
||||
#define AHCI_PX_IS_DSS (0x4)
|
||||
#define AHCI_PX_IS_SDBS (0x8)
|
||||
#define AHCI_PX_IS_UFS (0x10)
|
||||
#define AHCI_PX_IS_DPS (0x20)
|
||||
#define AHCI_PX_IS_PCS (0x40)
|
||||
#define AHCI_PX_IS_DMPS (0x80)
|
||||
#define AHCI_PX_IS_RESERVED (0x23FFF00)
|
||||
#define AHCI_PX_IS_PRCS (0x400000)
|
||||
#define AHCI_PX_IS_IPMS (0x800000)
|
||||
#define AHCI_PX_IS_OFS (0x1000000)
|
||||
#define AHCI_PX_IS_INFS (0x4000000)
|
||||
#define AHCI_PX_IS_IFS (0x8000000)
|
||||
#define AHCI_PX_IS_HBDS (0x10000000)
|
||||
#define AHCI_PX_IS_HBFS (0x20000000)
|
||||
#define AHCI_PX_IS_TFES (0x40000000)
|
||||
#define AHCI_PX_IS_CPDS (0x80000000)
|
||||
|
||||
#define AHCI_PX_IE (5)
|
||||
#define AHCI_PX_IE_DHRE (0x1)
|
||||
#define AHCI_PX_IE_PSE (0x2)
|
||||
#define AHCI_PX_IE_DSE (0x4)
|
||||
#define AHCI_PX_IE_SDBE (0x8)
|
||||
#define AHCI_PX_IE_UFE (0x10)
|
||||
#define AHCI_PX_IE_DPE (0x20)
|
||||
#define AHCI_PX_IE_PCE (0x40)
|
||||
#define AHCI_PX_IE_DMPE (0x80)
|
||||
#define AHCI_PX_IE_RESERVED (0x23FFF00)
|
||||
#define AHCI_PX_IE_PRCE (0x400000)
|
||||
#define AHCI_PX_IE_IPME (0x800000)
|
||||
#define AHCI_PX_IE_OFE (0x1000000)
|
||||
#define AHCI_PX_IE_INFE (0x4000000)
|
||||
#define AHCI_PX_IE_IFE (0x8000000)
|
||||
#define AHCI_PX_IE_HBDE (0x10000000)
|
||||
#define AHCI_PX_IE_HBFE (0x20000000)
|
||||
#define AHCI_PX_IE_TFEE (0x40000000)
|
||||
#define AHCI_PX_IE_CPDE (0x80000000)
|
||||
|
||||
#define AHCI_PX_CMD (6)
|
||||
#define AHCI_PX_CMD_ST (0x1)
|
||||
#define AHCI_PX_CMD_SUD (0x2)
|
||||
#define AHCI_PX_CMD_POD (0x4)
|
||||
#define AHCI_PX_CMD_CLO (0x8)
|
||||
#define AHCI_PX_CMD_FRE (0x10)
|
||||
#define AHCI_PX_CMD_RESERVED (0xE0)
|
||||
#define AHCI_PX_CMD_CCS (0x1F00)
|
||||
#define AHCI_PX_CMD_MPSS (0x2000)
|
||||
#define AHCI_PX_CMD_FR (0x4000)
|
||||
#define AHCI_PX_CMD_CR (0x8000)
|
||||
#define AHCI_PX_CMD_CPS (0x10000)
|
||||
#define AHCI_PX_CMD_PMA (0x20000)
|
||||
#define AHCI_PX_CMD_HPCP (0x40000)
|
||||
#define AHCI_PX_CMD_MPSP (0x80000)
|
||||
#define AHCI_PX_CMD_CPD (0x100000)
|
||||
#define AHCI_PX_CMD_ESP (0x200000)
|
||||
#define AHCI_PX_CMD_FBSCP (0x400000)
|
||||
#define AHCI_PX_CMD_APSTE (0x800000)
|
||||
#define AHCI_PX_CMD_ATAPI (0x1000000)
|
||||
#define AHCI_PX_CMD_DLAE (0x2000000)
|
||||
#define AHCI_PX_CMD_ALPE (0x4000000)
|
||||
#define AHCI_PX_CMD_ASP (0x8000000)
|
||||
#define AHCI_PX_CMD_ICC (0xF0000000)
|
||||
|
||||
#define AHCI_PX_RES1 (7)
|
||||
|
||||
#define AHCI_PX_TFD (8)
|
||||
#define AHCI_PX_TFD_STS (0xFF)
|
||||
#define AHCI_PX_TFD_STS_ERR (0x01)
|
||||
#define AHCI_PX_TFD_STS_CS1 (0x06)
|
||||
#define AHCI_PX_TFD_STS_DRQ (0x08)
|
||||
#define AHCI_PX_TFD_STS_CS2 (0x70)
|
||||
#define AHCI_PX_TFD_STS_BSY (0x80)
|
||||
#define AHCI_PX_TFD_ERR (0xFF00)
|
||||
#define AHCI_PX_TFD_RESERVED (0xFFFF0000)
|
||||
|
||||
#define AHCI_PX_SIG (9)
|
||||
#define AHCI_PX_SIG_SECTOR_COUNT (0xFF)
|
||||
#define AHCI_PX_SIG_LBA_LOW (0xFF00)
|
||||
#define AHCI_PX_SIG_LBA_MID (0xFF0000)
|
||||
#define AHCI_PX_SIG_LBA_HIGH (0xFF000000)
|
||||
|
||||
#define AHCI_PX_SSTS (10)
|
||||
#define AHCI_PX_SSTS_DET (0x0F)
|
||||
#define AHCI_PX_SSTS_SPD (0xF0)
|
||||
#define AHCI_PX_SSTS_IPM (0xF00)
|
||||
#define AHCI_PX_SSTS_RESERVED (0xFFFFF000)
|
||||
#define SSTS_DET_NO_DEVICE (0x00)
|
||||
#define SSTS_DET_PRESENT (0x01)
|
||||
#define SSTS_DET_ESTABLISHED (0x03)
|
||||
#define SSTS_DET_OFFLINE (0x04)
|
||||
|
||||
#define AHCI_PX_SCTL (11)
|
||||
|
||||
#define AHCI_PX_SERR (12)
|
||||
#define AHCI_PX_SERR_ERR (0xFFFF)
|
||||
#define AHCI_PX_SERR_DIAG (0xFFFF0000)
|
||||
#define AHCI_PX_SERR_DIAG_X (0x04000000)
|
||||
|
||||
#define AHCI_PX_SACT (13)
|
||||
#define AHCI_PX_CI (14)
|
||||
#define AHCI_PX_SNTF (15)
|
||||
|
||||
#define AHCI_PX_FBS (16)
|
||||
#define AHCI_PX_FBS_EN (0x1)
|
||||
#define AHCI_PX_FBS_DEC (0x2)
|
||||
#define AHCI_PX_FBS_SDE (0x4)
|
||||
#define AHCI_PX_FBS_DEV (0xF00)
|
||||
#define AHCI_PX_FBS_ADO (0xF000)
|
||||
#define AHCI_PX_FBS_DWE (0xF0000)
|
||||
#define AHCI_PX_FBS_RESERVED (0xFFF000F8)
|
||||
|
||||
#define AHCI_PX_RES2 (17)
|
||||
#define AHCI_PX_VS (28)
|
||||
|
||||
#define HBA_DATA_REGION_SIZE (256)
|
||||
#define HBA_PORT_DATA_SIZE (128)
|
||||
#define HBA_PORT_NUM_REG (HBA_PORT_DATA_SIZE/4)
|
||||
|
||||
#define AHCI_VERSION_0_95 (0x00000905)
|
||||
#define AHCI_VERSION_1_0 (0x00010000)
|
||||
#define AHCI_VERSION_1_1 (0x00010100)
|
||||
#define AHCI_VERSION_1_2 (0x00010200)
|
||||
#define AHCI_VERSION_1_3 (0x00010300)
|
||||
|
||||
#define AHCI_SECTOR_SIZE (512)
|
||||
#define ATAPI_SECTOR_SIZE (2048)
|
||||
|
||||
#define AHCI_SIGNATURE_CDROM (0xeb140101)
|
||||
#define AHCI_SIGNATURE_DISK (0x00000101)
|
||||
|
||||
/* FIS types */
|
||||
enum {
|
||||
REG_H2D_FIS = 0x27,
|
||||
REG_D2H_FIS = 0x34,
|
||||
DMA_ACTIVATE_FIS = 0x39,
|
||||
DMA_SETUP_FIS = 0x41,
|
||||
DATA_FIS = 0x46,
|
||||
BIST_ACTIVATE_FIS = 0x58,
|
||||
PIO_SETUP_FIS = 0x5F,
|
||||
SDB_FIS = 0xA1
|
||||
};
|
||||
|
||||
/* FIS flags */
|
||||
#define REG_H2D_FIS_CMD 0x80
|
||||
|
||||
/* ATA Commands */
|
||||
enum {
|
||||
/* DMA */
|
||||
CMD_READ_DMA = 0xC8,
|
||||
CMD_READ_DMA_EXT = 0x25,
|
||||
CMD_WRITE_DMA = 0xCA,
|
||||
CMD_WRITE_DMA_EXT = 0x35,
|
||||
/* PIO */
|
||||
CMD_READ_PIO = 0x20,
|
||||
CMD_READ_PIO_EXT = 0x24,
|
||||
CMD_WRITE_PIO = 0x30,
|
||||
CMD_WRITE_PIO_EXT = 0x34,
|
||||
/* Misc */
|
||||
CMD_READ_MAX = 0xF8,
|
||||
CMD_READ_MAX_EXT = 0x27,
|
||||
CMD_FLUSH_CACHE = 0xE7,
|
||||
CMD_IDENTIFY = 0xEC,
|
||||
CMD_PACKET = 0xA0,
|
||||
CMD_PACKET_ID = 0xA1,
|
||||
/* NCQ */
|
||||
READ_FPDMA_QUEUED = 0x60,
|
||||
WRITE_FPDMA_QUEUED = 0x61,
|
||||
};
|
||||
|
||||
/* ATAPI Commands */
|
||||
enum {
|
||||
CMD_ATAPI_TEST_UNIT_READY = 0x00,
|
||||
CMD_ATAPI_REQUEST_SENSE = 0x03,
|
||||
CMD_ATAPI_START_STOP_UNIT = 0x1b,
|
||||
CMD_ATAPI_READ_10 = 0x28,
|
||||
CMD_ATAPI_READ_CD = 0xbe,
|
||||
};
|
||||
|
||||
enum {
|
||||
SENSE_NO_SENSE = 0x00,
|
||||
SENSE_NOT_READY = 0x02,
|
||||
SENSE_UNIT_ATTENTION = 0x06,
|
||||
};
|
||||
|
||||
enum {
|
||||
ASC_MEDIUM_MAY_HAVE_CHANGED = 0x28,
|
||||
ASC_MEDIUM_NOT_PRESENT = 0x3a,
|
||||
};
|
||||
|
||||
/* AHCI Command Header Flags & Masks*/
|
||||
#define CMDH_CFL (0x1F)
|
||||
#define CMDH_ATAPI (0x20)
|
||||
#define CMDH_WRITE (0x40)
|
||||
#define CMDH_PREFETCH (0x80)
|
||||
#define CMDH_RESET (0x100)
|
||||
#define CMDH_BIST (0x200)
|
||||
#define CMDH_CLR_BSY (0x400)
|
||||
#define CMDH_RES (0x800)
|
||||
#define CMDH_PMP (0xF000)
|
||||
|
||||
/* ATA device register masks */
|
||||
#define ATA_DEVICE_MAGIC 0xA0 /* used in ata1-3 */
|
||||
#define ATA_DEVICE_LBA 0x40
|
||||
#define NCQ_DEVICE_MAGIC 0x40 /* for ncq device registers */
|
||||
#define ATA_DEVICE_DRIVE 0x10
|
||||
#define ATA_DEVICE_HEAD 0x0F
|
||||
|
||||
/*** Structures ***/
|
||||
|
||||
typedef struct AHCIPortQState {
|
||||
uint64_t fb;
|
||||
uint64_t clb;
|
||||
uint64_t ctba[32];
|
||||
uint16_t prdtl[32];
|
||||
uint8_t next; /** Next Command Slot to Use **/
|
||||
} AHCIPortQState;
|
||||
|
||||
typedef struct AHCIQState {
|
||||
QOSState *parent;
|
||||
QPCIDevice *dev;
|
||||
QPCIBar hba_bar;
|
||||
uint64_t barsize;
|
||||
uint32_t fingerprint;
|
||||
uint32_t cap;
|
||||
uint32_t cap2;
|
||||
AHCIPortQState port[32];
|
||||
bool enabled;
|
||||
} AHCIQState;
|
||||
|
||||
/**
|
||||
* Generic FIS structure.
|
||||
*/
|
||||
typedef struct FIS {
|
||||
uint8_t fis_type;
|
||||
uint8_t flags;
|
||||
char data[0];
|
||||
} __attribute__((__packed__)) FIS;
|
||||
|
||||
/**
|
||||
* Register device-to-host FIS structure.
|
||||
*/
|
||||
typedef struct RegD2HFIS {
|
||||
/* DW0 */
|
||||
uint8_t fis_type;
|
||||
uint8_t flags;
|
||||
uint8_t status;
|
||||
uint8_t error;
|
||||
/* DW1 */
|
||||
uint8_t lba_lo[3];
|
||||
uint8_t device;
|
||||
/* DW2 */
|
||||
uint8_t lba_hi[3];
|
||||
uint8_t res0;
|
||||
/* DW3 */
|
||||
uint16_t count;
|
||||
uint16_t res1;
|
||||
/* DW4 */
|
||||
uint32_t res2;
|
||||
} __attribute__((__packed__)) RegD2HFIS;
|
||||
|
||||
/**
|
||||
* Register device-to-host FIS structure;
|
||||
* PIO Setup variety.
|
||||
*/
|
||||
typedef struct PIOSetupFIS {
|
||||
/* DW0 */
|
||||
uint8_t fis_type;
|
||||
uint8_t flags;
|
||||
uint8_t status;
|
||||
uint8_t error;
|
||||
/* DW1 */
|
||||
uint8_t lba_lo[3];
|
||||
uint8_t device;
|
||||
/* DW2 */
|
||||
uint8_t lba_hi[3];
|
||||
uint8_t res0;
|
||||
/* DW3 */
|
||||
uint16_t count;
|
||||
uint8_t res1;
|
||||
uint8_t e_status;
|
||||
/* DW4 */
|
||||
uint16_t tx_count;
|
||||
uint16_t res2;
|
||||
} __attribute__((__packed__)) PIOSetupFIS;
|
||||
|
||||
/**
|
||||
* Register host-to-device FIS structure.
|
||||
*/
|
||||
typedef struct RegH2DFIS {
|
||||
/* DW0 */
|
||||
uint8_t fis_type;
|
||||
uint8_t flags;
|
||||
uint8_t command;
|
||||
uint8_t feature_low;
|
||||
/* DW1 */
|
||||
uint8_t lba_lo[3];
|
||||
uint8_t device;
|
||||
/* DW2 */
|
||||
uint8_t lba_hi[3];
|
||||
uint8_t feature_high;
|
||||
/* DW3 */
|
||||
uint16_t count;
|
||||
uint8_t icc;
|
||||
uint8_t control;
|
||||
/* DW4 */
|
||||
uint8_t aux[4];
|
||||
} __attribute__((__packed__)) RegH2DFIS;
|
||||
|
||||
/**
|
||||
* Register host-to-device FIS structure, for NCQ commands.
|
||||
* Actually just a RegH2DFIS, but with fields repurposed.
|
||||
* Repurposed fields are annotated below.
|
||||
*/
|
||||
typedef struct NCQFIS {
|
||||
/* DW0 */
|
||||
uint8_t fis_type;
|
||||
uint8_t flags;
|
||||
uint8_t command;
|
||||
uint8_t sector_low; /* H2D: Feature 7:0 */
|
||||
/* DW1 */
|
||||
uint8_t lba_lo[3];
|
||||
uint8_t device;
|
||||
/* DW2 */
|
||||
uint8_t lba_hi[3];
|
||||
uint8_t sector_hi; /* H2D: Feature 15:8 */
|
||||
/* DW3 */
|
||||
uint8_t tag; /* H2D: Count 0:7 */
|
||||
uint8_t prio; /* H2D: Count 15:8 */
|
||||
uint8_t icc;
|
||||
uint8_t control;
|
||||
/* DW4 */
|
||||
uint8_t aux[4];
|
||||
} __attribute__((__packed__)) NCQFIS;
|
||||
|
||||
/**
|
||||
* Command List entry structure.
|
||||
* The command list contains between 1-32 of these structures.
|
||||
*/
|
||||
typedef struct AHCICommandHeader {
|
||||
uint16_t flags; /* Cmd-Fis-Len, PMP#, and flags. */
|
||||
uint16_t prdtl; /* Phys Region Desc. Table Length */
|
||||
uint32_t prdbc; /* Phys Region Desc. Byte Count */
|
||||
uint64_t ctba; /* Command Table Descriptor Base Address */
|
||||
uint32_t res[4];
|
||||
} __attribute__((__packed__)) AHCICommandHeader;
|
||||
|
||||
/**
|
||||
* Physical Region Descriptor; pointed to by the Command List Header,
|
||||
* struct ahci_command.
|
||||
*/
|
||||
typedef struct PRD {
|
||||
uint64_t dba; /* Data Base Address */
|
||||
uint32_t res; /* Reserved */
|
||||
uint32_t dbc; /* Data Byte Count (0-indexed) & Interrupt Flag (bit 2^31) */
|
||||
} __attribute__((__packed__)) PRD;
|
||||
|
||||
/* Opaque, defined within ahci.c */
|
||||
typedef struct AHCICommand AHCICommand;
|
||||
|
||||
/* Options to ahci_exec */
|
||||
typedef struct AHCIOpts {
|
||||
size_t size; /* Size of transfer */
|
||||
unsigned prd_size; /* Size per-each PRD */
|
||||
bool set_bcl; /* Override the default BCL of ATAPI_SECTOR_SIZE */
|
||||
unsigned bcl; /* Byte Count Limit, for ATAPI PIO */
|
||||
uint64_t lba; /* Starting LBA offset */
|
||||
uint64_t buffer; /* Pointer to source or destination guest buffer */
|
||||
bool atapi; /* ATAPI command? */
|
||||
bool atapi_dma; /* Use DMA for ATAPI? */
|
||||
bool error;
|
||||
int (*pre_cb)(AHCIQState*, AHCICommand*, const struct AHCIOpts *);
|
||||
int (*mid_cb)(AHCIQState*, AHCICommand*, const struct AHCIOpts *);
|
||||
int (*post_cb)(AHCIQState*, AHCICommand*, const struct AHCIOpts *);
|
||||
void *opaque;
|
||||
} AHCIOpts;
|
||||
|
||||
/*** Macro Utilities ***/
|
||||
#define BITANY(data, mask) (((data) & (mask)) != 0)
|
||||
#define BITSET(data, mask) (((data) & (mask)) == (mask))
|
||||
#define BITCLR(data, mask) (((data) & (mask)) == 0)
|
||||
#define ASSERT_BIT_SET(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
|
||||
#define ASSERT_BIT_CLEAR(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
|
||||
|
||||
/* For calculating how big the PRD table needs to be: */
|
||||
#define CMD_TBL_SIZ(n) ((0x80 + ((n) * sizeof(PRD)) + 0x7F) & ~0x7F)
|
||||
|
||||
/* Helpers for reading/writing AHCI HBA register values */
|
||||
|
||||
static inline uint32_t ahci_mread(AHCIQState *ahci, size_t offset)
|
||||
{
|
||||
return qpci_io_readl(ahci->dev, ahci->hba_bar, offset);
|
||||
}
|
||||
|
||||
static inline void ahci_mwrite(AHCIQState *ahci, size_t offset, uint32_t value)
|
||||
{
|
||||
qpci_io_writel(ahci->dev, ahci->hba_bar, offset, value);
|
||||
}
|
||||
|
||||
static inline uint32_t ahci_rreg(AHCIQState *ahci, uint32_t reg_num)
|
||||
{
|
||||
return ahci_mread(ahci, 4 * reg_num);
|
||||
}
|
||||
|
||||
static inline void ahci_wreg(AHCIQState *ahci, uint32_t reg_num, uint32_t value)
|
||||
{
|
||||
ahci_mwrite(ahci, 4 * reg_num, value);
|
||||
}
|
||||
|
||||
static inline void ahci_set(AHCIQState *ahci, uint32_t reg_num, uint32_t mask)
|
||||
{
|
||||
ahci_wreg(ahci, reg_num, ahci_rreg(ahci, reg_num) | mask);
|
||||
}
|
||||
|
||||
static inline void ahci_clr(AHCIQState *ahci, uint32_t reg_num, uint32_t mask)
|
||||
{
|
||||
ahci_wreg(ahci, reg_num, ahci_rreg(ahci, reg_num) & ~mask);
|
||||
}
|
||||
|
||||
static inline size_t ahci_px_offset(uint8_t port, uint32_t reg_num)
|
||||
{
|
||||
return AHCI_PORTS + (HBA_PORT_NUM_REG * port) + reg_num;
|
||||
}
|
||||
|
||||
static inline uint32_t ahci_px_rreg(AHCIQState *ahci, uint8_t port,
|
||||
uint32_t reg_num)
|
||||
{
|
||||
return ahci_rreg(ahci, ahci_px_offset(port, reg_num));
|
||||
}
|
||||
|
||||
static inline void ahci_px_wreg(AHCIQState *ahci, uint8_t port,
|
||||
uint32_t reg_num, uint32_t value)
|
||||
{
|
||||
ahci_wreg(ahci, ahci_px_offset(port, reg_num), value);
|
||||
}
|
||||
|
||||
static inline void ahci_px_set(AHCIQState *ahci, uint8_t port,
|
||||
uint32_t reg_num, uint32_t mask)
|
||||
{
|
||||
ahci_px_wreg(ahci, port, reg_num,
|
||||
ahci_px_rreg(ahci, port, reg_num) | mask);
|
||||
}
|
||||
|
||||
static inline void ahci_px_clr(AHCIQState *ahci, uint8_t port,
|
||||
uint32_t reg_num, uint32_t mask)
|
||||
{
|
||||
ahci_px_wreg(ahci, port, reg_num,
|
||||
ahci_px_rreg(ahci, port, reg_num) & ~mask);
|
||||
}
|
||||
|
||||
/*** Prototypes ***/
|
||||
uint64_t ahci_alloc(AHCIQState *ahci, size_t bytes);
|
||||
void ahci_free(AHCIQState *ahci, uint64_t addr);
|
||||
void ahci_clean_mem(AHCIQState *ahci);
|
||||
|
||||
/* Device management */
|
||||
QPCIDevice *get_ahci_device(QTestState *qts, uint32_t *fingerprint);
|
||||
void free_ahci_device(QPCIDevice *dev);
|
||||
void ahci_pci_enable(AHCIQState *ahci);
|
||||
void start_ahci_device(AHCIQState *ahci);
|
||||
void ahci_hba_enable(AHCIQState *ahci);
|
||||
|
||||
/* Port Management */
|
||||
unsigned ahci_port_select(AHCIQState *ahci);
|
||||
void ahci_port_clear(AHCIQState *ahci, uint8_t port);
|
||||
|
||||
/* Command header / table management */
|
||||
unsigned ahci_pick_cmd(AHCIQState *ahci, uint8_t port);
|
||||
void ahci_get_command_header(AHCIQState *ahci, uint8_t port,
|
||||
uint8_t slot, AHCICommandHeader *cmd);
|
||||
void ahci_set_command_header(AHCIQState *ahci, uint8_t port,
|
||||
uint8_t slot, AHCICommandHeader *cmd);
|
||||
void ahci_destroy_command(AHCIQState *ahci, uint8_t port, uint8_t slot);
|
||||
|
||||
/* AHCI sanity check routines */
|
||||
void ahci_port_check_error(AHCIQState *ahci, uint8_t port,
|
||||
uint32_t imask, uint8_t emask);
|
||||
void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port,
|
||||
uint32_t intr_mask);
|
||||
void ahci_port_check_nonbusy(AHCIQState *ahci, uint8_t port, uint8_t slot);
|
||||
void ahci_port_check_d2h_sanity(AHCIQState *ahci, uint8_t port, uint8_t slot);
|
||||
void ahci_port_check_pio_sanity(AHCIQState *ahci, AHCICommand *cmd);
|
||||
void ahci_port_check_cmd_sanity(AHCIQState *ahci, AHCICommand *cmd);
|
||||
|
||||
/* Misc */
|
||||
bool is_atapi(AHCIQState *ahci, uint8_t port);
|
||||
unsigned size_to_prdtl(unsigned bytes, unsigned bytes_per_prd);
|
||||
|
||||
/* Command: Macro level execution */
|
||||
void ahci_guest_io(AHCIQState *ahci, uint8_t port, uint8_t ide_cmd,
|
||||
uint64_t gbuffer, size_t size, uint64_t sector);
|
||||
AHCICommand *ahci_guest_io_halt(AHCIQState *ahci, uint8_t port, uint8_t ide_cmd,
|
||||
uint64_t gbuffer, size_t size, uint64_t sector);
|
||||
void ahci_guest_io_resume(AHCIQState *ahci, AHCICommand *cmd);
|
||||
void ahci_io(AHCIQState *ahci, uint8_t port, uint8_t ide_cmd,
|
||||
void *buffer, size_t bufsize, uint64_t sector);
|
||||
void ahci_exec(AHCIQState *ahci, uint8_t port,
|
||||
uint8_t op, const AHCIOpts *opts);
|
||||
void ahci_atapi_test_ready(AHCIQState *ahci, uint8_t port, bool ready,
|
||||
uint8_t expected_sense);
|
||||
void ahci_atapi_get_sense(AHCIQState *ahci, uint8_t port,
|
||||
uint8_t *sense, uint8_t *asc);
|
||||
void ahci_atapi_eject(AHCIQState *ahci, uint8_t port);
|
||||
void ahci_atapi_load(AHCIQState *ahci, uint8_t port);
|
||||
|
||||
/* Command: Fine-grained lifecycle */
|
||||
AHCICommand *ahci_command_create(uint8_t command_name);
|
||||
AHCICommand *ahci_atapi_command_create(uint8_t scsi_cmd, uint16_t bcl, bool dma);
|
||||
void ahci_command_commit(AHCIQState *ahci, AHCICommand *cmd, uint8_t port);
|
||||
void ahci_command_issue(AHCIQState *ahci, AHCICommand *cmd);
|
||||
void ahci_command_issue_async(AHCIQState *ahci, AHCICommand *cmd);
|
||||
void ahci_command_wait(AHCIQState *ahci, AHCICommand *cmd);
|
||||
void ahci_command_verify(AHCIQState *ahci, AHCICommand *cmd);
|
||||
void ahci_command_free(AHCICommand *cmd);
|
||||
|
||||
/* Command: adjustments */
|
||||
void ahci_command_set_flags(AHCICommand *cmd, uint16_t cmdh_flags);
|
||||
void ahci_command_clr_flags(AHCICommand *cmd, uint16_t cmdh_flags);
|
||||
void ahci_command_set_offset(AHCICommand *cmd, uint64_t lba_sect);
|
||||
void ahci_command_set_buffer(AHCICommand *cmd, uint64_t buffer);
|
||||
void ahci_command_set_size(AHCICommand *cmd, uint64_t xbytes);
|
||||
void ahci_command_set_prd_size(AHCICommand *cmd, unsigned prd_size);
|
||||
void ahci_command_set_sizes(AHCICommand *cmd, uint64_t xbytes,
|
||||
unsigned prd_size);
|
||||
void ahci_command_set_acmd(AHCICommand *cmd, void *acmd);
|
||||
void ahci_command_enable_atapi_dma(AHCICommand *cmd);
|
||||
void ahci_command_adjust(AHCICommand *cmd, uint64_t lba_sect, uint64_t gbuffer,
|
||||
uint64_t xbytes, unsigned prd_size);
|
||||
|
||||
/* Command: Misc */
|
||||
uint8_t ahci_command_slot(AHCICommand *cmd);
|
||||
void ahci_write_fis(AHCIQState *ahci, AHCICommand *cmd);
|
||||
|
||||
#endif
|
||||
92
tests/qtest/libqos/arm-imx25-pdk-machine.c
Normal file
92
tests/qtest/libqos/arm-imx25-pdk-machine.c
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2019 Red Hat, Inc.
|
||||
*
|
||||
* Author: Paolo Bonzini <pbonzini@redhat.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/i2c.h"
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define IMX25_PDK_RAM_START 0x80000000
|
||||
#define IMX25_PDK_RAM_END 0x88000000
|
||||
|
||||
typedef struct QIMX25PDKMachine QIMX25PDKMachine;
|
||||
|
||||
struct QIMX25PDKMachine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
IMXI2C i2c_1;
|
||||
};
|
||||
|
||||
static void *imx25_pdk_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QIMX25PDKMachine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/imx25_pdk\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *imx25_pdk_get_device(void *obj, const char *device)
|
||||
{
|
||||
QIMX25PDKMachine *machine = obj;
|
||||
if (!g_strcmp0(device, "imx.i2c")) {
|
||||
return &machine->i2c_1.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/imx25_pdk\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void imx25_pdk_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QIMX25PDKMachine *machine = (QIMX25PDKMachine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *qos_create_machine_arm_imx25_pdk(QTestState *qts)
|
||||
{
|
||||
QIMX25PDKMachine *machine = g_new0(QIMX25PDKMachine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
IMX25_PDK_RAM_START,
|
||||
IMX25_PDK_RAM_END,
|
||||
ARM_PAGE_SIZE);
|
||||
machine->obj.get_device = imx25_pdk_get_device;
|
||||
machine->obj.get_driver = imx25_pdk_get_driver;
|
||||
machine->obj.destructor = imx25_pdk_destructor;
|
||||
|
||||
imx_i2c_init(&machine->i2c_1, qts, 0x43f80000);
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void imx25_pdk_register_nodes(void)
|
||||
{
|
||||
QOSGraphEdgeOptions edge = {
|
||||
.extra_device_opts = "bus=i2c-bus.0"
|
||||
};
|
||||
qos_node_create_machine("arm/imx25-pdk", qos_create_machine_arm_imx25_pdk);
|
||||
qos_node_contains("arm/imx25-pdk", "imx.i2c", &edge, NULL);
|
||||
}
|
||||
|
||||
libqos_init(imx25_pdk_register_nodes);
|
||||
92
tests/qtest/libqos/arm-n800-machine.c
Normal file
92
tests/qtest/libqos/arm-n800-machine.c
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2019 Red Hat, Inc.
|
||||
*
|
||||
* Author: Paolo Bonzini <pbonzini@redhat.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/i2c.h"
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define N800_RAM_START 0x80000000
|
||||
#define N800_RAM_END 0x88000000
|
||||
|
||||
typedef struct QN800Machine QN800Machine;
|
||||
|
||||
struct QN800Machine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
OMAPI2C i2c_1;
|
||||
};
|
||||
|
||||
static void *n800_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QN800Machine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/n800\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *n800_get_device(void *obj, const char *device)
|
||||
{
|
||||
QN800Machine *machine = obj;
|
||||
if (!g_strcmp0(device, "omap_i2c")) {
|
||||
return &machine->i2c_1.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/n800\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void n800_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QN800Machine *machine = (QN800Machine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *qos_create_machine_arm_n800(QTestState *qts)
|
||||
{
|
||||
QN800Machine *machine = g_new0(QN800Machine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
N800_RAM_START,
|
||||
N800_RAM_END,
|
||||
ARM_PAGE_SIZE);
|
||||
machine->obj.get_device = n800_get_device;
|
||||
machine->obj.get_driver = n800_get_driver;
|
||||
machine->obj.destructor = n800_destructor;
|
||||
|
||||
omap_i2c_init(&machine->i2c_1, qts, 0x48070000);
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void n800_register_nodes(void)
|
||||
{
|
||||
QOSGraphEdgeOptions edge = {
|
||||
.extra_device_opts = "bus=i2c-bus.0"
|
||||
};
|
||||
qos_node_create_machine("arm/n800", qos_create_machine_arm_n800);
|
||||
qos_node_contains("arm/n800", "omap_i2c", &edge, NULL);
|
||||
}
|
||||
|
||||
libqos_init(n800_register_nodes);
|
||||
92
tests/qtest/libqos/arm-raspi2-machine.c
Normal file
92
tests/qtest/libqos/arm-raspi2-machine.c
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "sdhci.h"
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define RASPI2_RAM_ADDR 0
|
||||
#define RASPI2_RAM_SIZE 0x20000000
|
||||
|
||||
typedef struct QRaspi2Machine QRaspi2Machine;
|
||||
|
||||
struct QRaspi2Machine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
QSDHCI_MemoryMapped sdhci;
|
||||
};
|
||||
|
||||
static void *raspi2_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QRaspi2Machine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/raspi2\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *raspi2_get_device(void *obj, const char *device)
|
||||
{
|
||||
QRaspi2Machine *machine = obj;
|
||||
if (!g_strcmp0(device, "generic-sdhci")) {
|
||||
return &machine->sdhci.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/raspi2\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void raspi2_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QRaspi2Machine *machine = (QRaspi2Machine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *qos_create_machine_arm_raspi2(QTestState *qts)
|
||||
{
|
||||
QRaspi2Machine *machine = g_new0(QRaspi2Machine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
RASPI2_RAM_ADDR + (1 << 20),
|
||||
RASPI2_RAM_ADDR + RASPI2_RAM_SIZE,
|
||||
ARM_PAGE_SIZE);
|
||||
machine->obj.get_device = raspi2_get_device;
|
||||
machine->obj.get_driver = raspi2_get_driver;
|
||||
machine->obj.destructor = raspi2_destructor;
|
||||
qos_init_sdhci_mm(&machine->sdhci, qts, 0x3f300000, &(QSDHCIProperties) {
|
||||
.version = 3,
|
||||
.baseclock = 52,
|
||||
.capab.sdma = false,
|
||||
.capab.reg = 0x052134b4
|
||||
});
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void raspi2_register_nodes(void)
|
||||
{
|
||||
qos_node_create_machine("arm/raspi2", qos_create_machine_arm_raspi2);
|
||||
qos_node_contains("arm/raspi2", "generic-sdhci", NULL);
|
||||
}
|
||||
|
||||
libqos_init(raspi2_register_nodes);
|
||||
92
tests/qtest/libqos/arm-sabrelite-machine.c
Normal file
92
tests/qtest/libqos/arm-sabrelite-machine.c
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "sdhci.h"
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define SABRELITE_RAM_START 0x10000000
|
||||
#define SABRELITE_RAM_END 0x30000000
|
||||
|
||||
typedef struct QSabreliteMachine QSabreliteMachine;
|
||||
|
||||
struct QSabreliteMachine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
QSDHCI_MemoryMapped sdhci;
|
||||
};
|
||||
|
||||
static void *sabrelite_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QSabreliteMachine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/sabrelite\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *sabrelite_get_device(void *obj, const char *device)
|
||||
{
|
||||
QSabreliteMachine *machine = obj;
|
||||
if (!g_strcmp0(device, "generic-sdhci")) {
|
||||
return &machine->sdhci.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/sabrelite\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void sabrelite_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QSabreliteMachine *machine = (QSabreliteMachine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *qos_create_machine_arm_sabrelite(QTestState *qts)
|
||||
{
|
||||
QSabreliteMachine *machine = g_new0(QSabreliteMachine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
SABRELITE_RAM_START,
|
||||
SABRELITE_RAM_END,
|
||||
ARM_PAGE_SIZE);
|
||||
machine->obj.get_device = sabrelite_get_device;
|
||||
machine->obj.get_driver = sabrelite_get_driver;
|
||||
machine->obj.destructor = sabrelite_destructor;
|
||||
qos_init_sdhci_mm(&machine->sdhci, qts, 0x02190000, &(QSDHCIProperties) {
|
||||
.version = 3,
|
||||
.baseclock = 0,
|
||||
.capab.sdma = true,
|
||||
.capab.reg = 0x057834b4,
|
||||
});
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void sabrelite_register_nodes(void)
|
||||
{
|
||||
qos_node_create_machine("arm/sabrelite", qos_create_machine_arm_sabrelite);
|
||||
qos_node_contains("arm/sabrelite", "generic-sdhci", NULL);
|
||||
}
|
||||
|
||||
libqos_init(sabrelite_register_nodes);
|
||||
92
tests/qtest/libqos/arm-smdkc210-machine.c
Normal file
92
tests/qtest/libqos/arm-smdkc210-machine.c
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "sdhci.h"
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define SMDKC210_RAM_ADDR 0x40000000ull
|
||||
#define SMDKC210_RAM_SIZE 0x40000000ull
|
||||
|
||||
typedef struct QSmdkc210Machine QSmdkc210Machine;
|
||||
|
||||
struct QSmdkc210Machine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
QSDHCI_MemoryMapped sdhci;
|
||||
};
|
||||
|
||||
static void *smdkc210_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QSmdkc210Machine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/smdkc210\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *smdkc210_get_device(void *obj, const char *device)
|
||||
{
|
||||
QSmdkc210Machine *machine = obj;
|
||||
if (!g_strcmp0(device, "generic-sdhci")) {
|
||||
return &machine->sdhci.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/smdkc210\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void smdkc210_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QSmdkc210Machine *machine = (QSmdkc210Machine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *qos_create_machine_arm_smdkc210(QTestState *qts)
|
||||
{
|
||||
QSmdkc210Machine *machine = g_new0(QSmdkc210Machine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
SMDKC210_RAM_ADDR,
|
||||
SMDKC210_RAM_ADDR + SMDKC210_RAM_SIZE,
|
||||
ARM_PAGE_SIZE);
|
||||
machine->obj.get_device = smdkc210_get_device;
|
||||
machine->obj.get_driver = smdkc210_get_driver;
|
||||
machine->obj.destructor = smdkc210_destructor;
|
||||
qos_init_sdhci_mm(&machine->sdhci, qts, 0x12510000, &(QSDHCIProperties) {
|
||||
.version = 2,
|
||||
.baseclock = 0,
|
||||
.capab.sdma = true,
|
||||
.capab.reg = 0x5e80080,
|
||||
});
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void smdkc210_register_nodes(void)
|
||||
{
|
||||
qos_node_create_machine("arm/smdkc210", qos_create_machine_arm_smdkc210);
|
||||
qos_node_contains("arm/smdkc210", "generic-sdhci", NULL);
|
||||
}
|
||||
|
||||
libqos_init(smdkc210_register_nodes);
|
||||
91
tests/qtest/libqos/arm-virt-machine.c
Normal file
91
tests/qtest/libqos/arm-virt-machine.c
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio-mmio.h"
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define VIRTIO_MMIO_BASE_ADDR 0x0A003E00
|
||||
#define ARM_VIRT_RAM_ADDR 0x40000000
|
||||
#define ARM_VIRT_RAM_SIZE 0x20000000
|
||||
#define VIRTIO_MMIO_SIZE 0x00000200
|
||||
|
||||
typedef struct QVirtMachine QVirtMachine;
|
||||
|
||||
struct QVirtMachine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
QVirtioMMIODevice virtio_mmio;
|
||||
};
|
||||
|
||||
static void virt_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtMachine *machine = (QVirtMachine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *virt_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QVirtMachine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/virtio\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *virt_get_device(void *obj, const char *device)
|
||||
{
|
||||
QVirtMachine *machine = obj;
|
||||
if (!g_strcmp0(device, "virtio-mmio")) {
|
||||
return &machine->virtio_mmio.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/virtio\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *qos_create_machine_arm_virt(QTestState *qts)
|
||||
{
|
||||
QVirtMachine *machine = g_new0(QVirtMachine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
ARM_VIRT_RAM_ADDR,
|
||||
ARM_VIRT_RAM_ADDR + ARM_VIRT_RAM_SIZE,
|
||||
ARM_PAGE_SIZE);
|
||||
qvirtio_mmio_init_device(&machine->virtio_mmio, qts, VIRTIO_MMIO_BASE_ADDR,
|
||||
VIRTIO_MMIO_SIZE);
|
||||
|
||||
machine->obj.get_device = virt_get_device;
|
||||
machine->obj.get_driver = virt_get_driver;
|
||||
machine->obj.destructor = virt_destructor;
|
||||
return machine;
|
||||
}
|
||||
|
||||
static void virtio_mmio_register_nodes(void)
|
||||
{
|
||||
qos_node_create_machine("arm/virt", qos_create_machine_arm_virt);
|
||||
qos_node_contains("arm/virt", "virtio-mmio", NULL);
|
||||
}
|
||||
|
||||
libqos_init(virtio_mmio_register_nodes);
|
||||
95
tests/qtest/libqos/arm-xilinx-zynq-a9-machine.c
Normal file
95
tests/qtest/libqos/arm-xilinx-zynq-a9-machine.c
Normal file
|
|
@ -0,0 +1,95 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "sdhci.h"
|
||||
|
||||
typedef struct QXilinxZynqA9Machine QXilinxZynqA9Machine;
|
||||
|
||||
struct QXilinxZynqA9Machine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
QSDHCI_MemoryMapped sdhci;
|
||||
};
|
||||
|
||||
#define ARM_PAGE_SIZE 4096
|
||||
#define XILINX_ZYNQ_A9_RAM_ADDR 0
|
||||
#define XILINX_ZYNQ_A9_RAM_SIZE 0x20000000
|
||||
|
||||
static void *xilinx_zynq_a9_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QXilinxZynqA9Machine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/xilinx-zynq-a9\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *xilinx_zynq_a9_get_device(void *obj, const char *device)
|
||||
{
|
||||
QXilinxZynqA9Machine *machine = obj;
|
||||
if (!g_strcmp0(device, "generic-sdhci")) {
|
||||
return &machine->sdhci.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in arm/xilinx-zynq-a9\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void xilinx_zynq_a9_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QXilinxZynqA9Machine *machine = (QXilinxZynqA9Machine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *qos_create_machine_arm_xilinx_zynq_a9(QTestState *qts)
|
||||
{
|
||||
QXilinxZynqA9Machine *machine = g_new0(QXilinxZynqA9Machine, 1);
|
||||
|
||||
alloc_init(&machine->alloc, 0,
|
||||
XILINX_ZYNQ_A9_RAM_ADDR + (1 << 20),
|
||||
XILINX_ZYNQ_A9_RAM_ADDR + XILINX_ZYNQ_A9_RAM_SIZE,
|
||||
ARM_PAGE_SIZE);
|
||||
|
||||
machine->obj.get_device = xilinx_zynq_a9_get_device;
|
||||
machine->obj.get_driver = xilinx_zynq_a9_get_driver;
|
||||
machine->obj.destructor = xilinx_zynq_a9_destructor;
|
||||
/* Datasheet: UG585 (v1.12.1) */
|
||||
qos_init_sdhci_mm(&machine->sdhci, qts, 0xe0100000, &(QSDHCIProperties) {
|
||||
.version = 2,
|
||||
.baseclock = 0,
|
||||
.capab.sdma = true,
|
||||
.capab.reg = 0x69ec0080,
|
||||
});
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void xilinx_zynq_a9_register_nodes(void)
|
||||
{
|
||||
qos_node_create_machine("arm/xilinx-zynq-a9",
|
||||
qos_create_machine_arm_xilinx_zynq_a9);
|
||||
qos_node_contains("arm/xilinx-zynq-a9", "generic-sdhci", NULL);
|
||||
}
|
||||
|
||||
libqos_init(xilinx_zynq_a9_register_nodes);
|
||||
266
tests/qtest/libqos/e1000e.c
Normal file
266
tests/qtest/libqos/e1000e.c
Normal file
|
|
@ -0,0 +1,266 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/pci-pc.h"
|
||||
#include "qemu/sockets.h"
|
||||
#include "qemu/iov.h"
|
||||
#include "qemu/module.h"
|
||||
#include "qemu/bitops.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "e1000e.h"
|
||||
|
||||
#define E1000E_IMS (0x00d0)
|
||||
|
||||
#define E1000E_STATUS (0x0008)
|
||||
#define E1000E_STATUS_LU BIT(1)
|
||||
#define E1000E_STATUS_ASDV1000 BIT(9)
|
||||
|
||||
#define E1000E_CTRL (0x0000)
|
||||
#define E1000E_CTRL_RESET BIT(26)
|
||||
|
||||
#define E1000E_RCTL (0x0100)
|
||||
#define E1000E_RCTL_EN BIT(1)
|
||||
#define E1000E_RCTL_UPE BIT(3)
|
||||
#define E1000E_RCTL_MPE BIT(4)
|
||||
|
||||
#define E1000E_RFCTL (0x5008)
|
||||
#define E1000E_RFCTL_EXTEN BIT(15)
|
||||
|
||||
#define E1000E_TCTL (0x0400)
|
||||
#define E1000E_TCTL_EN BIT(1)
|
||||
|
||||
#define E1000E_CTRL_EXT (0x0018)
|
||||
#define E1000E_CTRL_EXT_DRV_LOAD BIT(28)
|
||||
#define E1000E_CTRL_EXT_TXLSFLOW BIT(22)
|
||||
|
||||
#define E1000E_IVAR (0x00E4)
|
||||
#define E1000E_IVAR_TEST_CFG ((E1000E_RX0_MSG_ID << 0) | BIT(3) | \
|
||||
(E1000E_TX0_MSG_ID << 8) | BIT(11) | \
|
||||
(E1000E_OTHER_MSG_ID << 16) | BIT(19) | \
|
||||
BIT(31))
|
||||
|
||||
#define E1000E_RING_LEN (0x1000)
|
||||
|
||||
#define E1000E_TDBAL (0x3800)
|
||||
|
||||
#define E1000E_TDBAH (0x3804)
|
||||
#define E1000E_TDH (0x3810)
|
||||
|
||||
#define E1000E_RDBAL (0x2800)
|
||||
#define E1000E_RDBAH (0x2804)
|
||||
#define E1000E_RDH (0x2810)
|
||||
|
||||
#define E1000E_TXD_LEN (16)
|
||||
#define E1000E_RXD_LEN (16)
|
||||
|
||||
static void e1000e_macreg_write(QE1000E *d, uint32_t reg, uint32_t val)
|
||||
{
|
||||
QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e);
|
||||
qpci_io_writel(&d_pci->pci_dev, d_pci->mac_regs, reg, val);
|
||||
}
|
||||
|
||||
static uint32_t e1000e_macreg_read(QE1000E *d, uint32_t reg)
|
||||
{
|
||||
QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e);
|
||||
return qpci_io_readl(&d_pci->pci_dev, d_pci->mac_regs, reg);
|
||||
}
|
||||
|
||||
void e1000e_tx_ring_push(QE1000E *d, void *descr)
|
||||
{
|
||||
QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e);
|
||||
uint32_t tail = e1000e_macreg_read(d, E1000E_TDT);
|
||||
uint32_t len = e1000e_macreg_read(d, E1000E_TDLEN) / E1000E_TXD_LEN;
|
||||
|
||||
qtest_memwrite(d_pci->pci_dev.bus->qts, d->tx_ring + tail * E1000E_TXD_LEN,
|
||||
descr, E1000E_TXD_LEN);
|
||||
e1000e_macreg_write(d, E1000E_TDT, (tail + 1) % len);
|
||||
|
||||
/* Read WB data for the packet transmitted */
|
||||
qtest_memread(d_pci->pci_dev.bus->qts, d->tx_ring + tail * E1000E_TXD_LEN,
|
||||
descr, E1000E_TXD_LEN);
|
||||
}
|
||||
|
||||
void e1000e_rx_ring_push(QE1000E *d, void *descr)
|
||||
{
|
||||
QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e);
|
||||
uint32_t tail = e1000e_macreg_read(d, E1000E_RDT);
|
||||
uint32_t len = e1000e_macreg_read(d, E1000E_RDLEN) / E1000E_RXD_LEN;
|
||||
|
||||
qtest_memwrite(d_pci->pci_dev.bus->qts, d->rx_ring + tail * E1000E_RXD_LEN,
|
||||
descr, E1000E_RXD_LEN);
|
||||
e1000e_macreg_write(d, E1000E_RDT, (tail + 1) % len);
|
||||
|
||||
/* Read WB data for the packet received */
|
||||
qtest_memread(d_pci->pci_dev.bus->qts, d->rx_ring + tail * E1000E_RXD_LEN,
|
||||
descr, E1000E_RXD_LEN);
|
||||
}
|
||||
|
||||
static void e1000e_foreach_callback(QPCIDevice *dev, int devfn, void *data)
|
||||
{
|
||||
QPCIDevice *res = data;
|
||||
memcpy(res, dev, sizeof(QPCIDevice));
|
||||
g_free(dev);
|
||||
}
|
||||
|
||||
void e1000e_wait_isr(QE1000E *d, uint16_t msg_id)
|
||||
{
|
||||
QE1000E_PCI *d_pci = container_of(d, QE1000E_PCI, e1000e);
|
||||
guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
|
||||
|
||||
do {
|
||||
if (qpci_msix_pending(&d_pci->pci_dev, msg_id)) {
|
||||
return;
|
||||
}
|
||||
qtest_clock_step(d_pci->pci_dev.bus->qts, 10000);
|
||||
} while (g_get_monotonic_time() < end_time);
|
||||
|
||||
g_error("Timeout expired");
|
||||
}
|
||||
|
||||
static void e1000e_pci_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QE1000E_PCI *epci = (QE1000E_PCI *) obj;
|
||||
qpci_iounmap(&epci->pci_dev, epci->mac_regs);
|
||||
qpci_msix_disable(&epci->pci_dev);
|
||||
}
|
||||
|
||||
static void e1000e_pci_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QE1000E_PCI *d = (QE1000E_PCI *) obj;
|
||||
uint32_t val;
|
||||
|
||||
/* Enable the device */
|
||||
qpci_device_enable(&d->pci_dev);
|
||||
|
||||
/* Reset the device */
|
||||
val = e1000e_macreg_read(&d->e1000e, E1000E_CTRL);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_CTRL, val | E1000E_CTRL_RESET);
|
||||
|
||||
/* Enable and configure MSI-X */
|
||||
qpci_msix_enable(&d->pci_dev);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_IVAR, E1000E_IVAR_TEST_CFG);
|
||||
|
||||
/* Check the device status - link and speed */
|
||||
val = e1000e_macreg_read(&d->e1000e, E1000E_STATUS);
|
||||
g_assert_cmphex(val & (E1000E_STATUS_LU | E1000E_STATUS_ASDV1000),
|
||||
==, E1000E_STATUS_LU | E1000E_STATUS_ASDV1000);
|
||||
|
||||
/* Initialize TX/RX logic */
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RCTL, 0);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_TCTL, 0);
|
||||
|
||||
/* Notify the device that the driver is ready */
|
||||
val = e1000e_macreg_read(&d->e1000e, E1000E_CTRL_EXT);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_CTRL_EXT,
|
||||
val | E1000E_CTRL_EXT_DRV_LOAD | E1000E_CTRL_EXT_TXLSFLOW);
|
||||
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_TDBAL,
|
||||
(uint32_t) d->e1000e.tx_ring);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_TDBAH,
|
||||
(uint32_t) (d->e1000e.tx_ring >> 32));
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_TDLEN, E1000E_RING_LEN);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_TDT, 0);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_TDH, 0);
|
||||
|
||||
/* Enable transmit */
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_TCTL, E1000E_TCTL_EN);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RDBAL,
|
||||
(uint32_t)d->e1000e.rx_ring);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RDBAH,
|
||||
(uint32_t)(d->e1000e.rx_ring >> 32));
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RDLEN, E1000E_RING_LEN);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RDT, 0);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RDH, 0);
|
||||
|
||||
/* Enable receive */
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RFCTL, E1000E_RFCTL_EXTEN);
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_RCTL, E1000E_RCTL_EN |
|
||||
E1000E_RCTL_UPE |
|
||||
E1000E_RCTL_MPE);
|
||||
|
||||
/* Enable all interrupts */
|
||||
e1000e_macreg_write(&d->e1000e, E1000E_IMS, 0xFFFFFFFF);
|
||||
|
||||
}
|
||||
|
||||
static void *e1000e_pci_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QE1000E_PCI *epci = obj;
|
||||
if (!g_strcmp0(interface, "e1000e-if")) {
|
||||
return &epci->e1000e;
|
||||
}
|
||||
|
||||
/* implicit contains */
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return &epci->pci_dev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in e1000e\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *e1000e_pci_create(void *pci_bus, QGuestAllocator *alloc,
|
||||
void *addr)
|
||||
{
|
||||
QE1000E_PCI *d = g_new0(QE1000E_PCI, 1);
|
||||
QPCIBus *bus = pci_bus;
|
||||
QPCIAddress *address = addr;
|
||||
|
||||
qpci_device_foreach(bus, address->vendor_id, address->device_id,
|
||||
e1000e_foreach_callback, &d->pci_dev);
|
||||
|
||||
/* Map BAR0 (mac registers) */
|
||||
d->mac_regs = qpci_iomap(&d->pci_dev, 0, NULL);
|
||||
|
||||
/* Allocate and setup TX ring */
|
||||
d->e1000e.tx_ring = guest_alloc(alloc, E1000E_RING_LEN);
|
||||
g_assert(d->e1000e.tx_ring != 0);
|
||||
|
||||
/* Allocate and setup RX ring */
|
||||
d->e1000e.rx_ring = guest_alloc(alloc, E1000E_RING_LEN);
|
||||
g_assert(d->e1000e.rx_ring != 0);
|
||||
|
||||
d->obj.get_driver = e1000e_pci_get_driver;
|
||||
d->obj.start_hw = e1000e_pci_start_hw;
|
||||
d->obj.destructor = e1000e_pci_destructor;
|
||||
|
||||
return &d->obj;
|
||||
}
|
||||
|
||||
static void e1000e_register_nodes(void)
|
||||
{
|
||||
QPCIAddress addr = {
|
||||
.vendor_id = 0x8086,
|
||||
.device_id = 0x10D3,
|
||||
};
|
||||
|
||||
/* FIXME: every test using this node needs to setup a -netdev socket,id=hs0
|
||||
* otherwise QEMU is not going to start */
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "netdev=hs0",
|
||||
};
|
||||
add_qpci_address(&opts, &addr);
|
||||
|
||||
qos_node_create_driver("e1000e", e1000e_pci_create);
|
||||
qos_node_consumes("e1000e", "pci-bus", &opts);
|
||||
}
|
||||
|
||||
libqos_init(e1000e_register_nodes);
|
||||
53
tests/qtest/libqos/e1000e.h
Normal file
53
tests/qtest/libqos/e1000e.h
Normal file
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef QGRAPH_E1000E_H
|
||||
#define QGRAPH_E1000E_H
|
||||
|
||||
#include "libqos/qgraph.h"
|
||||
#include "pci.h"
|
||||
|
||||
#define E1000E_RX0_MSG_ID (0)
|
||||
#define E1000E_TX0_MSG_ID (1)
|
||||
#define E1000E_OTHER_MSG_ID (2)
|
||||
|
||||
#define E1000E_TDLEN (0x3808)
|
||||
#define E1000E_TDT (0x3818)
|
||||
#define E1000E_RDLEN (0x2808)
|
||||
#define E1000E_RDT (0x2818)
|
||||
|
||||
typedef struct QE1000E QE1000E;
|
||||
typedef struct QE1000E_PCI QE1000E_PCI;
|
||||
|
||||
struct QE1000E {
|
||||
uint64_t tx_ring;
|
||||
uint64_t rx_ring;
|
||||
};
|
||||
|
||||
struct QE1000E_PCI {
|
||||
QOSGraphObject obj;
|
||||
QPCIDevice pci_dev;
|
||||
QPCIBar mac_regs;
|
||||
QE1000E e1000e;
|
||||
};
|
||||
|
||||
void e1000e_wait_isr(QE1000E *d, uint16_t msg_id);
|
||||
void e1000e_tx_ring_push(QE1000E *d, void *descr);
|
||||
void e1000e_rx_ring_push(QE1000E *d, void *descr);
|
||||
|
||||
#endif
|
||||
164
tests/qtest/libqos/fw_cfg.c
Normal file
164
tests/qtest/libqos/fw_cfg.c
Normal file
|
|
@ -0,0 +1,164 @@
|
|||
/*
|
||||
* libqos fw_cfg support
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
* Copyright (C) 2013 Red Hat Inc.
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
* Markus Armbruster <armbru@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/fw_cfg.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/bswap.h"
|
||||
#include "hw/nvram/fw_cfg.h"
|
||||
|
||||
void qfw_cfg_select(QFWCFG *fw_cfg, uint16_t key)
|
||||
{
|
||||
fw_cfg->select(fw_cfg, key);
|
||||
}
|
||||
|
||||
void qfw_cfg_read_data(QFWCFG *fw_cfg, void *data, size_t len)
|
||||
{
|
||||
fw_cfg->read(fw_cfg, data, len);
|
||||
}
|
||||
|
||||
void qfw_cfg_get(QFWCFG *fw_cfg, uint16_t key, void *data, size_t len)
|
||||
{
|
||||
qfw_cfg_select(fw_cfg, key);
|
||||
qfw_cfg_read_data(fw_cfg, data, len);
|
||||
}
|
||||
|
||||
uint16_t qfw_cfg_get_u16(QFWCFG *fw_cfg, uint16_t key)
|
||||
{
|
||||
uint16_t value;
|
||||
qfw_cfg_get(fw_cfg, key, &value, sizeof(value));
|
||||
return le16_to_cpu(value);
|
||||
}
|
||||
|
||||
uint32_t qfw_cfg_get_u32(QFWCFG *fw_cfg, uint16_t key)
|
||||
{
|
||||
uint32_t value;
|
||||
qfw_cfg_get(fw_cfg, key, &value, sizeof(value));
|
||||
return le32_to_cpu(value);
|
||||
}
|
||||
|
||||
uint64_t qfw_cfg_get_u64(QFWCFG *fw_cfg, uint16_t key)
|
||||
{
|
||||
uint64_t value;
|
||||
qfw_cfg_get(fw_cfg, key, &value, sizeof(value));
|
||||
return le64_to_cpu(value);
|
||||
}
|
||||
|
||||
static void mm_fw_cfg_select(QFWCFG *fw_cfg, uint16_t key)
|
||||
{
|
||||
qtest_writew(fw_cfg->qts, fw_cfg->base, key);
|
||||
}
|
||||
|
||||
/*
|
||||
* The caller need check the return value. When the return value is
|
||||
* nonzero, it means that some bytes have been transferred.
|
||||
*
|
||||
* If the fw_cfg file in question is smaller than the allocated & passed-in
|
||||
* buffer, then the buffer has been populated only in part.
|
||||
*
|
||||
* If the fw_cfg file in question is larger than the passed-in
|
||||
* buffer, then the return value explains how much room would have been
|
||||
* necessary in total. And, while the caller's buffer has been fully
|
||||
* populated, it has received only a starting slice of the fw_cfg file.
|
||||
*/
|
||||
size_t qfw_cfg_get_file(QFWCFG *fw_cfg, const char *filename,
|
||||
void *data, size_t buflen)
|
||||
{
|
||||
uint32_t count;
|
||||
uint32_t i;
|
||||
unsigned char *filesbuf = NULL;
|
||||
size_t dsize;
|
||||
FWCfgFile *pdir_entry;
|
||||
size_t filesize = 0;
|
||||
|
||||
qfw_cfg_get(fw_cfg, FW_CFG_FILE_DIR, &count, sizeof(count));
|
||||
count = be32_to_cpu(count);
|
||||
dsize = sizeof(uint32_t) + count * sizeof(struct fw_cfg_file);
|
||||
filesbuf = g_malloc(dsize);
|
||||
qfw_cfg_get(fw_cfg, FW_CFG_FILE_DIR, filesbuf, dsize);
|
||||
pdir_entry = (FWCfgFile *)(filesbuf + sizeof(uint32_t));
|
||||
for (i = 0; i < count; ++i, ++pdir_entry) {
|
||||
if (!strcmp(pdir_entry->name, filename)) {
|
||||
uint32_t len = be32_to_cpu(pdir_entry->size);
|
||||
uint16_t sel = be16_to_cpu(pdir_entry->select);
|
||||
filesize = len;
|
||||
if (len > buflen) {
|
||||
len = buflen;
|
||||
}
|
||||
qfw_cfg_get(fw_cfg, sel, data, len);
|
||||
break;
|
||||
}
|
||||
}
|
||||
g_free(filesbuf);
|
||||
return filesize;
|
||||
}
|
||||
|
||||
static void mm_fw_cfg_read(QFWCFG *fw_cfg, void *data, size_t len)
|
||||
{
|
||||
uint8_t *ptr = data;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
ptr[i] = qtest_readb(fw_cfg->qts, fw_cfg->base + 2);
|
||||
}
|
||||
}
|
||||
|
||||
QFWCFG *mm_fw_cfg_init(QTestState *qts, uint64_t base)
|
||||
{
|
||||
QFWCFG *fw_cfg = g_malloc0(sizeof(*fw_cfg));
|
||||
|
||||
fw_cfg->base = base;
|
||||
fw_cfg->qts = qts;
|
||||
fw_cfg->select = mm_fw_cfg_select;
|
||||
fw_cfg->read = mm_fw_cfg_read;
|
||||
|
||||
return fw_cfg;
|
||||
}
|
||||
|
||||
void mm_fw_cfg_uninit(QFWCFG *fw_cfg)
|
||||
{
|
||||
g_free(fw_cfg);
|
||||
}
|
||||
|
||||
static void io_fw_cfg_select(QFWCFG *fw_cfg, uint16_t key)
|
||||
{
|
||||
qtest_outw(fw_cfg->qts, fw_cfg->base, key);
|
||||
}
|
||||
|
||||
static void io_fw_cfg_read(QFWCFG *fw_cfg, void *data, size_t len)
|
||||
{
|
||||
uint8_t *ptr = data;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
ptr[i] = qtest_inb(fw_cfg->qts, fw_cfg->base + 1);
|
||||
}
|
||||
}
|
||||
|
||||
QFWCFG *io_fw_cfg_init(QTestState *qts, uint16_t base)
|
||||
{
|
||||
QFWCFG *fw_cfg = g_malloc0(sizeof(*fw_cfg));
|
||||
|
||||
fw_cfg->base = base;
|
||||
fw_cfg->qts = qts;
|
||||
fw_cfg->select = io_fw_cfg_select;
|
||||
fw_cfg->read = io_fw_cfg_read;
|
||||
|
||||
return fw_cfg;
|
||||
}
|
||||
|
||||
void io_fw_cfg_uninit(QFWCFG *fw_cfg)
|
||||
{
|
||||
g_free(fw_cfg);
|
||||
}
|
||||
52
tests/qtest/libqos/fw_cfg.h
Normal file
52
tests/qtest/libqos/fw_cfg.h
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* libqos fw_cfg support
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_FW_CFG_H
|
||||
#define LIBQOS_FW_CFG_H
|
||||
|
||||
#include "libqtest.h"
|
||||
|
||||
typedef struct QFWCFG QFWCFG;
|
||||
|
||||
struct QFWCFG
|
||||
{
|
||||
uint64_t base;
|
||||
QTestState *qts;
|
||||
void (*select)(QFWCFG *fw_cfg, uint16_t key);
|
||||
void (*read)(QFWCFG *fw_cfg, void *data, size_t len);
|
||||
};
|
||||
|
||||
void qfw_cfg_select(QFWCFG *fw_cfg, uint16_t key);
|
||||
void qfw_cfg_read_data(QFWCFG *fw_cfg, void *data, size_t len);
|
||||
void qfw_cfg_get(QFWCFG *fw_cfg, uint16_t key, void *data, size_t len);
|
||||
uint16_t qfw_cfg_get_u16(QFWCFG *fw_cfg, uint16_t key);
|
||||
uint32_t qfw_cfg_get_u32(QFWCFG *fw_cfg, uint16_t key);
|
||||
uint64_t qfw_cfg_get_u64(QFWCFG *fw_cfg, uint16_t key);
|
||||
size_t qfw_cfg_get_file(QFWCFG *fw_cfg, const char *filename,
|
||||
void *data, size_t buflen);
|
||||
|
||||
QFWCFG *mm_fw_cfg_init(QTestState *qts, uint64_t base);
|
||||
void mm_fw_cfg_uninit(QFWCFG *fw_cfg);
|
||||
QFWCFG *io_fw_cfg_init(QTestState *qts, uint16_t base);
|
||||
void io_fw_cfg_uninit(QFWCFG *fw_cfg);
|
||||
|
||||
static inline QFWCFG *pc_fw_cfg_init(QTestState *qts)
|
||||
{
|
||||
return io_fw_cfg_init(qts, 0x510);
|
||||
}
|
||||
|
||||
static inline void pc_fw_cfg_uninit(QFWCFG *fw_cfg)
|
||||
{
|
||||
io_fw_cfg_uninit(fw_cfg);
|
||||
}
|
||||
|
||||
#endif
|
||||
216
tests/qtest/libqos/i2c-imx.c
Normal file
216
tests/qtest/libqos/i2c-imx.c
Normal file
|
|
@ -0,0 +1,216 @@
|
|||
/*
|
||||
* QTest i.MX I2C driver
|
||||
*
|
||||
* Copyright (c) 2013 Jean-Christophe Dubois
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/i2c.h"
|
||||
|
||||
|
||||
#include "libqtest.h"
|
||||
|
||||
#include "hw/i2c/imx_i2c.h"
|
||||
|
||||
enum IMXI2CDirection {
|
||||
IMX_I2C_READ,
|
||||
IMX_I2C_WRITE,
|
||||
};
|
||||
|
||||
static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr,
|
||||
enum IMXI2CDirection direction)
|
||||
{
|
||||
qtest_writeb(s->parent.qts, s->addr + I2DR_ADDR,
|
||||
(addr << 1) | (direction == IMX_I2C_READ ? 1 : 0));
|
||||
}
|
||||
|
||||
static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr,
|
||||
const uint8_t *buf, uint16_t len)
|
||||
{
|
||||
IMXI2C *s = container_of(i2c, IMXI2C, parent);
|
||||
uint8_t data;
|
||||
uint8_t status;
|
||||
uint16_t size = 0;
|
||||
|
||||
if (!len) {
|
||||
return;
|
||||
}
|
||||
|
||||
/* set the bus for write */
|
||||
data = I2CR_IEN |
|
||||
I2CR_IIEN |
|
||||
I2CR_MSTA |
|
||||
I2CR_MTX |
|
||||
I2CR_TXAK;
|
||||
|
||||
qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IBB) != 0);
|
||||
|
||||
/* set the slave address */
|
||||
imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) != 0);
|
||||
g_assert((status & I2SR_RXAK) == 0);
|
||||
|
||||
/* ack the interrupt */
|
||||
qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) == 0);
|
||||
|
||||
while (size < len) {
|
||||
/* check we are still busy */
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IBB) != 0);
|
||||
|
||||
/* write the data */
|
||||
qtest_writeb(i2c->qts, s->addr + I2DR_ADDR, buf[size]);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) != 0);
|
||||
g_assert((status & I2SR_RXAK) == 0);
|
||||
|
||||
/* ack the interrupt */
|
||||
qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) == 0);
|
||||
|
||||
size++;
|
||||
}
|
||||
|
||||
/* release the bus */
|
||||
data &= ~(I2CR_MSTA | I2CR_MTX);
|
||||
qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IBB) == 0);
|
||||
}
|
||||
|
||||
static void imx_i2c_recv(I2CAdapter *i2c, uint8_t addr,
|
||||
uint8_t *buf, uint16_t len)
|
||||
{
|
||||
IMXI2C *s = container_of(i2c, IMXI2C, parent);
|
||||
uint8_t data;
|
||||
uint8_t status;
|
||||
uint16_t size = 0;
|
||||
|
||||
if (!len) {
|
||||
return;
|
||||
}
|
||||
|
||||
/* set the bus for write */
|
||||
data = I2CR_IEN |
|
||||
I2CR_IIEN |
|
||||
I2CR_MSTA |
|
||||
I2CR_MTX |
|
||||
I2CR_TXAK;
|
||||
|
||||
qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IBB) != 0);
|
||||
|
||||
/* set the slave address */
|
||||
imx_i2c_set_slave_addr(s, addr, IMX_I2C_READ);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) != 0);
|
||||
g_assert((status & I2SR_RXAK) == 0);
|
||||
|
||||
/* ack the interrupt */
|
||||
qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) == 0);
|
||||
|
||||
/* set the bus for read */
|
||||
data &= ~I2CR_MTX;
|
||||
/* if only one byte don't ack */
|
||||
if (len != 1) {
|
||||
data &= ~I2CR_TXAK;
|
||||
}
|
||||
qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IBB) != 0);
|
||||
|
||||
/* dummy read */
|
||||
qtest_readb(i2c->qts, s->addr + I2DR_ADDR);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) != 0);
|
||||
|
||||
/* ack the interrupt */
|
||||
qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) == 0);
|
||||
|
||||
while (size < len) {
|
||||
/* check we are still busy */
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IBB) != 0);
|
||||
|
||||
if (size == (len - 1)) {
|
||||
/* stop the read transaction */
|
||||
data &= ~(I2CR_MSTA | I2CR_MTX);
|
||||
} else {
|
||||
/* ack the data read */
|
||||
data |= I2CR_TXAK;
|
||||
}
|
||||
qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data);
|
||||
|
||||
/* read the data */
|
||||
buf[size] = qtest_readb(i2c->qts, s->addr + I2DR_ADDR);
|
||||
|
||||
if (size != (len - 1)) {
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) != 0);
|
||||
|
||||
/* ack the interrupt */
|
||||
qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0);
|
||||
}
|
||||
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IIF) == 0);
|
||||
|
||||
size++;
|
||||
}
|
||||
|
||||
status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR);
|
||||
g_assert((status & I2SR_IBB) == 0);
|
||||
}
|
||||
|
||||
static void *imx_i2c_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
IMXI2C *s = obj;
|
||||
if (!g_strcmp0(interface, "i2c-bus")) {
|
||||
return &s->parent;
|
||||
}
|
||||
fprintf(stderr, "%s not present in imx-i2c\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
void imx_i2c_init(IMXI2C *s, QTestState *qts, uint64_t addr)
|
||||
{
|
||||
s->addr = addr;
|
||||
|
||||
s->obj.get_driver = imx_i2c_get_driver;
|
||||
|
||||
s->parent.send = imx_i2c_send;
|
||||
s->parent.recv = imx_i2c_recv;
|
||||
s->parent.qts = qts;
|
||||
}
|
||||
|
||||
static void imx_i2c_register_nodes(void)
|
||||
{
|
||||
qos_node_create_driver("imx.i2c", NULL);
|
||||
qos_node_produces("imx.i2c", "i2c-bus");
|
||||
}
|
||||
|
||||
libqos_init(imx_i2c_register_nodes);
|
||||
196
tests/qtest/libqos/i2c-omap.c
Normal file
196
tests/qtest/libqos/i2c-omap.c
Normal file
|
|
@ -0,0 +1,196 @@
|
|||
/*
|
||||
* QTest I2C driver
|
||||
*
|
||||
* Copyright (c) 2012 Andreas Färber
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/i2c.h"
|
||||
|
||||
|
||||
#include "qemu/bswap.h"
|
||||
#include "libqtest.h"
|
||||
|
||||
enum OMAPI2CRegisters {
|
||||
OMAP_I2C_REV = 0x00,
|
||||
OMAP_I2C_STAT = 0x08,
|
||||
OMAP_I2C_CNT = 0x18,
|
||||
OMAP_I2C_DATA = 0x1c,
|
||||
OMAP_I2C_CON = 0x24,
|
||||
OMAP_I2C_SA = 0x2c,
|
||||
};
|
||||
|
||||
enum OMAPI2CSTATBits {
|
||||
OMAP_I2C_STAT_NACK = 1 << 1,
|
||||
OMAP_I2C_STAT_ARDY = 1 << 2,
|
||||
OMAP_I2C_STAT_RRDY = 1 << 3,
|
||||
OMAP_I2C_STAT_XRDY = 1 << 4,
|
||||
OMAP_I2C_STAT_ROVR = 1 << 11,
|
||||
OMAP_I2C_STAT_SBD = 1 << 15,
|
||||
};
|
||||
|
||||
enum OMAPI2CCONBits {
|
||||
OMAP_I2C_CON_STT = 1 << 0,
|
||||
OMAP_I2C_CON_STP = 1 << 1,
|
||||
OMAP_I2C_CON_TRX = 1 << 9,
|
||||
OMAP_I2C_CON_MST = 1 << 10,
|
||||
OMAP_I2C_CON_BE = 1 << 14,
|
||||
OMAP_I2C_CON_I2C_EN = 1 << 15,
|
||||
};
|
||||
|
||||
|
||||
static void omap_i2c_set_slave_addr(OMAPI2C *s, uint8_t addr)
|
||||
{
|
||||
uint16_t data = addr;
|
||||
|
||||
qtest_writew(s->parent.qts, s->addr + OMAP_I2C_SA, data);
|
||||
data = qtest_readw(s->parent.qts, s->addr + OMAP_I2C_SA);
|
||||
g_assert_cmphex(data, ==, addr);
|
||||
}
|
||||
|
||||
static void omap_i2c_send(I2CAdapter *i2c, uint8_t addr,
|
||||
const uint8_t *buf, uint16_t len)
|
||||
{
|
||||
OMAPI2C *s = container_of(i2c, OMAPI2C, parent);
|
||||
uint16_t data;
|
||||
|
||||
omap_i2c_set_slave_addr(s, addr);
|
||||
|
||||
data = len;
|
||||
qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data);
|
||||
|
||||
data = OMAP_I2C_CON_I2C_EN |
|
||||
OMAP_I2C_CON_TRX |
|
||||
OMAP_I2C_CON_MST |
|
||||
OMAP_I2C_CON_STT |
|
||||
OMAP_I2C_CON_STP;
|
||||
qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data);
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
|
||||
g_assert((data & OMAP_I2C_CON_STP) != 0);
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
|
||||
g_assert((data & OMAP_I2C_STAT_NACK) == 0);
|
||||
|
||||
while (len > 1) {
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
|
||||
g_assert((data & OMAP_I2C_STAT_XRDY) != 0);
|
||||
|
||||
data = buf[0] | ((uint16_t)buf[1] << 8);
|
||||
qtest_writew(i2c->qts, s->addr + OMAP_I2C_DATA, data);
|
||||
buf = (uint8_t *)buf + 2;
|
||||
len -= 2;
|
||||
}
|
||||
if (len == 1) {
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
|
||||
g_assert((data & OMAP_I2C_STAT_XRDY) != 0);
|
||||
|
||||
data = buf[0];
|
||||
qtest_writew(i2c->qts, s->addr + OMAP_I2C_DATA, data);
|
||||
}
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
|
||||
g_assert((data & OMAP_I2C_CON_STP) == 0);
|
||||
}
|
||||
|
||||
static void omap_i2c_recv(I2CAdapter *i2c, uint8_t addr,
|
||||
uint8_t *buf, uint16_t len)
|
||||
{
|
||||
OMAPI2C *s = container_of(i2c, OMAPI2C, parent);
|
||||
uint16_t data, stat;
|
||||
uint16_t orig_len = len;
|
||||
|
||||
omap_i2c_set_slave_addr(s, addr);
|
||||
|
||||
data = len;
|
||||
qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data);
|
||||
|
||||
data = OMAP_I2C_CON_I2C_EN |
|
||||
OMAP_I2C_CON_MST |
|
||||
OMAP_I2C_CON_STT |
|
||||
OMAP_I2C_CON_STP;
|
||||
qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data);
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
|
||||
g_assert((data & OMAP_I2C_STAT_NACK) == 0);
|
||||
|
||||
while (len > 0) {
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
|
||||
if (len <= 4) {
|
||||
g_assert((data & OMAP_I2C_CON_STP) == 0);
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CNT);
|
||||
g_assert_cmpuint(data, ==, orig_len);
|
||||
} else {
|
||||
g_assert((data & OMAP_I2C_CON_STP) != 0);
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CNT);
|
||||
g_assert_cmpuint(data, ==, len - 4);
|
||||
}
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
|
||||
g_assert((data & OMAP_I2C_STAT_RRDY) != 0);
|
||||
g_assert((data & OMAP_I2C_STAT_ROVR) == 0);
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_DATA);
|
||||
|
||||
stat = qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT);
|
||||
|
||||
if (unlikely(len == 1)) {
|
||||
g_assert((stat & OMAP_I2C_STAT_SBD) != 0);
|
||||
|
||||
buf[0] = data & 0xff;
|
||||
buf++;
|
||||
len--;
|
||||
} else {
|
||||
buf[0] = data & 0xff;
|
||||
buf[1] = data >> 8;
|
||||
buf += 2;
|
||||
len -= 2;
|
||||
}
|
||||
}
|
||||
|
||||
data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON);
|
||||
g_assert((data & OMAP_I2C_CON_STP) == 0);
|
||||
}
|
||||
|
||||
static void *omap_i2c_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
OMAPI2C *s = obj;
|
||||
if (!g_strcmp0(interface, "i2c-bus")) {
|
||||
return &s->parent;
|
||||
}
|
||||
fprintf(stderr, "%s not present in omap_i2c\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void omap_i2c_start_hw(QOSGraphObject *object)
|
||||
{
|
||||
OMAPI2C *s = (OMAPI2C *) object;
|
||||
uint16_t data;
|
||||
|
||||
/* verify the mmio address by looking for a known signature */
|
||||
data = qtest_readw(s->parent.qts, s->addr + OMAP_I2C_REV);
|
||||
g_assert_cmphex(data, ==, 0x34);
|
||||
}
|
||||
|
||||
void omap_i2c_init(OMAPI2C *s, QTestState *qts, uint64_t addr)
|
||||
{
|
||||
s->addr = addr;
|
||||
|
||||
s->obj.get_driver = omap_i2c_get_driver;
|
||||
s->obj.start_hw = omap_i2c_start_hw;
|
||||
|
||||
s->parent.send = omap_i2c_send;
|
||||
s->parent.recv = omap_i2c_recv;
|
||||
s->parent.qts = qts;
|
||||
}
|
||||
|
||||
static void omap_i2c_register_nodes(void)
|
||||
{
|
||||
qos_node_create_driver("omap_i2c", NULL);
|
||||
qos_node_produces("omap_i2c", "i2c-bus");
|
||||
}
|
||||
|
||||
libqos_init(omap_i2c_register_nodes);
|
||||
85
tests/qtest/libqos/i2c.c
Normal file
85
tests/qtest/libqos/i2c.c
Normal file
|
|
@ -0,0 +1,85 @@
|
|||
/*
|
||||
* QTest I2C driver
|
||||
*
|
||||
* Copyright (c) 2012 Andreas Färber
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/i2c.h"
|
||||
#include "libqtest.h"
|
||||
|
||||
void i2c_send(QI2CDevice *i2cdev, const uint8_t *buf, uint16_t len)
|
||||
{
|
||||
i2cdev->bus->send(i2cdev->bus, i2cdev->addr, buf, len);
|
||||
}
|
||||
|
||||
void i2c_recv(QI2CDevice *i2cdev, uint8_t *buf, uint16_t len)
|
||||
{
|
||||
i2cdev->bus->recv(i2cdev->bus, i2cdev->addr, buf, len);
|
||||
}
|
||||
|
||||
void i2c_read_block(QI2CDevice *i2cdev, uint8_t reg,
|
||||
uint8_t *buf, uint16_t len)
|
||||
{
|
||||
i2c_send(i2cdev, ®, 1);
|
||||
i2c_recv(i2cdev, buf, len);
|
||||
}
|
||||
|
||||
void i2c_write_block(QI2CDevice *i2cdev, uint8_t reg,
|
||||
const uint8_t *buf, uint16_t len)
|
||||
{
|
||||
uint8_t *cmd = g_malloc(len + 1);
|
||||
cmd[0] = reg;
|
||||
memcpy(&cmd[1], buf, len);
|
||||
i2c_send(i2cdev, cmd, len + 1);
|
||||
g_free(cmd);
|
||||
}
|
||||
|
||||
uint8_t i2c_get8(QI2CDevice *i2cdev, uint8_t reg)
|
||||
{
|
||||
uint8_t resp[1];
|
||||
i2c_read_block(i2cdev, reg, resp, sizeof(resp));
|
||||
return resp[0];
|
||||
}
|
||||
|
||||
uint16_t i2c_get16(QI2CDevice *i2cdev, uint8_t reg)
|
||||
{
|
||||
uint8_t resp[2];
|
||||
i2c_read_block(i2cdev, reg, resp, sizeof(resp));
|
||||
return (resp[0] << 8) | resp[1];
|
||||
}
|
||||
|
||||
void i2c_set8(QI2CDevice *i2cdev, uint8_t reg, uint8_t value)
|
||||
{
|
||||
i2c_write_block(i2cdev, reg, &value, 1);
|
||||
}
|
||||
|
||||
void i2c_set16(QI2CDevice *i2cdev, uint8_t reg, uint16_t value)
|
||||
{
|
||||
uint8_t data[2];
|
||||
|
||||
data[0] = value >> 8;
|
||||
data[1] = value & 255;
|
||||
i2c_write_block(i2cdev, reg, data, sizeof(data));
|
||||
}
|
||||
|
||||
void *i2c_device_create(void *i2c_bus, QGuestAllocator *alloc, void *addr)
|
||||
{
|
||||
QI2CDevice *i2cdev = g_new0(QI2CDevice, 1);
|
||||
|
||||
i2cdev->bus = i2c_bus;
|
||||
if (addr) {
|
||||
i2cdev->addr = ((QI2CAddress *)addr)->addr;
|
||||
}
|
||||
return &i2cdev->obj;
|
||||
}
|
||||
|
||||
void add_qi2c_address(QOSGraphEdgeOptions *opts, QI2CAddress *addr)
|
||||
{
|
||||
g_assert(addr);
|
||||
|
||||
opts->arg = addr;
|
||||
opts->size_arg = sizeof(QI2CAddress);
|
||||
}
|
||||
82
tests/qtest/libqos/i2c.h
Normal file
82
tests/qtest/libqos/i2c.h
Normal file
|
|
@ -0,0 +1,82 @@
|
|||
/*
|
||||
* I2C libqos
|
||||
*
|
||||
* Copyright (c) 2012 Andreas Färber
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
#ifndef LIBQOS_I2C_H
|
||||
#define LIBQOS_I2C_H
|
||||
|
||||
#include "libqtest.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
typedef struct I2CAdapter I2CAdapter;
|
||||
struct I2CAdapter {
|
||||
void (*send)(I2CAdapter *adapter, uint8_t addr,
|
||||
const uint8_t *buf, uint16_t len);
|
||||
void (*recv)(I2CAdapter *adapter, uint8_t addr,
|
||||
uint8_t *buf, uint16_t len);
|
||||
|
||||
QTestState *qts;
|
||||
};
|
||||
|
||||
typedef struct QI2CAddress QI2CAddress;
|
||||
struct QI2CAddress {
|
||||
uint8_t addr;
|
||||
};
|
||||
|
||||
typedef struct QI2CDevice QI2CDevice;
|
||||
struct QI2CDevice {
|
||||
/*
|
||||
* For now, all devices are simple enough that there is no need for
|
||||
* them to define their own constructor and get_driver functions.
|
||||
* Therefore, QOSGraphObject is included directly in QI2CDevice;
|
||||
* the tests expect to get a QI2CDevice rather than doing something
|
||||
* like obj->get_driver("i2c-device").
|
||||
*
|
||||
* In fact there is no i2c-device interface even, because there are
|
||||
* no generic I2C tests).
|
||||
*/
|
||||
QOSGraphObject obj;
|
||||
I2CAdapter *bus;
|
||||
uint8_t addr;
|
||||
};
|
||||
|
||||
void *i2c_device_create(void *i2c_bus, QGuestAllocator *alloc, void *addr);
|
||||
void add_qi2c_address(QOSGraphEdgeOptions *opts, QI2CAddress *addr);
|
||||
|
||||
void i2c_send(QI2CDevice *dev, const uint8_t *buf, uint16_t len);
|
||||
void i2c_recv(QI2CDevice *dev, uint8_t *buf, uint16_t len);
|
||||
|
||||
void i2c_read_block(QI2CDevice *dev, uint8_t reg,
|
||||
uint8_t *buf, uint16_t len);
|
||||
void i2c_write_block(QI2CDevice *dev, uint8_t reg,
|
||||
const uint8_t *buf, uint16_t len);
|
||||
uint8_t i2c_get8(QI2CDevice *dev, uint8_t reg);
|
||||
uint16_t i2c_get16(QI2CDevice *dev, uint8_t reg);
|
||||
void i2c_set8(QI2CDevice *dev, uint8_t reg, uint8_t value);
|
||||
void i2c_set16(QI2CDevice *dev, uint8_t reg, uint16_t value);
|
||||
|
||||
/* i2c-omap.c */
|
||||
typedef struct OMAPI2C {
|
||||
QOSGraphObject obj;
|
||||
I2CAdapter parent;
|
||||
|
||||
uint64_t addr;
|
||||
} OMAPI2C;
|
||||
|
||||
void omap_i2c_init(OMAPI2C *s, QTestState *qts, uint64_t addr);
|
||||
|
||||
/* i2c-imx.c */
|
||||
typedef struct IMXI2C {
|
||||
QOSGraphObject obj;
|
||||
I2CAdapter parent;
|
||||
|
||||
uint64_t addr;
|
||||
} IMXI2C;
|
||||
|
||||
void imx_i2c_init(IMXI2C *s, QTestState *qts, uint64_t addr);
|
||||
|
||||
#endif
|
||||
35
tests/qtest/libqos/libqos-pc.c
Normal file
35
tests/qtest/libqos/libqos-pc.c
Normal file
|
|
@ -0,0 +1,35 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "libqos/libqos-pc.h"
|
||||
#include "libqos/malloc-pc.h"
|
||||
#include "libqos/pci-pc.h"
|
||||
|
||||
static QOSOps qos_ops = {
|
||||
.alloc_init = pc_alloc_init,
|
||||
.qpci_new = qpci_new_pc,
|
||||
.qpci_free = qpci_free_pc,
|
||||
.shutdown = qtest_pc_shutdown,
|
||||
};
|
||||
|
||||
QOSState *qtest_pc_vboot(const char *cmdline_fmt, va_list ap)
|
||||
{
|
||||
return qtest_vboot(&qos_ops, cmdline_fmt, ap);
|
||||
}
|
||||
|
||||
QOSState *qtest_pc_boot(const char *cmdline_fmt, ...)
|
||||
{
|
||||
QOSState *qs;
|
||||
va_list ap;
|
||||
|
||||
va_start(ap, cmdline_fmt);
|
||||
qs = qtest_vboot(&qos_ops, cmdline_fmt, ap);
|
||||
va_end(ap);
|
||||
|
||||
qtest_irq_intercept_in(qs->qts, "ioapic");
|
||||
|
||||
return qs;
|
||||
}
|
||||
|
||||
void qtest_pc_shutdown(QOSState *qs)
|
||||
{
|
||||
return qtest_common_shutdown(qs);
|
||||
}
|
||||
10
tests/qtest/libqos/libqos-pc.h
Normal file
10
tests/qtest/libqos/libqos-pc.h
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef LIBQOS_PC_H
|
||||
#define LIBQOS_PC_H
|
||||
|
||||
#include "libqos/libqos.h"
|
||||
|
||||
QOSState *qtest_pc_vboot(const char *cmdline_fmt, va_list ap);
|
||||
QOSState *qtest_pc_boot(const char *cmdline_fmt, ...);
|
||||
void qtest_pc_shutdown(QOSState *qs);
|
||||
|
||||
#endif
|
||||
33
tests/qtest/libqos/libqos-spapr.c
Normal file
33
tests/qtest/libqos/libqos-spapr.c
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include "libqos/libqos-spapr.h"
|
||||
#include "libqos/malloc-spapr.h"
|
||||
#include "libqos/pci-spapr.h"
|
||||
|
||||
static QOSOps qos_ops = {
|
||||
.alloc_init = spapr_alloc_init,
|
||||
.qpci_new = qpci_new_spapr,
|
||||
.qpci_free = qpci_free_spapr,
|
||||
.shutdown = qtest_spapr_shutdown,
|
||||
};
|
||||
|
||||
QOSState *qtest_spapr_vboot(const char *cmdline_fmt, va_list ap)
|
||||
{
|
||||
return qtest_vboot(&qos_ops, cmdline_fmt, ap);
|
||||
}
|
||||
|
||||
QOSState *qtest_spapr_boot(const char *cmdline_fmt, ...)
|
||||
{
|
||||
QOSState *qs;
|
||||
va_list ap;
|
||||
|
||||
va_start(ap, cmdline_fmt);
|
||||
qs = qtest_vboot(&qos_ops, cmdline_fmt, ap);
|
||||
va_end(ap);
|
||||
|
||||
return qs;
|
||||
}
|
||||
|
||||
void qtest_spapr_shutdown(QOSState *qs)
|
||||
{
|
||||
return qtest_common_shutdown(qs);
|
||||
}
|
||||
10
tests/qtest/libqos/libqos-spapr.h
Normal file
10
tests/qtest/libqos/libqos-spapr.h
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef LIBQOS_SPAPR_H
|
||||
#define LIBQOS_SPAPR_H
|
||||
|
||||
#include "libqos/libqos.h"
|
||||
|
||||
QOSState *qtest_spapr_vboot(const char *cmdline_fmt, va_list ap);
|
||||
QOSState *qtest_spapr_boot(const char *cmdline_fmt, ...);
|
||||
void qtest_spapr_shutdown(QOSState *qs);
|
||||
|
||||
#endif
|
||||
240
tests/qtest/libqos/libqos.c
Normal file
240
tests/qtest/libqos/libqos.c
Normal file
|
|
@ -0,0 +1,240 @@
|
|||
#include "qemu/osdep.h"
|
||||
#include <sys/wait.h>
|
||||
|
||||
#include "libqtest.h"
|
||||
#include "libqos/libqos.h"
|
||||
#include "libqos/pci.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
|
||||
/*** Test Setup & Teardown ***/
|
||||
|
||||
/**
|
||||
* Launch QEMU with the given command line,
|
||||
* and then set up interrupts and our guest malloc interface.
|
||||
* Never returns NULL:
|
||||
* Terminates the application in case an error is encountered.
|
||||
*/
|
||||
QOSState *qtest_vboot(QOSOps *ops, const char *cmdline_fmt, va_list ap)
|
||||
{
|
||||
char *cmdline;
|
||||
|
||||
QOSState *qs = g_new0(QOSState, 1);
|
||||
|
||||
cmdline = g_strdup_vprintf(cmdline_fmt, ap);
|
||||
qs->qts = qtest_init(cmdline);
|
||||
qs->ops = ops;
|
||||
if (ops) {
|
||||
ops->alloc_init(&qs->alloc, qs->qts, ALLOC_NO_FLAGS);
|
||||
qs->pcibus = ops->qpci_new(qs->qts, &qs->alloc);
|
||||
}
|
||||
|
||||
g_free(cmdline);
|
||||
return qs;
|
||||
}
|
||||
|
||||
/**
|
||||
* Launch QEMU with the given command line,
|
||||
* and then set up interrupts and our guest malloc interface.
|
||||
*/
|
||||
QOSState *qtest_boot(QOSOps *ops, const char *cmdline_fmt, ...)
|
||||
{
|
||||
QOSState *qs;
|
||||
va_list ap;
|
||||
|
||||
va_start(ap, cmdline_fmt);
|
||||
qs = qtest_vboot(ops, cmdline_fmt, ap);
|
||||
va_end(ap);
|
||||
|
||||
return qs;
|
||||
}
|
||||
|
||||
/**
|
||||
* Tear down the QEMU instance.
|
||||
*/
|
||||
void qtest_common_shutdown(QOSState *qs)
|
||||
{
|
||||
if (qs->ops) {
|
||||
if (qs->pcibus && qs->ops->qpci_free) {
|
||||
qs->ops->qpci_free(qs->pcibus);
|
||||
qs->pcibus = NULL;
|
||||
}
|
||||
}
|
||||
alloc_destroy(&qs->alloc);
|
||||
qtest_quit(qs->qts);
|
||||
g_free(qs);
|
||||
}
|
||||
|
||||
void qtest_shutdown(QOSState *qs)
|
||||
{
|
||||
if (qs->ops && qs->ops->shutdown) {
|
||||
qs->ops->shutdown(qs);
|
||||
} else {
|
||||
qtest_common_shutdown(qs);
|
||||
}
|
||||
}
|
||||
|
||||
static QDict *qmp_execute(QTestState *qts, const char *command)
|
||||
{
|
||||
return qtest_qmp(qts, "{ 'execute': %s }", command);
|
||||
}
|
||||
|
||||
void migrate(QOSState *from, QOSState *to, const char *uri)
|
||||
{
|
||||
const char *st;
|
||||
QDict *rsp, *sub;
|
||||
bool running;
|
||||
|
||||
/* Is the machine currently running? */
|
||||
rsp = qmp_execute(from->qts, "query-status");
|
||||
g_assert(qdict_haskey(rsp, "return"));
|
||||
sub = qdict_get_qdict(rsp, "return");
|
||||
g_assert(qdict_haskey(sub, "running"));
|
||||
running = qdict_get_bool(sub, "running");
|
||||
qobject_unref(rsp);
|
||||
|
||||
/* Issue the migrate command. */
|
||||
rsp = qtest_qmp(from->qts,
|
||||
"{ 'execute': 'migrate', 'arguments': { 'uri': %s }}",
|
||||
uri);
|
||||
g_assert(qdict_haskey(rsp, "return"));
|
||||
qobject_unref(rsp);
|
||||
|
||||
/* Wait for STOP event, but only if we were running: */
|
||||
if (running) {
|
||||
qtest_qmp_eventwait(from->qts, "STOP");
|
||||
}
|
||||
|
||||
/* If we were running, we can wait for an event. */
|
||||
if (running) {
|
||||
migrate_allocator(&from->alloc, &to->alloc);
|
||||
qtest_qmp_eventwait(to->qts, "RESUME");
|
||||
return;
|
||||
}
|
||||
|
||||
/* Otherwise, we need to wait: poll until migration is completed. */
|
||||
while (1) {
|
||||
rsp = qmp_execute(from->qts, "query-migrate");
|
||||
g_assert(qdict_haskey(rsp, "return"));
|
||||
sub = qdict_get_qdict(rsp, "return");
|
||||
g_assert(qdict_haskey(sub, "status"));
|
||||
st = qdict_get_str(sub, "status");
|
||||
|
||||
/* "setup", "active", "completed", "failed", "cancelled" */
|
||||
if (strcmp(st, "completed") == 0) {
|
||||
qobject_unref(rsp);
|
||||
break;
|
||||
}
|
||||
|
||||
if ((strcmp(st, "setup") == 0) || (strcmp(st, "active") == 0)
|
||||
|| (strcmp(st, "wait-unplug") == 0)) {
|
||||
qobject_unref(rsp);
|
||||
g_usleep(5000);
|
||||
continue;
|
||||
}
|
||||
|
||||
fprintf(stderr, "Migration did not complete, status: %s\n", st);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
migrate_allocator(&from->alloc, &to->alloc);
|
||||
}
|
||||
|
||||
bool have_qemu_img(void)
|
||||
{
|
||||
char *rpath;
|
||||
const char *path = getenv("QTEST_QEMU_IMG");
|
||||
if (!path) {
|
||||
return false;
|
||||
}
|
||||
|
||||
rpath = realpath(path, NULL);
|
||||
if (!rpath) {
|
||||
return false;
|
||||
} else {
|
||||
free(rpath);
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
void mkimg(const char *file, const char *fmt, unsigned size_mb)
|
||||
{
|
||||
gchar *cli;
|
||||
bool ret;
|
||||
int rc;
|
||||
GError *err = NULL;
|
||||
char *qemu_img_path;
|
||||
gchar *out, *out2;
|
||||
char *qemu_img_abs_path;
|
||||
|
||||
qemu_img_path = getenv("QTEST_QEMU_IMG");
|
||||
g_assert(qemu_img_path);
|
||||
qemu_img_abs_path = realpath(qemu_img_path, NULL);
|
||||
g_assert(qemu_img_abs_path);
|
||||
|
||||
cli = g_strdup_printf("%s create -f %s %s %uM", qemu_img_abs_path,
|
||||
fmt, file, size_mb);
|
||||
ret = g_spawn_command_line_sync(cli, &out, &out2, &rc, &err);
|
||||
if (err || !g_spawn_check_exit_status(rc, &err)) {
|
||||
fprintf(stderr, "%s\n", err->message);
|
||||
g_error_free(err);
|
||||
}
|
||||
g_assert(ret && !err);
|
||||
|
||||
g_free(out);
|
||||
g_free(out2);
|
||||
g_free(cli);
|
||||
free(qemu_img_abs_path);
|
||||
}
|
||||
|
||||
void mkqcow2(const char *file, unsigned size_mb)
|
||||
{
|
||||
return mkimg(file, "qcow2", size_mb);
|
||||
}
|
||||
|
||||
void prepare_blkdebug_script(const char *debug_fn, const char *event)
|
||||
{
|
||||
FILE *debug_file = fopen(debug_fn, "w");
|
||||
int ret;
|
||||
|
||||
fprintf(debug_file, "[inject-error]\n");
|
||||
fprintf(debug_file, "event = \"%s\"\n", event);
|
||||
fprintf(debug_file, "errno = \"5\"\n");
|
||||
fprintf(debug_file, "state = \"1\"\n");
|
||||
fprintf(debug_file, "immediately = \"off\"\n");
|
||||
fprintf(debug_file, "once = \"on\"\n");
|
||||
|
||||
fprintf(debug_file, "[set-state]\n");
|
||||
fprintf(debug_file, "event = \"%s\"\n", event);
|
||||
fprintf(debug_file, "new_state = \"2\"\n");
|
||||
fflush(debug_file);
|
||||
g_assert(!ferror(debug_file));
|
||||
|
||||
ret = fclose(debug_file);
|
||||
g_assert(ret == 0);
|
||||
}
|
||||
|
||||
void generate_pattern(void *buffer, size_t len, size_t cycle_len)
|
||||
{
|
||||
int i, j;
|
||||
unsigned char *tx = (unsigned char *)buffer;
|
||||
unsigned char p;
|
||||
size_t *sx;
|
||||
|
||||
/* Write an indicative pattern that varies and is unique per-cycle */
|
||||
p = rand() % 256;
|
||||
for (i = 0; i < len; i++) {
|
||||
tx[i] = p++ % 256;
|
||||
if (i % cycle_len == 0) {
|
||||
p = rand() % 256;
|
||||
}
|
||||
}
|
||||
|
||||
/* force uniqueness by writing an id per-cycle */
|
||||
for (i = 0; i < len / cycle_len; i++) {
|
||||
j = i * cycle_len;
|
||||
if (j + sizeof(*sx) <= len) {
|
||||
sx = (size_t *)&tx[j];
|
||||
*sx = i;
|
||||
}
|
||||
}
|
||||
}
|
||||
45
tests/qtest/libqos/libqos.h
Normal file
45
tests/qtest/libqos/libqos.h
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
#ifndef LIBQOS_H
|
||||
#define LIBQOS_H
|
||||
|
||||
#include "libqtest.h"
|
||||
#include "libqos/pci.h"
|
||||
#include "libqos/malloc.h"
|
||||
|
||||
typedef struct QOSState QOSState;
|
||||
|
||||
typedef struct QOSOps {
|
||||
void (*alloc_init)(QGuestAllocator *, QTestState *, QAllocOpts);
|
||||
QPCIBus *(*qpci_new)(QTestState *qts, QGuestAllocator *alloc);
|
||||
void (*qpci_free)(QPCIBus *bus);
|
||||
void (*shutdown)(QOSState *);
|
||||
} QOSOps;
|
||||
|
||||
struct QOSState {
|
||||
QTestState *qts;
|
||||
QGuestAllocator alloc;
|
||||
QPCIBus *pcibus;
|
||||
QOSOps *ops;
|
||||
};
|
||||
|
||||
QOSState *qtest_vboot(QOSOps *ops, const char *cmdline_fmt, va_list ap);
|
||||
QOSState *qtest_boot(QOSOps *ops, const char *cmdline_fmt, ...);
|
||||
void qtest_common_shutdown(QOSState *qs);
|
||||
void qtest_shutdown(QOSState *qs);
|
||||
bool have_qemu_img(void);
|
||||
void mkimg(const char *file, const char *fmt, unsigned size_mb);
|
||||
void mkqcow2(const char *file, unsigned size_mb);
|
||||
void migrate(QOSState *from, QOSState *to, const char *uri);
|
||||
void prepare_blkdebug_script(const char *debug_fn, const char *event);
|
||||
void generate_pattern(void *buffer, size_t len, size_t cycle_len);
|
||||
|
||||
static inline uint64_t qmalloc(QOSState *q, size_t bytes)
|
||||
{
|
||||
return guest_alloc(&q->alloc, bytes);
|
||||
}
|
||||
|
||||
static inline void qfree(QOSState *q, uint64_t addr)
|
||||
{
|
||||
guest_free(&q->alloc, addr);
|
||||
}
|
||||
|
||||
#endif
|
||||
33
tests/qtest/libqos/malloc-pc.c
Normal file
33
tests/qtest/libqos/malloc-pc.c
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
/*
|
||||
* libqos malloc support for PC
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/malloc-pc.h"
|
||||
#include "libqos/fw_cfg.h"
|
||||
|
||||
#include "standard-headers/linux/qemu_fw_cfg.h"
|
||||
|
||||
#include "qemu-common.h"
|
||||
|
||||
#define PAGE_SIZE (4096)
|
||||
|
||||
void pc_alloc_init(QGuestAllocator *s, QTestState *qts, QAllocOpts flags)
|
||||
{
|
||||
uint64_t ram_size;
|
||||
QFWCFG *fw_cfg = pc_fw_cfg_init(qts);
|
||||
|
||||
ram_size = qfw_cfg_get_u64(fw_cfg, FW_CFG_RAM_SIZE);
|
||||
alloc_init(s, flags, 1 << 20, MIN(ram_size, 0xE0000000), PAGE_SIZE);
|
||||
|
||||
/* clean-up */
|
||||
pc_fw_cfg_uninit(fw_cfg);
|
||||
}
|
||||
20
tests/qtest/libqos/malloc-pc.h
Normal file
20
tests/qtest/libqos/malloc-pc.h
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
/*
|
||||
* libqos malloc support for PC
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_MALLOC_PC_H
|
||||
#define LIBQOS_MALLOC_PC_H
|
||||
|
||||
#include "libqos/malloc.h"
|
||||
|
||||
void pc_alloc_init(QGuestAllocator *s, QTestState *qts, QAllocOpts flags);
|
||||
|
||||
#endif
|
||||
23
tests/qtest/libqos/malloc-spapr.c
Normal file
23
tests/qtest/libqos/malloc-spapr.c
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
/*
|
||||
* libqos malloc support for SPAPR
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/malloc-spapr.h"
|
||||
|
||||
#include "qemu-common.h"
|
||||
|
||||
#define PAGE_SIZE 4096
|
||||
|
||||
/* Memory must be a multiple of 256 MB,
|
||||
* so we have at least 256MB
|
||||
*/
|
||||
#define SPAPR_MIN_SIZE 0x10000000
|
||||
|
||||
void spapr_alloc_init(QGuestAllocator *s, QTestState *qts, QAllocOpts flags)
|
||||
{
|
||||
alloc_init(s, flags, 1 << 20, SPAPR_MIN_SIZE, PAGE_SIZE);
|
||||
}
|
||||
15
tests/qtest/libqos/malloc-spapr.h
Normal file
15
tests/qtest/libqos/malloc-spapr.h
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
/*
|
||||
* libqos malloc support for SPAPR
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_MALLOC_SPAPR_H
|
||||
#define LIBQOS_MALLOC_SPAPR_H
|
||||
|
||||
#include "libqos/malloc.h"
|
||||
|
||||
void spapr_alloc_init(QGuestAllocator *s, QTestState *qts, QAllocOpts flags);
|
||||
|
||||
#endif
|
||||
347
tests/qtest/libqos/malloc.c
Normal file
347
tests/qtest/libqos/malloc.c
Normal file
|
|
@ -0,0 +1,347 @@
|
|||
/*
|
||||
* libqos malloc support
|
||||
*
|
||||
* Copyright (c) 2014
|
||||
*
|
||||
* Author:
|
||||
* John Snow <jsnow@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "qemu-common.h"
|
||||
#include "qemu/host-utils.h"
|
||||
|
||||
typedef struct MemBlock {
|
||||
QTAILQ_ENTRY(MemBlock) MLIST_ENTNAME;
|
||||
uint64_t size;
|
||||
uint64_t addr;
|
||||
} MemBlock;
|
||||
|
||||
#define DEFAULT_PAGE_SIZE 4096
|
||||
|
||||
static void mlist_delete(MemList *list, MemBlock *node)
|
||||
{
|
||||
g_assert(list && node);
|
||||
QTAILQ_REMOVE(list, node, MLIST_ENTNAME);
|
||||
g_free(node);
|
||||
}
|
||||
|
||||
static MemBlock *mlist_find_key(MemList *head, uint64_t addr)
|
||||
{
|
||||
MemBlock *node;
|
||||
QTAILQ_FOREACH(node, head, MLIST_ENTNAME) {
|
||||
if (node->addr == addr) {
|
||||
return node;
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static MemBlock *mlist_find_space(MemList *head, uint64_t size)
|
||||
{
|
||||
MemBlock *node;
|
||||
|
||||
QTAILQ_FOREACH(node, head, MLIST_ENTNAME) {
|
||||
if (node->size >= size) {
|
||||
return node;
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static MemBlock *mlist_sort_insert(MemList *head, MemBlock *insr)
|
||||
{
|
||||
MemBlock *node;
|
||||
g_assert(head && insr);
|
||||
|
||||
QTAILQ_FOREACH(node, head, MLIST_ENTNAME) {
|
||||
if (insr->addr < node->addr) {
|
||||
QTAILQ_INSERT_BEFORE(node, insr, MLIST_ENTNAME);
|
||||
return insr;
|
||||
}
|
||||
}
|
||||
|
||||
QTAILQ_INSERT_TAIL(head, insr, MLIST_ENTNAME);
|
||||
return insr;
|
||||
}
|
||||
|
||||
static inline uint64_t mlist_boundary(MemBlock *node)
|
||||
{
|
||||
return node->size + node->addr;
|
||||
}
|
||||
|
||||
static MemBlock *mlist_join(MemList *head, MemBlock *left, MemBlock *right)
|
||||
{
|
||||
g_assert(head && left && right);
|
||||
|
||||
left->size += right->size;
|
||||
mlist_delete(head, right);
|
||||
return left;
|
||||
}
|
||||
|
||||
static void mlist_coalesce(MemList *head, MemBlock *node)
|
||||
{
|
||||
g_assert(node);
|
||||
MemBlock *left;
|
||||
MemBlock *right;
|
||||
char merge;
|
||||
|
||||
do {
|
||||
merge = 0;
|
||||
left = QTAILQ_PREV(node, MLIST_ENTNAME);
|
||||
right = QTAILQ_NEXT(node, MLIST_ENTNAME);
|
||||
|
||||
/* clowns to the left of me */
|
||||
if (left && mlist_boundary(left) == node->addr) {
|
||||
node = mlist_join(head, left, node);
|
||||
merge = 1;
|
||||
}
|
||||
|
||||
/* jokers to the right */
|
||||
if (right && mlist_boundary(node) == right->addr) {
|
||||
node = mlist_join(head, node, right);
|
||||
merge = 1;
|
||||
}
|
||||
|
||||
} while (merge);
|
||||
}
|
||||
|
||||
static MemBlock *mlist_new(uint64_t addr, uint64_t size)
|
||||
{
|
||||
MemBlock *block;
|
||||
|
||||
if (!size) {
|
||||
return NULL;
|
||||
}
|
||||
block = g_new0(MemBlock, 1);
|
||||
|
||||
block->addr = addr;
|
||||
block->size = size;
|
||||
|
||||
return block;
|
||||
}
|
||||
|
||||
static uint64_t mlist_fulfill(QGuestAllocator *s, MemBlock *freenode,
|
||||
uint64_t size)
|
||||
{
|
||||
uint64_t addr;
|
||||
MemBlock *usednode;
|
||||
|
||||
g_assert(freenode);
|
||||
g_assert_cmpint(freenode->size, >=, size);
|
||||
|
||||
addr = freenode->addr;
|
||||
if (freenode->size == size) {
|
||||
/* re-use this freenode as our used node */
|
||||
QTAILQ_REMOVE(s->free, freenode, MLIST_ENTNAME);
|
||||
usednode = freenode;
|
||||
} else {
|
||||
/* adjust the free node and create a new used node */
|
||||
freenode->addr += size;
|
||||
freenode->size -= size;
|
||||
usednode = mlist_new(addr, size);
|
||||
}
|
||||
|
||||
mlist_sort_insert(s->used, usednode);
|
||||
return addr;
|
||||
}
|
||||
|
||||
/* To assert the correctness of the list.
|
||||
* Used only if ALLOC_PARANOID is set. */
|
||||
static void mlist_check(QGuestAllocator *s)
|
||||
{
|
||||
MemBlock *node;
|
||||
uint64_t addr = s->start > 0 ? s->start - 1 : 0;
|
||||
uint64_t next = s->start;
|
||||
|
||||
QTAILQ_FOREACH(node, s->free, MLIST_ENTNAME) {
|
||||
g_assert_cmpint(node->addr, >, addr);
|
||||
g_assert_cmpint(node->addr, >=, next);
|
||||
addr = node->addr;
|
||||
next = node->addr + node->size;
|
||||
}
|
||||
|
||||
addr = s->start > 0 ? s->start - 1 : 0;
|
||||
next = s->start;
|
||||
QTAILQ_FOREACH(node, s->used, MLIST_ENTNAME) {
|
||||
g_assert_cmpint(node->addr, >, addr);
|
||||
g_assert_cmpint(node->addr, >=, next);
|
||||
addr = node->addr;
|
||||
next = node->addr + node->size;
|
||||
}
|
||||
}
|
||||
|
||||
static uint64_t mlist_alloc(QGuestAllocator *s, uint64_t size)
|
||||
{
|
||||
MemBlock *node;
|
||||
|
||||
node = mlist_find_space(s->free, size);
|
||||
if (!node) {
|
||||
fprintf(stderr, "Out of guest memory.\n");
|
||||
g_assert_not_reached();
|
||||
}
|
||||
return mlist_fulfill(s, node, size);
|
||||
}
|
||||
|
||||
static void mlist_free(QGuestAllocator *s, uint64_t addr)
|
||||
{
|
||||
MemBlock *node;
|
||||
|
||||
if (addr == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
node = mlist_find_key(s->used, addr);
|
||||
if (!node) {
|
||||
fprintf(stderr, "Error: no record found for an allocation at "
|
||||
"0x%016" PRIx64 ".\n",
|
||||
addr);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
/* Rip it out of the used list and re-insert back into the free list. */
|
||||
QTAILQ_REMOVE(s->used, node, MLIST_ENTNAME);
|
||||
mlist_sort_insert(s->free, node);
|
||||
mlist_coalesce(s->free, node);
|
||||
}
|
||||
|
||||
/*
|
||||
* Mostly for valgrind happiness, but it does offer
|
||||
* a chokepoint for debugging guest memory leaks, too.
|
||||
*/
|
||||
void alloc_destroy(QGuestAllocator *allocator)
|
||||
{
|
||||
MemBlock *node;
|
||||
MemBlock *tmp;
|
||||
QAllocOpts mask;
|
||||
|
||||
/* Check for guest leaks, and destroy the list. */
|
||||
QTAILQ_FOREACH_SAFE(node, allocator->used, MLIST_ENTNAME, tmp) {
|
||||
if (allocator->opts & (ALLOC_LEAK_WARN | ALLOC_LEAK_ASSERT)) {
|
||||
fprintf(stderr, "guest malloc leak @ 0x%016" PRIx64 "; "
|
||||
"size 0x%016" PRIx64 ".\n",
|
||||
node->addr, node->size);
|
||||
}
|
||||
if (allocator->opts & (ALLOC_LEAK_ASSERT)) {
|
||||
g_assert_not_reached();
|
||||
}
|
||||
g_free(node);
|
||||
}
|
||||
|
||||
/* If we have previously asserted that there are no leaks, then there
|
||||
* should be only one node here with a specific address and size. */
|
||||
mask = ALLOC_LEAK_ASSERT | ALLOC_PARANOID;
|
||||
QTAILQ_FOREACH_SAFE(node, allocator->free, MLIST_ENTNAME, tmp) {
|
||||
if ((allocator->opts & mask) == mask) {
|
||||
if ((node->addr != allocator->start) ||
|
||||
(node->size != allocator->end - allocator->start)) {
|
||||
fprintf(stderr, "Free list is corrupted.\n");
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
g_free(node);
|
||||
}
|
||||
|
||||
g_free(allocator->used);
|
||||
g_free(allocator->free);
|
||||
}
|
||||
|
||||
uint64_t guest_alloc(QGuestAllocator *allocator, size_t size)
|
||||
{
|
||||
uint64_t rsize = size;
|
||||
uint64_t naddr;
|
||||
|
||||
if (!size) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
rsize += (allocator->page_size - 1);
|
||||
rsize &= -allocator->page_size;
|
||||
g_assert_cmpint((allocator->start + rsize), <=, allocator->end);
|
||||
g_assert_cmpint(rsize, >=, size);
|
||||
|
||||
naddr = mlist_alloc(allocator, rsize);
|
||||
if (allocator->opts & ALLOC_PARANOID) {
|
||||
mlist_check(allocator);
|
||||
}
|
||||
|
||||
return naddr;
|
||||
}
|
||||
|
||||
void guest_free(QGuestAllocator *allocator, uint64_t addr)
|
||||
{
|
||||
if (!addr) {
|
||||
return;
|
||||
}
|
||||
mlist_free(allocator, addr);
|
||||
if (allocator->opts & ALLOC_PARANOID) {
|
||||
mlist_check(allocator);
|
||||
}
|
||||
}
|
||||
|
||||
void alloc_init(QGuestAllocator *s, QAllocOpts opts,
|
||||
uint64_t start, uint64_t end,
|
||||
size_t page_size)
|
||||
{
|
||||
MemBlock *node;
|
||||
|
||||
s->opts = opts;
|
||||
s->start = start;
|
||||
s->end = end;
|
||||
|
||||
s->used = g_new(MemList, 1);
|
||||
s->free = g_new(MemList, 1);
|
||||
QTAILQ_INIT(s->used);
|
||||
QTAILQ_INIT(s->free);
|
||||
|
||||
node = mlist_new(s->start, s->end - s->start);
|
||||
QTAILQ_INSERT_HEAD(s->free, node, MLIST_ENTNAME);
|
||||
|
||||
s->page_size = page_size;
|
||||
}
|
||||
|
||||
void alloc_set_flags(QGuestAllocator *allocator, QAllocOpts opts)
|
||||
{
|
||||
allocator->opts |= opts;
|
||||
}
|
||||
|
||||
void migrate_allocator(QGuestAllocator *src,
|
||||
QGuestAllocator *dst)
|
||||
{
|
||||
MemBlock *node, *tmp;
|
||||
MemList *tmpused, *tmpfree;
|
||||
|
||||
/* The general memory layout should be equivalent,
|
||||
* though opts can differ. */
|
||||
g_assert_cmphex(src->start, ==, dst->start);
|
||||
g_assert_cmphex(src->end, ==, dst->end);
|
||||
|
||||
/* Destroy (silently, regardless of options) the dest-list: */
|
||||
QTAILQ_FOREACH_SAFE(node, dst->used, MLIST_ENTNAME, tmp) {
|
||||
g_free(node);
|
||||
}
|
||||
QTAILQ_FOREACH_SAFE(node, dst->free, MLIST_ENTNAME, tmp) {
|
||||
g_free(node);
|
||||
}
|
||||
|
||||
tmpused = dst->used;
|
||||
tmpfree = dst->free;
|
||||
|
||||
/* Inherit the lists of the source allocator: */
|
||||
dst->used = src->used;
|
||||
dst->free = src->free;
|
||||
|
||||
/* Source is now re-initialized, the source memory is 'invalid' now: */
|
||||
src->used = tmpused;
|
||||
src->free = tmpfree;
|
||||
QTAILQ_INIT(src->used);
|
||||
QTAILQ_INIT(src->free);
|
||||
node = mlist_new(src->start, src->end - src->start);
|
||||
QTAILQ_INSERT_HEAD(src->free, node, MLIST_ENTNAME);
|
||||
return;
|
||||
}
|
||||
50
tests/qtest/libqos/malloc.h
Normal file
50
tests/qtest/libqos/malloc.h
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
* libqos malloc support
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_MALLOC_H
|
||||
#define LIBQOS_MALLOC_H
|
||||
|
||||
#include "qemu/queue.h"
|
||||
#include "libqtest.h"
|
||||
|
||||
typedef enum {
|
||||
ALLOC_NO_FLAGS = 0x00,
|
||||
ALLOC_LEAK_WARN = 0x01,
|
||||
ALLOC_LEAK_ASSERT = 0x02,
|
||||
ALLOC_PARANOID = 0x04
|
||||
} QAllocOpts;
|
||||
|
||||
typedef QTAILQ_HEAD(MemList, MemBlock) MemList;
|
||||
|
||||
typedef struct QGuestAllocator {
|
||||
QAllocOpts opts;
|
||||
uint64_t start;
|
||||
uint64_t end;
|
||||
uint32_t page_size;
|
||||
|
||||
MemList *used;
|
||||
MemList *free;
|
||||
} QGuestAllocator;
|
||||
|
||||
/* Always returns page aligned values */
|
||||
uint64_t guest_alloc(QGuestAllocator *allocator, size_t size);
|
||||
void guest_free(QGuestAllocator *allocator, uint64_t addr);
|
||||
void migrate_allocator(QGuestAllocator *src, QGuestAllocator *dst);
|
||||
|
||||
void alloc_set_flags(QGuestAllocator *allocator, QAllocOpts opts);
|
||||
|
||||
void alloc_init(QGuestAllocator *alloc, QAllocOpts flags,
|
||||
uint64_t start, uint64_t end,
|
||||
size_t page_size);
|
||||
void alloc_destroy(QGuestAllocator *allocator);
|
||||
|
||||
#endif
|
||||
200
tests/qtest/libqos/pci-pc.c
Normal file
200
tests/qtest/libqos/pci-pc.c
Normal file
|
|
@ -0,0 +1,200 @@
|
|||
/*
|
||||
* libqos PCI bindings for PC
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/pci-pc.h"
|
||||
#include "qapi/qmp/qdict.h"
|
||||
#include "hw/pci/pci_regs.h"
|
||||
|
||||
#include "qemu/module.h"
|
||||
|
||||
#define ACPI_PCIHP_ADDR 0xae00
|
||||
#define PCI_EJ_BASE 0x0008
|
||||
|
||||
static uint8_t qpci_pc_pio_readb(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
return qtest_inb(bus->qts, addr);
|
||||
}
|
||||
|
||||
static void qpci_pc_pio_writeb(QPCIBus *bus, uint32_t addr, uint8_t val)
|
||||
{
|
||||
qtest_outb(bus->qts, addr, val);
|
||||
}
|
||||
|
||||
static uint16_t qpci_pc_pio_readw(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
return qtest_inw(bus->qts, addr);
|
||||
}
|
||||
|
||||
static void qpci_pc_pio_writew(QPCIBus *bus, uint32_t addr, uint16_t val)
|
||||
{
|
||||
qtest_outw(bus->qts, addr, val);
|
||||
}
|
||||
|
||||
static uint32_t qpci_pc_pio_readl(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
return qtest_inl(bus->qts, addr);
|
||||
}
|
||||
|
||||
static void qpci_pc_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val)
|
||||
{
|
||||
qtest_outl(bus->qts, addr, val);
|
||||
}
|
||||
|
||||
static uint64_t qpci_pc_pio_readq(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
return (uint64_t)qtest_inl(bus->qts, addr) +
|
||||
((uint64_t)qtest_inl(bus->qts, addr + 4) << 32);
|
||||
}
|
||||
|
||||
static void qpci_pc_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val)
|
||||
{
|
||||
qtest_outl(bus->qts, addr, val & 0xffffffff);
|
||||
qtest_outl(bus->qts, addr + 4, val >> 32);
|
||||
}
|
||||
|
||||
static void qpci_pc_memread(QPCIBus *bus, uint32_t addr, void *buf, size_t len)
|
||||
{
|
||||
qtest_memread(bus->qts, addr, buf, len);
|
||||
}
|
||||
|
||||
static void qpci_pc_memwrite(QPCIBus *bus, uint32_t addr,
|
||||
const void *buf, size_t len)
|
||||
{
|
||||
qtest_memwrite(bus->qts, addr, buf, len);
|
||||
}
|
||||
|
||||
static uint8_t qpci_pc_config_readb(QPCIBus *bus, int devfn, uint8_t offset)
|
||||
{
|
||||
qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);
|
||||
return qtest_inb(bus->qts, 0xcfc);
|
||||
}
|
||||
|
||||
static uint16_t qpci_pc_config_readw(QPCIBus *bus, int devfn, uint8_t offset)
|
||||
{
|
||||
qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);
|
||||
return qtest_inw(bus->qts, 0xcfc);
|
||||
}
|
||||
|
||||
static uint32_t qpci_pc_config_readl(QPCIBus *bus, int devfn, uint8_t offset)
|
||||
{
|
||||
qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);
|
||||
return qtest_inl(bus->qts, 0xcfc);
|
||||
}
|
||||
|
||||
static void qpci_pc_config_writeb(QPCIBus *bus, int devfn, uint8_t offset, uint8_t value)
|
||||
{
|
||||
qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);
|
||||
qtest_outb(bus->qts, 0xcfc, value);
|
||||
}
|
||||
|
||||
static void qpci_pc_config_writew(QPCIBus *bus, int devfn, uint8_t offset, uint16_t value)
|
||||
{
|
||||
qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);
|
||||
qtest_outw(bus->qts, 0xcfc, value);
|
||||
}
|
||||
|
||||
static void qpci_pc_config_writel(QPCIBus *bus, int devfn, uint8_t offset, uint32_t value)
|
||||
{
|
||||
qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);
|
||||
qtest_outl(bus->qts, 0xcfc, value);
|
||||
}
|
||||
|
||||
static void *qpci_pc_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QPCIBusPC *qpci = obj;
|
||||
if (!g_strcmp0(interface, "pci-bus")) {
|
||||
return &qpci->bus;
|
||||
}
|
||||
fprintf(stderr, "%s not present in pci-bus-pc\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
void qpci_init_pc(QPCIBusPC *qpci, QTestState *qts, QGuestAllocator *alloc)
|
||||
{
|
||||
assert(qts);
|
||||
|
||||
/* tests can use pci-bus */
|
||||
qpci->bus.has_buggy_msi = false;
|
||||
|
||||
qpci->bus.pio_readb = qpci_pc_pio_readb;
|
||||
qpci->bus.pio_readw = qpci_pc_pio_readw;
|
||||
qpci->bus.pio_readl = qpci_pc_pio_readl;
|
||||
qpci->bus.pio_readq = qpci_pc_pio_readq;
|
||||
|
||||
qpci->bus.pio_writeb = qpci_pc_pio_writeb;
|
||||
qpci->bus.pio_writew = qpci_pc_pio_writew;
|
||||
qpci->bus.pio_writel = qpci_pc_pio_writel;
|
||||
qpci->bus.pio_writeq = qpci_pc_pio_writeq;
|
||||
|
||||
qpci->bus.memread = qpci_pc_memread;
|
||||
qpci->bus.memwrite = qpci_pc_memwrite;
|
||||
|
||||
qpci->bus.config_readb = qpci_pc_config_readb;
|
||||
qpci->bus.config_readw = qpci_pc_config_readw;
|
||||
qpci->bus.config_readl = qpci_pc_config_readl;
|
||||
|
||||
qpci->bus.config_writeb = qpci_pc_config_writeb;
|
||||
qpci->bus.config_writew = qpci_pc_config_writew;
|
||||
qpci->bus.config_writel = qpci_pc_config_writel;
|
||||
|
||||
qpci->bus.qts = qts;
|
||||
qpci->bus.pio_alloc_ptr = 0xc000;
|
||||
qpci->bus.mmio_alloc_ptr = 0xE0000000;
|
||||
qpci->bus.mmio_limit = 0x100000000ULL;
|
||||
|
||||
qpci->obj.get_driver = qpci_pc_get_driver;
|
||||
}
|
||||
|
||||
QPCIBus *qpci_new_pc(QTestState *qts, QGuestAllocator *alloc)
|
||||
{
|
||||
QPCIBusPC *qpci = g_new0(QPCIBusPC, 1);
|
||||
qpci_init_pc(qpci, qts, alloc);
|
||||
|
||||
return &qpci->bus;
|
||||
}
|
||||
|
||||
void qpci_free_pc(QPCIBus *bus)
|
||||
{
|
||||
QPCIBusPC *s;
|
||||
|
||||
if (!bus) {
|
||||
return;
|
||||
}
|
||||
s = container_of(bus, QPCIBusPC, bus);
|
||||
|
||||
g_free(s);
|
||||
}
|
||||
|
||||
void qpci_unplug_acpi_device_test(QTestState *qts, const char *id, uint8_t slot)
|
||||
{
|
||||
QDict *response;
|
||||
|
||||
response = qtest_qmp(qts, "{'execute': 'device_del',"
|
||||
" 'arguments': {'id': %s}}", id);
|
||||
g_assert(response);
|
||||
g_assert(!qdict_haskey(response, "error"));
|
||||
qobject_unref(response);
|
||||
|
||||
qtest_outb(qts, ACPI_PCIHP_ADDR + PCI_EJ_BASE, 1 << slot);
|
||||
|
||||
qtest_qmp_eventwait(qts, "DEVICE_DELETED");
|
||||
}
|
||||
|
||||
static void qpci_pc_register_nodes(void)
|
||||
{
|
||||
qos_node_create_driver("pci-bus-pc", NULL);
|
||||
qos_node_produces("pci-bus-pc", "pci-bus");
|
||||
}
|
||||
|
||||
libqos_init(qpci_pc_register_nodes);
|
||||
49
tests/qtest/libqos/pci-pc.h
Normal file
49
tests/qtest/libqos/pci-pc.h
Normal file
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* libqos PCI bindings for PC
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_PCI_PC_H
|
||||
#define LIBQOS_PCI_PC_H
|
||||
|
||||
#include "libqos/pci.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
typedef struct QPCIBusPC {
|
||||
QOSGraphObject obj;
|
||||
QPCIBus bus;
|
||||
} QPCIBusPC;
|
||||
|
||||
/* qpci_init_pc():
|
||||
* @ret: A valid QPCIBusPC * pointer
|
||||
* @qts: The %QTestState for this PC machine
|
||||
* @alloc: A previously initialized @alloc providing memory for @qts
|
||||
*
|
||||
* This function initializes an already allocated
|
||||
* QPCIBusPC object.
|
||||
*/
|
||||
void qpci_init_pc(QPCIBusPC *ret, QTestState *qts, QGuestAllocator *alloc);
|
||||
|
||||
/* qpci_pc_new():
|
||||
* @qts: The %QTestState for this PC machine
|
||||
* @alloc: A previously initialized @alloc providing memory for @qts
|
||||
*
|
||||
* This function creates a new QPCIBusPC object,
|
||||
* and properly initialize its fields.
|
||||
*
|
||||
* Returns the QPCIBus *bus field of a newly
|
||||
* allocated QPCIBusPC.
|
||||
*/
|
||||
QPCIBus *qpci_new_pc(QTestState *qts, QGuestAllocator *alloc);
|
||||
|
||||
void qpci_free_pc(QPCIBus *bus);
|
||||
|
||||
#endif
|
||||
232
tests/qtest/libqos/pci-spapr.c
Normal file
232
tests/qtest/libqos/pci-spapr.c
Normal file
|
|
@ -0,0 +1,232 @@
|
|||
/*
|
||||
* libqos PCI bindings for SPAPR
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/pci-spapr.h"
|
||||
#include "libqos/rtas.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
#include "hw/pci/pci_regs.h"
|
||||
|
||||
#include "qemu/host-utils.h"
|
||||
#include "qemu/module.h"
|
||||
|
||||
/*
|
||||
* PCI devices are always little-endian
|
||||
* SPAPR by default is big-endian
|
||||
* so PCI accessors need to swap data endianness
|
||||
*/
|
||||
|
||||
static uint8_t qpci_spapr_pio_readb(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
return qtest_readb(bus->qts, s->pio_cpu_base + addr);
|
||||
}
|
||||
|
||||
static void qpci_spapr_pio_writeb(QPCIBus *bus, uint32_t addr, uint8_t val)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
qtest_writeb(bus->qts, s->pio_cpu_base + addr, val);
|
||||
}
|
||||
|
||||
static uint16_t qpci_spapr_pio_readw(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
return bswap16(qtest_readw(bus->qts, s->pio_cpu_base + addr));
|
||||
}
|
||||
|
||||
static void qpci_spapr_pio_writew(QPCIBus *bus, uint32_t addr, uint16_t val)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
qtest_writew(bus->qts, s->pio_cpu_base + addr, bswap16(val));
|
||||
}
|
||||
|
||||
static uint32_t qpci_spapr_pio_readl(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
return bswap32(qtest_readl(bus->qts, s->pio_cpu_base + addr));
|
||||
}
|
||||
|
||||
static void qpci_spapr_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
qtest_writel(bus->qts, s->pio_cpu_base + addr, bswap32(val));
|
||||
}
|
||||
|
||||
static uint64_t qpci_spapr_pio_readq(QPCIBus *bus, uint32_t addr)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
return bswap64(qtest_readq(bus->qts, s->pio_cpu_base + addr));
|
||||
}
|
||||
|
||||
static void qpci_spapr_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
qtest_writeq(bus->qts, s->pio_cpu_base + addr, bswap64(val));
|
||||
}
|
||||
|
||||
static void qpci_spapr_memread(QPCIBus *bus, uint32_t addr,
|
||||
void *buf, size_t len)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
qtest_memread(bus->qts, s->mmio32_cpu_base + addr, buf, len);
|
||||
}
|
||||
|
||||
static void qpci_spapr_memwrite(QPCIBus *bus, uint32_t addr,
|
||||
const void *buf, size_t len)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
qtest_memwrite(bus->qts, s->mmio32_cpu_base + addr, buf, len);
|
||||
}
|
||||
|
||||
static uint8_t qpci_spapr_config_readb(QPCIBus *bus, int devfn, uint8_t offset)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
uint32_t config_addr = (devfn << 8) | offset;
|
||||
return qrtas_ibm_read_pci_config(bus->qts, s->alloc, s->buid,
|
||||
config_addr, 1);
|
||||
}
|
||||
|
||||
static uint16_t qpci_spapr_config_readw(QPCIBus *bus, int devfn, uint8_t offset)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
uint32_t config_addr = (devfn << 8) | offset;
|
||||
return qrtas_ibm_read_pci_config(bus->qts, s->alloc, s->buid,
|
||||
config_addr, 2);
|
||||
}
|
||||
|
||||
static uint32_t qpci_spapr_config_readl(QPCIBus *bus, int devfn, uint8_t offset)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
uint32_t config_addr = (devfn << 8) | offset;
|
||||
return qrtas_ibm_read_pci_config(bus->qts, s->alloc, s->buid,
|
||||
config_addr, 4);
|
||||
}
|
||||
|
||||
static void qpci_spapr_config_writeb(QPCIBus *bus, int devfn, uint8_t offset,
|
||||
uint8_t value)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
uint32_t config_addr = (devfn << 8) | offset;
|
||||
qrtas_ibm_write_pci_config(bus->qts, s->alloc, s->buid,
|
||||
config_addr, 1, value);
|
||||
}
|
||||
|
||||
static void qpci_spapr_config_writew(QPCIBus *bus, int devfn, uint8_t offset,
|
||||
uint16_t value)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
uint32_t config_addr = (devfn << 8) | offset;
|
||||
qrtas_ibm_write_pci_config(bus->qts, s->alloc, s->buid,
|
||||
config_addr, 2, value);
|
||||
}
|
||||
|
||||
static void qpci_spapr_config_writel(QPCIBus *bus, int devfn, uint8_t offset,
|
||||
uint32_t value)
|
||||
{
|
||||
QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
uint32_t config_addr = (devfn << 8) | offset;
|
||||
qrtas_ibm_write_pci_config(bus->qts, s->alloc, s->buid,
|
||||
config_addr, 4, value);
|
||||
}
|
||||
|
||||
#define SPAPR_PCI_BASE (1ULL << 45)
|
||||
|
||||
#define SPAPR_PCI_MMIO32_WIN_SIZE 0x80000000 /* 2 GiB */
|
||||
#define SPAPR_PCI_IO_WIN_SIZE 0x10000
|
||||
|
||||
static void *qpci_spapr_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QPCIBusSPAPR *qpci = obj;
|
||||
if (!g_strcmp0(interface, "pci-bus")) {
|
||||
return &qpci->bus;
|
||||
}
|
||||
fprintf(stderr, "%s not present in pci-bus-spapr", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
void qpci_init_spapr(QPCIBusSPAPR *qpci, QTestState *qts,
|
||||
QGuestAllocator *alloc)
|
||||
{
|
||||
assert(qts);
|
||||
|
||||
/* tests cannot use spapr, needs to be fixed first */
|
||||
qpci->bus.has_buggy_msi = true;
|
||||
|
||||
qpci->alloc = alloc;
|
||||
|
||||
qpci->bus.pio_readb = qpci_spapr_pio_readb;
|
||||
qpci->bus.pio_readw = qpci_spapr_pio_readw;
|
||||
qpci->bus.pio_readl = qpci_spapr_pio_readl;
|
||||
qpci->bus.pio_readq = qpci_spapr_pio_readq;
|
||||
|
||||
qpci->bus.pio_writeb = qpci_spapr_pio_writeb;
|
||||
qpci->bus.pio_writew = qpci_spapr_pio_writew;
|
||||
qpci->bus.pio_writel = qpci_spapr_pio_writel;
|
||||
qpci->bus.pio_writeq = qpci_spapr_pio_writeq;
|
||||
|
||||
qpci->bus.memread = qpci_spapr_memread;
|
||||
qpci->bus.memwrite = qpci_spapr_memwrite;
|
||||
|
||||
qpci->bus.config_readb = qpci_spapr_config_readb;
|
||||
qpci->bus.config_readw = qpci_spapr_config_readw;
|
||||
qpci->bus.config_readl = qpci_spapr_config_readl;
|
||||
|
||||
qpci->bus.config_writeb = qpci_spapr_config_writeb;
|
||||
qpci->bus.config_writew = qpci_spapr_config_writew;
|
||||
qpci->bus.config_writel = qpci_spapr_config_writel;
|
||||
|
||||
/* FIXME: We assume the default location of the PHB for now.
|
||||
* Ideally we'd parse the device tree deposited in the guest to
|
||||
* get the window locations */
|
||||
qpci->buid = 0x800000020000000ULL;
|
||||
|
||||
qpci->pio_cpu_base = SPAPR_PCI_BASE;
|
||||
qpci->pio.pci_base = 0;
|
||||
qpci->pio.size = SPAPR_PCI_IO_WIN_SIZE;
|
||||
|
||||
/* 32-bit portion of the MMIO window is at PCI address 2..4 GiB */
|
||||
qpci->mmio32_cpu_base = SPAPR_PCI_BASE;
|
||||
qpci->mmio32.pci_base = SPAPR_PCI_MMIO32_WIN_SIZE;
|
||||
qpci->mmio32.size = SPAPR_PCI_MMIO32_WIN_SIZE;
|
||||
|
||||
qpci->bus.qts = qts;
|
||||
qpci->bus.pio_alloc_ptr = 0xc000;
|
||||
qpci->bus.mmio_alloc_ptr = qpci->mmio32.pci_base;
|
||||
qpci->bus.mmio_limit = qpci->mmio32.pci_base + qpci->mmio32.size;
|
||||
|
||||
qpci->obj.get_driver = qpci_spapr_get_driver;
|
||||
}
|
||||
|
||||
QPCIBus *qpci_new_spapr(QTestState *qts, QGuestAllocator *alloc)
|
||||
{
|
||||
QPCIBusSPAPR *qpci = g_new0(QPCIBusSPAPR, 1);
|
||||
qpci_init_spapr(qpci, qts, alloc);
|
||||
|
||||
return &qpci->bus;
|
||||
}
|
||||
|
||||
void qpci_free_spapr(QPCIBus *bus)
|
||||
{
|
||||
QPCIBusSPAPR *s;
|
||||
|
||||
if (!bus) {
|
||||
return;
|
||||
}
|
||||
s = container_of(bus, QPCIBusSPAPR, bus);
|
||||
|
||||
g_free(s);
|
||||
}
|
||||
|
||||
static void qpci_spapr_register_nodes(void)
|
||||
{
|
||||
qos_node_create_driver("pci-bus-spapr", NULL);
|
||||
qos_node_produces("pci-bus-spapr", "pci-bus");
|
||||
}
|
||||
|
||||
libqos_init(qpci_spapr_register_nodes);
|
||||
41
tests/qtest/libqos/pci-spapr.h
Normal file
41
tests/qtest/libqos/pci-spapr.h
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* libqos PCI bindings for SPAPR
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_PCI_SPAPR_H
|
||||
#define LIBQOS_PCI_SPAPR_H
|
||||
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/pci.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
/* From include/hw/pci-host/spapr.h */
|
||||
|
||||
typedef struct QPCIWindow {
|
||||
uint64_t pci_base; /* window address in PCI space */
|
||||
uint64_t size; /* window size */
|
||||
} QPCIWindow;
|
||||
|
||||
typedef struct QPCIBusSPAPR {
|
||||
QOSGraphObject obj;
|
||||
QPCIBus bus;
|
||||
QGuestAllocator *alloc;
|
||||
|
||||
uint64_t buid;
|
||||
|
||||
uint64_t pio_cpu_base;
|
||||
QPCIWindow pio;
|
||||
|
||||
uint64_t mmio32_cpu_base;
|
||||
QPCIWindow mmio32;
|
||||
} QPCIBusSPAPR;
|
||||
|
||||
void qpci_init_spapr(QPCIBusSPAPR *ret, QTestState *qts,
|
||||
QGuestAllocator *alloc);
|
||||
QPCIBus *qpci_new_spapr(QTestState *qts, QGuestAllocator *alloc);
|
||||
void qpci_free_spapr(QPCIBus *bus);
|
||||
|
||||
#endif
|
||||
457
tests/qtest/libqos/pci.c
Normal file
457
tests/qtest/libqos/pci.c
Normal file
|
|
@ -0,0 +1,457 @@
|
|||
/*
|
||||
* libqos PCI bindings
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqos/pci.h"
|
||||
|
||||
#include "hw/pci/pci_regs.h"
|
||||
#include "qemu/host-utils.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
|
||||
void (*func)(QPCIDevice *dev, int devfn, void *data),
|
||||
void *data)
|
||||
{
|
||||
int slot;
|
||||
|
||||
for (slot = 0; slot < 32; slot++) {
|
||||
int fn;
|
||||
|
||||
for (fn = 0; fn < 8; fn++) {
|
||||
QPCIDevice *dev;
|
||||
|
||||
dev = qpci_device_find(bus, QPCI_DEVFN(slot, fn));
|
||||
if (!dev) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (vendor_id != -1 &&
|
||||
qpci_config_readw(dev, PCI_VENDOR_ID) != vendor_id) {
|
||||
g_free(dev);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (device_id != -1 &&
|
||||
qpci_config_readw(dev, PCI_DEVICE_ID) != device_id) {
|
||||
g_free(dev);
|
||||
continue;
|
||||
}
|
||||
|
||||
func(dev, QPCI_DEVFN(slot, fn), data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bool qpci_has_buggy_msi(QPCIDevice *dev)
|
||||
{
|
||||
return dev->bus->has_buggy_msi;
|
||||
}
|
||||
|
||||
bool qpci_check_buggy_msi(QPCIDevice *dev)
|
||||
{
|
||||
if (qpci_has_buggy_msi(dev)) {
|
||||
g_test_skip("Skipping due to incomplete support for MSI");
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static void qpci_device_set(QPCIDevice *dev, QPCIBus *bus, int devfn)
|
||||
{
|
||||
g_assert(dev);
|
||||
|
||||
dev->bus = bus;
|
||||
dev->devfn = devfn;
|
||||
}
|
||||
|
||||
QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn)
|
||||
{
|
||||
QPCIDevice *dev;
|
||||
|
||||
dev = g_malloc0(sizeof(*dev));
|
||||
qpci_device_set(dev, bus, devfn);
|
||||
|
||||
if (qpci_config_readw(dev, PCI_VENDOR_ID) == 0xFFFF) {
|
||||
g_free(dev);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
void qpci_device_init(QPCIDevice *dev, QPCIBus *bus, QPCIAddress *addr)
|
||||
{
|
||||
uint16_t vendor_id, device_id;
|
||||
|
||||
qpci_device_set(dev, bus, addr->devfn);
|
||||
vendor_id = qpci_config_readw(dev, PCI_VENDOR_ID);
|
||||
device_id = qpci_config_readw(dev, PCI_DEVICE_ID);
|
||||
g_assert(!addr->vendor_id || vendor_id == addr->vendor_id);
|
||||
g_assert(!addr->device_id || device_id == addr->device_id);
|
||||
}
|
||||
|
||||
void qpci_device_enable(QPCIDevice *dev)
|
||||
{
|
||||
uint16_t cmd;
|
||||
|
||||
/* FIXME -- does this need to be a bus callout? */
|
||||
cmd = qpci_config_readw(dev, PCI_COMMAND);
|
||||
cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
|
||||
qpci_config_writew(dev, PCI_COMMAND, cmd);
|
||||
|
||||
/* Verify the bits are now set. */
|
||||
cmd = qpci_config_readw(dev, PCI_COMMAND);
|
||||
g_assert_cmphex(cmd & PCI_COMMAND_IO, ==, PCI_COMMAND_IO);
|
||||
g_assert_cmphex(cmd & PCI_COMMAND_MEMORY, ==, PCI_COMMAND_MEMORY);
|
||||
g_assert_cmphex(cmd & PCI_COMMAND_MASTER, ==, PCI_COMMAND_MASTER);
|
||||
}
|
||||
|
||||
/**
|
||||
* qpci_find_capability:
|
||||
* @dev: the PCI device
|
||||
* @id: the PCI Capability ID (PCI_CAP_ID_*)
|
||||
* @start_addr: 0 to begin iteration or the last return value to continue
|
||||
* iteration
|
||||
*
|
||||
* Iterate over the PCI Capabilities List.
|
||||
*
|
||||
* Returns: PCI Configuration Space offset of the capabililty structure or
|
||||
* 0 if no further matching capability is found
|
||||
*/
|
||||
uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_addr)
|
||||
{
|
||||
uint8_t cap;
|
||||
uint8_t addr;
|
||||
|
||||
if (start_addr) {
|
||||
addr = qpci_config_readb(dev, start_addr + PCI_CAP_LIST_NEXT);
|
||||
} else {
|
||||
addr = qpci_config_readb(dev, PCI_CAPABILITY_LIST);
|
||||
}
|
||||
|
||||
do {
|
||||
cap = qpci_config_readb(dev, addr);
|
||||
if (cap != id) {
|
||||
addr = qpci_config_readb(dev, addr + PCI_CAP_LIST_NEXT);
|
||||
}
|
||||
} while (cap != id && addr != 0);
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
void qpci_msix_enable(QPCIDevice *dev)
|
||||
{
|
||||
uint8_t addr;
|
||||
uint16_t val;
|
||||
uint32_t table;
|
||||
uint8_t bir_table;
|
||||
uint8_t bir_pba;
|
||||
|
||||
addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
|
||||
g_assert_cmphex(addr, !=, 0);
|
||||
|
||||
val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
|
||||
qpci_config_writew(dev, addr + PCI_MSIX_FLAGS, val | PCI_MSIX_FLAGS_ENABLE);
|
||||
|
||||
table = qpci_config_readl(dev, addr + PCI_MSIX_TABLE);
|
||||
bir_table = table & PCI_MSIX_FLAGS_BIRMASK;
|
||||
dev->msix_table_bar = qpci_iomap(dev, bir_table, NULL);
|
||||
dev->msix_table_off = table & ~PCI_MSIX_FLAGS_BIRMASK;
|
||||
|
||||
table = qpci_config_readl(dev, addr + PCI_MSIX_PBA);
|
||||
bir_pba = table & PCI_MSIX_FLAGS_BIRMASK;
|
||||
if (bir_pba != bir_table) {
|
||||
dev->msix_pba_bar = qpci_iomap(dev, bir_pba, NULL);
|
||||
} else {
|
||||
dev->msix_pba_bar = dev->msix_table_bar;
|
||||
}
|
||||
dev->msix_pba_off = table & ~PCI_MSIX_FLAGS_BIRMASK;
|
||||
|
||||
dev->msix_enabled = true;
|
||||
}
|
||||
|
||||
void qpci_msix_disable(QPCIDevice *dev)
|
||||
{
|
||||
uint8_t addr;
|
||||
uint16_t val;
|
||||
|
||||
g_assert(dev->msix_enabled);
|
||||
addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
|
||||
g_assert_cmphex(addr, !=, 0);
|
||||
val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
|
||||
qpci_config_writew(dev, addr + PCI_MSIX_FLAGS,
|
||||
val & ~PCI_MSIX_FLAGS_ENABLE);
|
||||
|
||||
if (dev->msix_pba_bar.addr != dev->msix_table_bar.addr) {
|
||||
qpci_iounmap(dev, dev->msix_pba_bar);
|
||||
}
|
||||
qpci_iounmap(dev, dev->msix_table_bar);
|
||||
|
||||
dev->msix_enabled = 0;
|
||||
dev->msix_table_off = 0;
|
||||
dev->msix_pba_off = 0;
|
||||
}
|
||||
|
||||
bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry)
|
||||
{
|
||||
uint32_t pba_entry;
|
||||
uint8_t bit_n = entry % 32;
|
||||
uint64_t off = (entry / 32) * PCI_MSIX_ENTRY_SIZE / 4;
|
||||
|
||||
g_assert(dev->msix_enabled);
|
||||
pba_entry = qpci_io_readl(dev, dev->msix_pba_bar, dev->msix_pba_off + off);
|
||||
qpci_io_writel(dev, dev->msix_pba_bar, dev->msix_pba_off + off,
|
||||
pba_entry & ~(1 << bit_n));
|
||||
return (pba_entry & (1 << bit_n)) != 0;
|
||||
}
|
||||
|
||||
bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry)
|
||||
{
|
||||
uint8_t addr;
|
||||
uint16_t val;
|
||||
uint64_t vector_off = dev->msix_table_off + entry * PCI_MSIX_ENTRY_SIZE;
|
||||
|
||||
g_assert(dev->msix_enabled);
|
||||
addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
|
||||
g_assert_cmphex(addr, !=, 0);
|
||||
val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
|
||||
|
||||
if (val & PCI_MSIX_FLAGS_MASKALL) {
|
||||
return true;
|
||||
} else {
|
||||
return (qpci_io_readl(dev, dev->msix_table_bar,
|
||||
vector_off + PCI_MSIX_ENTRY_VECTOR_CTRL)
|
||||
& PCI_MSIX_ENTRY_CTRL_MASKBIT) != 0;
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t qpci_msix_table_size(QPCIDevice *dev)
|
||||
{
|
||||
uint8_t addr;
|
||||
uint16_t control;
|
||||
|
||||
addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
|
||||
g_assert_cmphex(addr, !=, 0);
|
||||
|
||||
control = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
|
||||
return (control & PCI_MSIX_FLAGS_QSIZE) + 1;
|
||||
}
|
||||
|
||||
uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset)
|
||||
{
|
||||
return dev->bus->config_readb(dev->bus, dev->devfn, offset);
|
||||
}
|
||||
|
||||
uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset)
|
||||
{
|
||||
return dev->bus->config_readw(dev->bus, dev->devfn, offset);
|
||||
}
|
||||
|
||||
uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset)
|
||||
{
|
||||
return dev->bus->config_readl(dev->bus, dev->devfn, offset);
|
||||
}
|
||||
|
||||
|
||||
void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value)
|
||||
{
|
||||
dev->bus->config_writeb(dev->bus, dev->devfn, offset, value);
|
||||
}
|
||||
|
||||
void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value)
|
||||
{
|
||||
dev->bus->config_writew(dev->bus, dev->devfn, offset, value);
|
||||
}
|
||||
|
||||
void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value)
|
||||
{
|
||||
dev->bus->config_writel(dev->bus, dev->devfn, offset, value);
|
||||
}
|
||||
|
||||
uint8_t qpci_io_readb(QPCIDevice *dev, QPCIBar token, uint64_t off)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
return dev->bus->pio_readb(dev->bus, token.addr + off);
|
||||
} else {
|
||||
uint8_t val;
|
||||
dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
|
||||
return val;
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
return dev->bus->pio_readw(dev->bus, token.addr + off);
|
||||
} else {
|
||||
uint16_t val;
|
||||
dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
|
||||
return le16_to_cpu(val);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t qpci_io_readl(QPCIDevice *dev, QPCIBar token, uint64_t off)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
return dev->bus->pio_readl(dev->bus, token.addr + off);
|
||||
} else {
|
||||
uint32_t val;
|
||||
dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
|
||||
return le32_to_cpu(val);
|
||||
}
|
||||
}
|
||||
|
||||
uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token, uint64_t off)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
return dev->bus->pio_readq(dev->bus, token.addr + off);
|
||||
} else {
|
||||
uint64_t val;
|
||||
dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
|
||||
return le64_to_cpu(val);
|
||||
}
|
||||
}
|
||||
|
||||
void qpci_io_writeb(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint8_t value)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
dev->bus->pio_writeb(dev->bus, token.addr + off, value);
|
||||
} else {
|
||||
dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
|
||||
}
|
||||
}
|
||||
|
||||
void qpci_io_writew(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint16_t value)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
dev->bus->pio_writew(dev->bus, token.addr + off, value);
|
||||
} else {
|
||||
value = cpu_to_le16(value);
|
||||
dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
|
||||
}
|
||||
}
|
||||
|
||||
void qpci_io_writel(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint32_t value)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
dev->bus->pio_writel(dev->bus, token.addr + off, value);
|
||||
} else {
|
||||
value = cpu_to_le32(value);
|
||||
dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
|
||||
}
|
||||
}
|
||||
|
||||
void qpci_io_writeq(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint64_t value)
|
||||
{
|
||||
if (token.addr < QPCI_PIO_LIMIT) {
|
||||
dev->bus->pio_writeq(dev->bus, token.addr + off, value);
|
||||
} else {
|
||||
value = cpu_to_le64(value);
|
||||
dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
|
||||
}
|
||||
}
|
||||
|
||||
void qpci_memread(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
void *buf, size_t len)
|
||||
{
|
||||
g_assert(token.addr >= QPCI_PIO_LIMIT);
|
||||
dev->bus->memread(dev->bus, token.addr + off, buf, len);
|
||||
}
|
||||
|
||||
void qpci_memwrite(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
const void *buf, size_t len)
|
||||
{
|
||||
g_assert(token.addr >= QPCI_PIO_LIMIT);
|
||||
dev->bus->memwrite(dev->bus, token.addr + off, buf, len);
|
||||
}
|
||||
|
||||
QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr)
|
||||
{
|
||||
QPCIBus *bus = dev->bus;
|
||||
static const int bar_reg_map[] = {
|
||||
PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_2,
|
||||
PCI_BASE_ADDRESS_3, PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_5,
|
||||
};
|
||||
QPCIBar bar;
|
||||
int bar_reg;
|
||||
uint32_t addr, size;
|
||||
uint32_t io_type;
|
||||
uint64_t loc;
|
||||
|
||||
g_assert(barno >= 0 && barno <= 5);
|
||||
bar_reg = bar_reg_map[barno];
|
||||
|
||||
qpci_config_writel(dev, bar_reg, 0xFFFFFFFF);
|
||||
addr = qpci_config_readl(dev, bar_reg);
|
||||
|
||||
io_type = addr & PCI_BASE_ADDRESS_SPACE;
|
||||
if (io_type == PCI_BASE_ADDRESS_SPACE_IO) {
|
||||
addr &= PCI_BASE_ADDRESS_IO_MASK;
|
||||
} else {
|
||||
addr &= PCI_BASE_ADDRESS_MEM_MASK;
|
||||
}
|
||||
|
||||
g_assert(addr); /* Must have *some* size bits */
|
||||
|
||||
size = 1U << ctz32(addr);
|
||||
if (sizeptr) {
|
||||
*sizeptr = size;
|
||||
}
|
||||
|
||||
if (io_type == PCI_BASE_ADDRESS_SPACE_IO) {
|
||||
loc = QEMU_ALIGN_UP(bus->pio_alloc_ptr, size);
|
||||
|
||||
g_assert(loc >= bus->pio_alloc_ptr);
|
||||
g_assert(loc + size <= QPCI_PIO_LIMIT); /* Keep PIO below 64kiB */
|
||||
|
||||
bus->pio_alloc_ptr = loc + size;
|
||||
|
||||
qpci_config_writel(dev, bar_reg, loc | PCI_BASE_ADDRESS_SPACE_IO);
|
||||
} else {
|
||||
loc = QEMU_ALIGN_UP(bus->mmio_alloc_ptr, size);
|
||||
|
||||
/* Check for space */
|
||||
g_assert(loc >= bus->mmio_alloc_ptr);
|
||||
g_assert(loc + size <= bus->mmio_limit);
|
||||
|
||||
bus->mmio_alloc_ptr = loc + size;
|
||||
|
||||
qpci_config_writel(dev, bar_reg, loc);
|
||||
}
|
||||
|
||||
bar.addr = loc;
|
||||
return bar;
|
||||
}
|
||||
|
||||
void qpci_iounmap(QPCIDevice *dev, QPCIBar bar)
|
||||
{
|
||||
/* FIXME */
|
||||
}
|
||||
|
||||
QPCIBar qpci_legacy_iomap(QPCIDevice *dev, uint16_t addr)
|
||||
{
|
||||
QPCIBar bar = { .addr = addr };
|
||||
return bar;
|
||||
}
|
||||
|
||||
void add_qpci_address(QOSGraphEdgeOptions *opts, QPCIAddress *addr)
|
||||
{
|
||||
g_assert(addr);
|
||||
g_assert(opts);
|
||||
|
||||
opts->arg = addr;
|
||||
opts->size_arg = sizeof(QPCIAddress);
|
||||
}
|
||||
129
tests/qtest/libqos/pci.h
Normal file
129
tests/qtest/libqos/pci.h
Normal file
|
|
@ -0,0 +1,129 @@
|
|||
/*
|
||||
* libqos PCI bindings
|
||||
*
|
||||
* Copyright IBM, Corp. 2012-2013
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_PCI_H
|
||||
#define LIBQOS_PCI_H
|
||||
|
||||
#include "libqtest.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
#define QPCI_PIO_LIMIT 0x10000
|
||||
|
||||
#define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn))
|
||||
|
||||
typedef struct QPCIDevice QPCIDevice;
|
||||
typedef struct QPCIBus QPCIBus;
|
||||
typedef struct QPCIBar QPCIBar;
|
||||
typedef struct QPCIAddress QPCIAddress;
|
||||
|
||||
struct QPCIBus {
|
||||
uint8_t (*pio_readb)(QPCIBus *bus, uint32_t addr);
|
||||
uint16_t (*pio_readw)(QPCIBus *bus, uint32_t addr);
|
||||
uint32_t (*pio_readl)(QPCIBus *bus, uint32_t addr);
|
||||
uint64_t (*pio_readq)(QPCIBus *bus, uint32_t addr);
|
||||
|
||||
void (*pio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value);
|
||||
void (*pio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value);
|
||||
void (*pio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value);
|
||||
void (*pio_writeq)(QPCIBus *bus, uint32_t addr, uint64_t value);
|
||||
|
||||
void (*memread)(QPCIBus *bus, uint32_t addr, void *buf, size_t len);
|
||||
void (*memwrite)(QPCIBus *bus, uint32_t addr, const void *buf, size_t len);
|
||||
|
||||
uint8_t (*config_readb)(QPCIBus *bus, int devfn, uint8_t offset);
|
||||
uint16_t (*config_readw)(QPCIBus *bus, int devfn, uint8_t offset);
|
||||
uint32_t (*config_readl)(QPCIBus *bus, int devfn, uint8_t offset);
|
||||
|
||||
void (*config_writeb)(QPCIBus *bus, int devfn,
|
||||
uint8_t offset, uint8_t value);
|
||||
void (*config_writew)(QPCIBus *bus, int devfn,
|
||||
uint8_t offset, uint16_t value);
|
||||
void (*config_writel)(QPCIBus *bus, int devfn,
|
||||
uint8_t offset, uint32_t value);
|
||||
|
||||
QTestState *qts;
|
||||
uint16_t pio_alloc_ptr;
|
||||
uint64_t mmio_alloc_ptr, mmio_limit;
|
||||
bool has_buggy_msi; /* TRUE for spapr, FALSE for pci */
|
||||
|
||||
};
|
||||
|
||||
struct QPCIBar {
|
||||
uint64_t addr;
|
||||
};
|
||||
|
||||
struct QPCIDevice
|
||||
{
|
||||
QPCIBus *bus;
|
||||
int devfn;
|
||||
bool msix_enabled;
|
||||
QPCIBar msix_table_bar, msix_pba_bar;
|
||||
uint64_t msix_table_off, msix_pba_off;
|
||||
};
|
||||
|
||||
struct QPCIAddress {
|
||||
uint32_t devfn;
|
||||
uint16_t vendor_id;
|
||||
uint16_t device_id;
|
||||
};
|
||||
|
||||
void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id,
|
||||
void (*func)(QPCIDevice *dev, int devfn, void *data),
|
||||
void *data);
|
||||
QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn);
|
||||
void qpci_device_init(QPCIDevice *dev, QPCIBus *bus, QPCIAddress *addr);
|
||||
|
||||
bool qpci_has_buggy_msi(QPCIDevice *dev);
|
||||
bool qpci_check_buggy_msi(QPCIDevice *dev);
|
||||
|
||||
void qpci_device_enable(QPCIDevice *dev);
|
||||
uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_addr);
|
||||
void qpci_msix_enable(QPCIDevice *dev);
|
||||
void qpci_msix_disable(QPCIDevice *dev);
|
||||
bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry);
|
||||
bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry);
|
||||
uint16_t qpci_msix_table_size(QPCIDevice *dev);
|
||||
|
||||
uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset);
|
||||
uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset);
|
||||
uint32_t qpci_config_readl(QPCIDevice *dev, uint8_t offset);
|
||||
|
||||
void qpci_config_writeb(QPCIDevice *dev, uint8_t offset, uint8_t value);
|
||||
void qpci_config_writew(QPCIDevice *dev, uint8_t offset, uint16_t value);
|
||||
void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value);
|
||||
|
||||
uint8_t qpci_io_readb(QPCIDevice *dev, QPCIBar token, uint64_t off);
|
||||
uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off);
|
||||
uint32_t qpci_io_readl(QPCIDevice *dev, QPCIBar token, uint64_t off);
|
||||
uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token, uint64_t off);
|
||||
|
||||
void qpci_io_writeb(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint8_t value);
|
||||
void qpci_io_writew(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint16_t value);
|
||||
void qpci_io_writel(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint32_t value);
|
||||
void qpci_io_writeq(QPCIDevice *dev, QPCIBar token, uint64_t off,
|
||||
uint64_t value);
|
||||
|
||||
void qpci_memread(QPCIDevice *bus, QPCIBar token, uint64_t off,
|
||||
void *buf, size_t len);
|
||||
void qpci_memwrite(QPCIDevice *bus, QPCIBar token, uint64_t off,
|
||||
const void *buf, size_t len);
|
||||
QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_t *sizeptr);
|
||||
void qpci_iounmap(QPCIDevice *dev, QPCIBar addr);
|
||||
QPCIBar qpci_legacy_iomap(QPCIDevice *dev, uint16_t addr);
|
||||
|
||||
void qpci_unplug_acpi_device_test(QTestState *qs, const char *id, uint8_t slot);
|
||||
|
||||
void add_qpci_address(QOSGraphEdgeOptions *opts, QPCIAddress *addr);
|
||||
#endif
|
||||
112
tests/qtest/libqos/ppc64_pseries-machine.c
Normal file
112
tests/qtest/libqos/ppc64_pseries-machine.c
Normal file
|
|
@ -0,0 +1,112 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "pci-spapr.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/malloc-spapr.h"
|
||||
|
||||
typedef struct QSPAPR_pci_host QSPAPR_pci_host;
|
||||
typedef struct Qppc64_pseriesMachine Qppc64_pseriesMachine;
|
||||
|
||||
struct QSPAPR_pci_host {
|
||||
QOSGraphObject obj;
|
||||
QPCIBusSPAPR pci;
|
||||
};
|
||||
|
||||
struct Qppc64_pseriesMachine {
|
||||
QOSGraphObject obj;
|
||||
QGuestAllocator alloc;
|
||||
QSPAPR_pci_host bridge;
|
||||
};
|
||||
|
||||
/* QSPAPR_pci_host */
|
||||
|
||||
static QOSGraphObject *QSPAPR_host_get_device(void *obj, const char *device)
|
||||
{
|
||||
QSPAPR_pci_host *host = obj;
|
||||
if (!g_strcmp0(device, "pci-bus-spapr")) {
|
||||
return &host->pci.obj;
|
||||
}
|
||||
fprintf(stderr, "%s not present in QSPAPR_pci_host\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void qos_create_QSPAPR_host(QSPAPR_pci_host *host,
|
||||
QTestState *qts,
|
||||
QGuestAllocator *alloc)
|
||||
{
|
||||
host->obj.get_device = QSPAPR_host_get_device;
|
||||
qpci_init_spapr(&host->pci, qts, alloc);
|
||||
}
|
||||
|
||||
/* ppc64/pseries machine */
|
||||
|
||||
static void spapr_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
Qppc64_pseriesMachine *machine = (Qppc64_pseriesMachine *) obj;
|
||||
alloc_destroy(&machine->alloc);
|
||||
}
|
||||
|
||||
static void *spapr_get_driver(void *object, const char *interface)
|
||||
{
|
||||
Qppc64_pseriesMachine *machine = object;
|
||||
if (!g_strcmp0(interface, "memory")) {
|
||||
return &machine->alloc;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in ppc64/pseries\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static QOSGraphObject *spapr_get_device(void *obj, const char *device)
|
||||
{
|
||||
Qppc64_pseriesMachine *machine = obj;
|
||||
if (!g_strcmp0(device, "spapr-pci-host-bridge")) {
|
||||
return &machine->bridge.obj;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in ppc64/pseries\n", device);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *qos_create_machine_spapr(QTestState *qts)
|
||||
{
|
||||
Qppc64_pseriesMachine *machine = g_new0(Qppc64_pseriesMachine, 1);
|
||||
machine->obj.get_device = spapr_get_device;
|
||||
machine->obj.get_driver = spapr_get_driver;
|
||||
machine->obj.destructor = spapr_destructor;
|
||||
spapr_alloc_init(&machine->alloc, qts, ALLOC_NO_FLAGS);
|
||||
|
||||
qos_create_QSPAPR_host(&machine->bridge, qts, &machine->alloc);
|
||||
|
||||
return &machine->obj;
|
||||
}
|
||||
|
||||
static void spapr_machine_register_nodes(void)
|
||||
{
|
||||
qos_node_create_machine("ppc64/pseries", qos_create_machine_spapr);
|
||||
qos_node_create_driver("spapr-pci-host-bridge", NULL);
|
||||
qos_node_contains("ppc64/pseries", "spapr-pci-host-bridge", NULL);
|
||||
qos_node_contains("spapr-pci-host-bridge", "pci-bus-spapr", NULL);
|
||||
}
|
||||
|
||||
libqos_init(spapr_machine_register_nodes);
|
||||
|
||||
759
tests/qtest/libqos/qgraph.c
Normal file
759
tests/qtest/libqos/qgraph.c
Normal file
|
|
@ -0,0 +1,759 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/queue.h"
|
||||
#include "libqos/qgraph_internal.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
#define QGRAPH_PRINT_DEBUG 0
|
||||
#define QOS_ROOT ""
|
||||
typedef struct QOSStackElement QOSStackElement;
|
||||
|
||||
/* Graph Edge.*/
|
||||
struct QOSGraphEdge {
|
||||
QOSEdgeType type;
|
||||
char *dest;
|
||||
void *arg; /* just for QEDGE_CONTAINS
|
||||
* and QEDGE_CONSUMED_BY */
|
||||
char *extra_device_opts; /* added to -device option, "," is
|
||||
* automatically added
|
||||
*/
|
||||
char *before_cmd_line; /* added before node cmd_line */
|
||||
char *after_cmd_line; /* added after -device options */
|
||||
char *edge_name; /* used by QEDGE_CONTAINS */
|
||||
QSLIST_ENTRY(QOSGraphEdge) edge_list;
|
||||
};
|
||||
|
||||
typedef QSLIST_HEAD(, QOSGraphEdge) QOSGraphEdgeList;
|
||||
|
||||
/**
|
||||
* Stack used to keep track of the discovered path when using
|
||||
* the DFS algorithm
|
||||
*/
|
||||
struct QOSStackElement {
|
||||
QOSGraphNode *node;
|
||||
QOSStackElement *parent;
|
||||
QOSGraphEdge *parent_edge;
|
||||
int length;
|
||||
};
|
||||
|
||||
/* Each enty in these hash table will consist of <string, node/edge> pair. */
|
||||
static GHashTable *edge_table;
|
||||
static GHashTable *node_table;
|
||||
|
||||
/* stack used by the DFS algorithm to store the path from machine to test */
|
||||
static QOSStackElement qos_node_stack[QOS_PATH_MAX_ELEMENT_SIZE];
|
||||
static int qos_node_tos;
|
||||
|
||||
/**
|
||||
* add_edge(): creates an edge of type @type
|
||||
* from @source to @dest node, and inserts it in the
|
||||
* edges hash table
|
||||
*
|
||||
* Nodes @source and @dest do not necessarily need to exist.
|
||||
* Possibility to add also options (see #QOSGraphEdgeOptions)
|
||||
* edge->edge_name is used as identifier for get_device relationships,
|
||||
* so by default is equal to @dest.
|
||||
*/
|
||||
static void add_edge(const char *source, const char *dest,
|
||||
QOSEdgeType type, QOSGraphEdgeOptions *opts)
|
||||
{
|
||||
char *key;
|
||||
QOSGraphEdgeList *list = g_hash_table_lookup(edge_table, source);
|
||||
QOSGraphEdgeOptions def_opts = { };
|
||||
|
||||
if (!list) {
|
||||
list = g_new0(QOSGraphEdgeList, 1);
|
||||
key = g_strdup(source);
|
||||
g_hash_table_insert(edge_table, key, list);
|
||||
}
|
||||
|
||||
if (!opts) {
|
||||
opts = &def_opts;
|
||||
}
|
||||
|
||||
QOSGraphEdge *edge = g_new0(QOSGraphEdge, 1);
|
||||
edge->type = type;
|
||||
edge->dest = g_strdup(dest);
|
||||
edge->edge_name = g_strdup(opts->edge_name ?: dest);
|
||||
edge->arg = g_memdup(opts->arg, opts->size_arg);
|
||||
|
||||
edge->before_cmd_line =
|
||||
opts->before_cmd_line ? g_strconcat(" ", opts->before_cmd_line, NULL) : NULL;
|
||||
edge->extra_device_opts =
|
||||
opts->extra_device_opts ? g_strconcat(",", opts->extra_device_opts, NULL) : NULL;
|
||||
edge->after_cmd_line =
|
||||
opts->after_cmd_line ? g_strconcat(" ", opts->after_cmd_line, NULL) : NULL;
|
||||
|
||||
QSLIST_INSERT_HEAD(list, edge, edge_list);
|
||||
}
|
||||
|
||||
/* destroy_edges(): frees all edges inside a given @list */
|
||||
static void destroy_edges(void *list)
|
||||
{
|
||||
QOSGraphEdge *temp;
|
||||
QOSGraphEdgeList *elist = list;
|
||||
|
||||
while (!QSLIST_EMPTY(elist)) {
|
||||
temp = QSLIST_FIRST(elist);
|
||||
QSLIST_REMOVE_HEAD(elist, edge_list);
|
||||
g_free(temp->dest);
|
||||
g_free(temp->before_cmd_line);
|
||||
g_free(temp->after_cmd_line);
|
||||
g_free(temp->extra_device_opts);
|
||||
g_free(temp->edge_name);
|
||||
g_free(temp->arg);
|
||||
g_free(temp);
|
||||
}
|
||||
g_free(elist);
|
||||
}
|
||||
|
||||
/**
|
||||
* create_node(): creates a node @name of type @type
|
||||
* and inserts it to the nodes hash table.
|
||||
* By default, node is not available.
|
||||
*/
|
||||
static QOSGraphNode *create_node(const char *name, QOSNodeType type)
|
||||
{
|
||||
if (g_hash_table_lookup(node_table, name)) {
|
||||
g_printerr("Node %s already created\n", name);
|
||||
abort();
|
||||
}
|
||||
|
||||
QOSGraphNode *node = g_new0(QOSGraphNode, 1);
|
||||
node->type = type;
|
||||
node->available = false;
|
||||
node->name = g_strdup(name);
|
||||
g_hash_table_insert(node_table, node->name, node);
|
||||
return node;
|
||||
}
|
||||
|
||||
/**
|
||||
* destroy_node(): frees a node @val from the nodes hash table.
|
||||
* Note that node->name is not free'd since it will represent the
|
||||
* hash table key
|
||||
*/
|
||||
static void destroy_node(void *val)
|
||||
{
|
||||
QOSGraphNode *node = val;
|
||||
g_free(node->command_line);
|
||||
g_free(node);
|
||||
}
|
||||
|
||||
/**
|
||||
* destroy_string(): frees @key from the nodes hash table.
|
||||
* Actually frees the node->name
|
||||
*/
|
||||
static void destroy_string(void *key)
|
||||
{
|
||||
g_free(key);
|
||||
}
|
||||
|
||||
/**
|
||||
* search_node(): search for a node @key in the nodes hash table
|
||||
* Returns the QOSGraphNode if found, #NULL otherwise
|
||||
*/
|
||||
static QOSGraphNode *search_node(const char *key)
|
||||
{
|
||||
return g_hash_table_lookup(node_table, key);
|
||||
}
|
||||
|
||||
/**
|
||||
* get_edgelist(): returns the edge list (value) assigned to
|
||||
* the @key in the edge hash table.
|
||||
* This list will contain all edges with source equal to @key
|
||||
*
|
||||
* Returns: on success: the %QOSGraphEdgeList
|
||||
* otherwise: abort()
|
||||
*/
|
||||
static QOSGraphEdgeList *get_edgelist(const char *key)
|
||||
{
|
||||
return g_hash_table_lookup(edge_table, key);
|
||||
}
|
||||
|
||||
/**
|
||||
* search_list_edges(): search for an edge with destination @dest
|
||||
* in the given @edgelist.
|
||||
*
|
||||
* Returns: on success: the %QOSGraphEdge
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
static QOSGraphEdge *search_list_edges(QOSGraphEdgeList *edgelist,
|
||||
const char *dest)
|
||||
{
|
||||
QOSGraphEdge *tmp, *next;
|
||||
if (!edgelist) {
|
||||
return NULL;
|
||||
}
|
||||
QSLIST_FOREACH_SAFE(tmp, edgelist, edge_list, next) {
|
||||
if (g_strcmp0(tmp->dest, dest) == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* search_machine(): search for a machine @name in the node hash
|
||||
* table. A machine is the child of the root node.
|
||||
* This function forces the research in the childs of the root,
|
||||
* to check the node is a proper machine
|
||||
*
|
||||
* Returns: on success: the %QOSGraphNode
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
static QOSGraphNode *search_machine(const char *name)
|
||||
{
|
||||
QOSGraphNode *n;
|
||||
QOSGraphEdgeList *root_list = get_edgelist(QOS_ROOT);
|
||||
QOSGraphEdge *e = search_list_edges(root_list, name);
|
||||
if (!e) {
|
||||
return NULL;
|
||||
}
|
||||
n = search_node(e->dest);
|
||||
if (n->type == QNODE_MACHINE) {
|
||||
return n;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* create_interface(): checks if there is already
|
||||
* a node @node in the node hash table, if not
|
||||
* creates a node @node of type #QNODE_INTERFACE
|
||||
* and inserts it. If there is one, check it's
|
||||
* a #QNODE_INTERFACE and abort() if it's not.
|
||||
*/
|
||||
static void create_interface(const char *node)
|
||||
{
|
||||
QOSGraphNode *interface;
|
||||
interface = search_node(node);
|
||||
if (!interface) {
|
||||
create_node(node, QNODE_INTERFACE);
|
||||
} else if (interface->type != QNODE_INTERFACE) {
|
||||
fprintf(stderr, "Error: Node %s is not an interface\n", node);
|
||||
abort();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* build_machine_cmd_line(): builds the command line for the machine
|
||||
* @node. The node name must be a valid qemu identifier, since it
|
||||
* will be used to build the command line.
|
||||
*
|
||||
* It is also possible to pass an optional @args that will be
|
||||
* concatenated to the command line.
|
||||
*
|
||||
* For machines, prepend -M to the machine name. ", @rgs" is added
|
||||
* after the -M <machine> command.
|
||||
*/
|
||||
static void build_machine_cmd_line(QOSGraphNode *node, const char *args)
|
||||
{
|
||||
char *machine = qos_get_machine_type(node->name);
|
||||
if (args) {
|
||||
node->command_line = g_strconcat("-M ", machine, ",", args, NULL);
|
||||
} else {
|
||||
node->command_line = g_strconcat("-M ", machine, " ", NULL);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* build_driver_cmd_line(): builds the command line for the driver
|
||||
* @node. The node name must be a valid qemu identifier, since it
|
||||
* will be used to build the command line.
|
||||
*
|
||||
* Driver do not need additional command line, since it will be
|
||||
* provided by the edge options.
|
||||
*
|
||||
* For drivers, prepend -device to the node name.
|
||||
*/
|
||||
static void build_driver_cmd_line(QOSGraphNode *node)
|
||||
{
|
||||
node->command_line = g_strconcat(" -device ", node->name, NULL);
|
||||
}
|
||||
|
||||
/* qos_print_cb(): callback prints all path found by the DFS algorithm. */
|
||||
static void qos_print_cb(QOSGraphNode *path, int length)
|
||||
{
|
||||
#if QGRAPH_PRINT_DEBUG
|
||||
printf("%d elements\n", length);
|
||||
|
||||
if (!path) {
|
||||
return;
|
||||
}
|
||||
|
||||
while (path->path_edge) {
|
||||
printf("%s ", path->name);
|
||||
switch (path->path_edge->type) {
|
||||
case QEDGE_PRODUCES:
|
||||
printf("--PRODUCES--> ");
|
||||
break;
|
||||
case QEDGE_CONSUMED_BY:
|
||||
printf("--CONSUMED_BY--> ");
|
||||
break;
|
||||
case QEDGE_CONTAINS:
|
||||
printf("--CONTAINS--> ");
|
||||
break;
|
||||
}
|
||||
path = search_node(path->path_edge->dest);
|
||||
}
|
||||
|
||||
printf("%s\n\n", path->name);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* qos_push(): push a node @el and edge @e in the qos_node_stack */
|
||||
static void qos_push(QOSGraphNode *el, QOSStackElement *parent,
|
||||
QOSGraphEdge *e)
|
||||
{
|
||||
int len = 0; /* root is not counted */
|
||||
if (qos_node_tos == QOS_PATH_MAX_ELEMENT_SIZE) {
|
||||
g_printerr("QOSStack: full stack, cannot push");
|
||||
abort();
|
||||
}
|
||||
|
||||
if (parent) {
|
||||
len = parent->length + 1;
|
||||
}
|
||||
qos_node_stack[qos_node_tos++] = (QOSStackElement) {
|
||||
.node = el,
|
||||
.parent = parent,
|
||||
.parent_edge = e,
|
||||
.length = len,
|
||||
};
|
||||
}
|
||||
|
||||
/* qos_tos(): returns the top of stack, without popping */
|
||||
static QOSStackElement *qos_tos(void)
|
||||
{
|
||||
return &qos_node_stack[qos_node_tos - 1];
|
||||
}
|
||||
|
||||
/* qos_pop(): pops an element from the tos, setting it unvisited*/
|
||||
static QOSStackElement *qos_pop(void)
|
||||
{
|
||||
if (qos_node_tos == 0) {
|
||||
g_printerr("QOSStack: empty stack, cannot pop");
|
||||
abort();
|
||||
}
|
||||
QOSStackElement *e = qos_tos();
|
||||
e->node->visited = false;
|
||||
qos_node_tos--;
|
||||
return e;
|
||||
}
|
||||
|
||||
/**
|
||||
* qos_reverse_path(): reverses the found path, going from
|
||||
* test-to-machine to machine-to-test
|
||||
*/
|
||||
static QOSGraphNode *qos_reverse_path(QOSStackElement *el)
|
||||
{
|
||||
if (!el) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
el->node->path_edge = NULL;
|
||||
|
||||
while (el->parent) {
|
||||
el->parent->node->path_edge = el->parent_edge;
|
||||
el = el->parent;
|
||||
}
|
||||
|
||||
return el->node;
|
||||
}
|
||||
|
||||
/**
|
||||
* qos_traverse_graph(): graph-walking algorithm, using Depth First Search it
|
||||
* starts from the root @machine and walks all possible path until it
|
||||
* reaches a test node.
|
||||
* At that point, it reverses the path found and invokes the @callback.
|
||||
*
|
||||
* Being Depth First Search, time complexity is O(|V| + |E|), while
|
||||
* space is O(|V|). In this case, the maximum stack size is set by
|
||||
* QOS_PATH_MAX_ELEMENT_SIZE.
|
||||
*/
|
||||
static void qos_traverse_graph(QOSGraphNode *root, QOSTestCallback callback)
|
||||
{
|
||||
QOSGraphNode *v, *dest_node, *path;
|
||||
QOSStackElement *s_el;
|
||||
QOSGraphEdge *e, *next;
|
||||
QOSGraphEdgeList *list;
|
||||
|
||||
qos_push(root, NULL, NULL);
|
||||
|
||||
while (qos_node_tos > 0) {
|
||||
s_el = qos_tos();
|
||||
v = s_el->node;
|
||||
if (v->visited) {
|
||||
qos_pop();
|
||||
continue;
|
||||
}
|
||||
v->visited = true;
|
||||
list = get_edgelist(v->name);
|
||||
if (!list) {
|
||||
qos_pop();
|
||||
if (v->type == QNODE_TEST) {
|
||||
v->visited = false;
|
||||
path = qos_reverse_path(s_el);
|
||||
callback(path, s_el->length);
|
||||
}
|
||||
} else {
|
||||
QSLIST_FOREACH_SAFE(e, list, edge_list, next) {
|
||||
dest_node = search_node(e->dest);
|
||||
|
||||
if (!dest_node) {
|
||||
fprintf(stderr, "node %s in %s -> %s does not exist\n",
|
||||
e->dest, v->name, e->dest);
|
||||
abort();
|
||||
}
|
||||
|
||||
if (!dest_node->visited && dest_node->available) {
|
||||
qos_push(dest_node, s_el, e);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* QGRAPH API*/
|
||||
|
||||
QOSGraphNode *qos_graph_get_node(const char *key)
|
||||
{
|
||||
return search_node(key);
|
||||
}
|
||||
|
||||
bool qos_graph_has_node(const char *node)
|
||||
{
|
||||
QOSGraphNode *n = search_node(node);
|
||||
return n != NULL;
|
||||
}
|
||||
|
||||
QOSNodeType qos_graph_get_node_type(const char *node)
|
||||
{
|
||||
QOSGraphNode *n = search_node(node);
|
||||
if (n) {
|
||||
return n->type;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
bool qos_graph_get_node_availability(const char *node)
|
||||
{
|
||||
QOSGraphNode *n = search_node(node);
|
||||
if (n) {
|
||||
return n->available;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
QOSGraphEdge *qos_graph_get_edge(const char *node, const char *dest)
|
||||
{
|
||||
QOSGraphEdgeList *list = get_edgelist(node);
|
||||
return search_list_edges(list, dest);
|
||||
}
|
||||
|
||||
QOSEdgeType qos_graph_edge_get_type(QOSGraphEdge *edge)
|
||||
{
|
||||
if (!edge) {
|
||||
return -1;
|
||||
}
|
||||
return edge->type;;
|
||||
}
|
||||
|
||||
char *qos_graph_edge_get_dest(QOSGraphEdge *edge)
|
||||
{
|
||||
if (!edge) {
|
||||
return NULL;
|
||||
}
|
||||
return edge->dest;
|
||||
}
|
||||
|
||||
void *qos_graph_edge_get_arg(QOSGraphEdge *edge)
|
||||
{
|
||||
if (!edge) {
|
||||
return NULL;
|
||||
}
|
||||
return edge->arg;
|
||||
}
|
||||
|
||||
char *qos_graph_edge_get_after_cmd_line(QOSGraphEdge *edge)
|
||||
{
|
||||
if (!edge) {
|
||||
return NULL;
|
||||
}
|
||||
return edge->after_cmd_line;
|
||||
}
|
||||
|
||||
char *qos_graph_edge_get_before_cmd_line(QOSGraphEdge *edge)
|
||||
{
|
||||
if (!edge) {
|
||||
return NULL;
|
||||
}
|
||||
return edge->before_cmd_line;
|
||||
}
|
||||
|
||||
char *qos_graph_edge_get_extra_device_opts(QOSGraphEdge *edge)
|
||||
{
|
||||
if (!edge) {
|
||||
return NULL;
|
||||
}
|
||||
return edge->extra_device_opts;
|
||||
}
|
||||
|
||||
char *qos_graph_edge_get_name(QOSGraphEdge *edge)
|
||||
{
|
||||
if (!edge) {
|
||||
return NULL;
|
||||
}
|
||||
return edge->edge_name;
|
||||
}
|
||||
|
||||
bool qos_graph_has_edge(const char *start, const char *dest)
|
||||
{
|
||||
QOSGraphEdgeList *list = get_edgelist(start);
|
||||
QOSGraphEdge *e = search_list_edges(list, dest);
|
||||
return e != NULL;
|
||||
}
|
||||
|
||||
QOSGraphNode *qos_graph_get_machine(const char *node)
|
||||
{
|
||||
return search_machine(node);
|
||||
}
|
||||
|
||||
bool qos_graph_has_machine(const char *node)
|
||||
{
|
||||
QOSGraphNode *m = search_machine(node);
|
||||
return m != NULL;
|
||||
}
|
||||
|
||||
void qos_print_graph(void)
|
||||
{
|
||||
qos_graph_foreach_test_path(qos_print_cb);
|
||||
}
|
||||
|
||||
void qos_graph_init(void)
|
||||
{
|
||||
if (!node_table) {
|
||||
node_table = g_hash_table_new_full(g_str_hash, g_str_equal,
|
||||
destroy_string, destroy_node);
|
||||
create_node(QOS_ROOT, QNODE_DRIVER);
|
||||
}
|
||||
|
||||
if (!edge_table) {
|
||||
edge_table = g_hash_table_new_full(g_str_hash, g_str_equal,
|
||||
destroy_string, destroy_edges);
|
||||
}
|
||||
}
|
||||
|
||||
void qos_graph_destroy(void)
|
||||
{
|
||||
if (node_table) {
|
||||
g_hash_table_destroy(node_table);
|
||||
}
|
||||
|
||||
if (edge_table) {
|
||||
g_hash_table_destroy(edge_table);
|
||||
}
|
||||
|
||||
node_table = NULL;
|
||||
edge_table = NULL;
|
||||
}
|
||||
|
||||
void qos_node_destroy(void *key)
|
||||
{
|
||||
g_hash_table_remove(node_table, key);
|
||||
}
|
||||
|
||||
void qos_edge_destroy(void *key)
|
||||
{
|
||||
g_hash_table_remove(edge_table, key);
|
||||
}
|
||||
|
||||
void qos_add_test(const char *name, const char *interface,
|
||||
QOSTestFunc test_func, QOSGraphTestOptions *opts)
|
||||
{
|
||||
QOSGraphNode *node;
|
||||
char *test_name = g_strdup_printf("%s-tests/%s", interface, name);;
|
||||
QOSGraphTestOptions def_opts = { };
|
||||
|
||||
if (!opts) {
|
||||
opts = &def_opts;
|
||||
}
|
||||
node = create_node(test_name, QNODE_TEST);
|
||||
node->u.test.function = test_func;
|
||||
node->u.test.arg = opts->arg;
|
||||
assert(!opts->edge.arg);
|
||||
assert(!opts->edge.size_arg);
|
||||
|
||||
node->u.test.before = opts->before;
|
||||
node->u.test.subprocess = opts->subprocess;
|
||||
node->available = true;
|
||||
add_edge(interface, test_name, QEDGE_CONSUMED_BY, &opts->edge);
|
||||
g_free(test_name);
|
||||
}
|
||||
|
||||
void qos_node_create_machine(const char *name, QOSCreateMachineFunc function)
|
||||
{
|
||||
qos_node_create_machine_args(name, function, NULL);
|
||||
}
|
||||
|
||||
void qos_node_create_machine_args(const char *name,
|
||||
QOSCreateMachineFunc function,
|
||||
const char *opts)
|
||||
{
|
||||
QOSGraphNode *node = create_node(name, QNODE_MACHINE);
|
||||
build_machine_cmd_line(node, opts);
|
||||
node->u.machine.constructor = function;
|
||||
add_edge(QOS_ROOT, name, QEDGE_CONTAINS, NULL);
|
||||
}
|
||||
|
||||
void qos_node_create_driver(const char *name, QOSCreateDriverFunc function)
|
||||
{
|
||||
QOSGraphNode *node = create_node(name, QNODE_DRIVER);
|
||||
build_driver_cmd_line(node);
|
||||
node->u.driver.constructor = function;
|
||||
}
|
||||
|
||||
void qos_node_contains(const char *container, const char *contained,
|
||||
QOSGraphEdgeOptions *opts, ...)
|
||||
{
|
||||
va_list va;
|
||||
|
||||
if (opts == NULL) {
|
||||
add_edge(container, contained, QEDGE_CONTAINS, NULL);
|
||||
return;
|
||||
}
|
||||
|
||||
va_start(va, opts);
|
||||
do {
|
||||
add_edge(container, contained, QEDGE_CONTAINS, opts);
|
||||
opts = va_arg(va, QOSGraphEdgeOptions *);
|
||||
} while (opts != NULL);
|
||||
|
||||
va_end(va);
|
||||
}
|
||||
|
||||
void qos_node_produces(const char *producer, const char *interface)
|
||||
{
|
||||
create_interface(interface);
|
||||
add_edge(producer, interface, QEDGE_PRODUCES, NULL);
|
||||
}
|
||||
|
||||
void qos_node_consumes(const char *consumer, const char *interface,
|
||||
QOSGraphEdgeOptions *opts)
|
||||
{
|
||||
create_interface(interface);
|
||||
add_edge(interface, consumer, QEDGE_CONSUMED_BY, opts);
|
||||
}
|
||||
|
||||
void qos_graph_node_set_availability(const char *node, bool av)
|
||||
{
|
||||
QOSGraphEdgeList *elist;
|
||||
QOSGraphNode *n = search_node(node);
|
||||
QOSGraphEdge *e, *next;
|
||||
if (!n) {
|
||||
return;
|
||||
}
|
||||
n->available = av;
|
||||
elist = get_edgelist(node);
|
||||
if (!elist) {
|
||||
return;
|
||||
}
|
||||
QSLIST_FOREACH_SAFE(e, elist, edge_list, next) {
|
||||
if (e->type == QEDGE_CONTAINS || e->type == QEDGE_PRODUCES) {
|
||||
qos_graph_node_set_availability(e->dest, av);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void qos_graph_foreach_test_path(QOSTestCallback fn)
|
||||
{
|
||||
QOSGraphNode *root = qos_graph_get_node(QOS_ROOT);
|
||||
qos_traverse_graph(root, fn);
|
||||
}
|
||||
|
||||
QOSGraphObject *qos_machine_new(QOSGraphNode *node, QTestState *qts)
|
||||
{
|
||||
QOSGraphObject *obj;
|
||||
|
||||
g_assert(node->type == QNODE_MACHINE);
|
||||
obj = node->u.machine.constructor(qts);
|
||||
obj->free = g_free;
|
||||
return obj;
|
||||
}
|
||||
|
||||
QOSGraphObject *qos_driver_new(QOSGraphNode *node, QOSGraphObject *parent,
|
||||
QGuestAllocator *alloc, void *arg)
|
||||
{
|
||||
QOSGraphObject *obj;
|
||||
|
||||
g_assert(node->type == QNODE_DRIVER);
|
||||
obj = node->u.driver.constructor(parent, alloc, arg);
|
||||
obj->free = g_free;
|
||||
return obj;
|
||||
}
|
||||
|
||||
void qos_object_destroy(QOSGraphObject *obj)
|
||||
{
|
||||
if (!obj) {
|
||||
return;
|
||||
}
|
||||
if (obj->destructor) {
|
||||
obj->destructor(obj);
|
||||
}
|
||||
if (obj->free) {
|
||||
obj->free(obj);
|
||||
}
|
||||
}
|
||||
|
||||
void qos_object_queue_destroy(QOSGraphObject *obj)
|
||||
{
|
||||
g_test_queue_destroy((GDestroyNotify) qos_object_destroy, obj);
|
||||
}
|
||||
|
||||
void qos_object_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
if (obj->start_hw) {
|
||||
obj->start_hw(obj);
|
||||
}
|
||||
}
|
||||
|
||||
char *qos_get_machine_type(char *name)
|
||||
{
|
||||
while (*name != '\0' && *name != '/') {
|
||||
name++;
|
||||
}
|
||||
|
||||
if (!*name || !name[1]) {
|
||||
fprintf(stderr, "Machine name has to be of the form <arch>/<machine>\n");
|
||||
abort();
|
||||
}
|
||||
|
||||
return name + 1;
|
||||
}
|
||||
|
||||
void qos_delete_cmd_line(const char *name)
|
||||
{
|
||||
QOSGraphNode *node = search_node(name);
|
||||
if (node) {
|
||||
g_free(node->command_line);
|
||||
node->command_line = NULL;
|
||||
}
|
||||
}
|
||||
574
tests/qtest/libqos/qgraph.h
Normal file
574
tests/qtest/libqos/qgraph.h
Normal file
|
|
@ -0,0 +1,574 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef QGRAPH_H
|
||||
#define QGRAPH_H
|
||||
|
||||
#include <gmodule.h>
|
||||
#include "qemu/module.h"
|
||||
#include "malloc.h"
|
||||
|
||||
/* maximum path length */
|
||||
#define QOS_PATH_MAX_ELEMENT_SIZE 50
|
||||
|
||||
typedef struct QOSGraphObject QOSGraphObject;
|
||||
typedef struct QOSGraphNode QOSGraphNode;
|
||||
typedef struct QOSGraphEdge QOSGraphEdge;
|
||||
typedef struct QOSGraphNodeOptions QOSGraphNodeOptions;
|
||||
typedef struct QOSGraphEdgeOptions QOSGraphEdgeOptions;
|
||||
typedef struct QOSGraphTestOptions QOSGraphTestOptions;
|
||||
|
||||
/* Constructor for drivers, machines and test */
|
||||
typedef void *(*QOSCreateDriverFunc) (void *parent, QGuestAllocator *alloc,
|
||||
void *addr);
|
||||
typedef void *(*QOSCreateMachineFunc) (QTestState *qts);
|
||||
typedef void (*QOSTestFunc) (void *parent, void *arg, QGuestAllocator *alloc);
|
||||
|
||||
/* QOSGraphObject functions */
|
||||
typedef void *(*QOSGetDriver) (void *object, const char *interface);
|
||||
typedef QOSGraphObject *(*QOSGetDevice) (void *object, const char *name);
|
||||
typedef void (*QOSDestructorFunc) (QOSGraphObject *object);
|
||||
typedef void (*QOSStartFunct) (QOSGraphObject *object);
|
||||
|
||||
/* Test options functions */
|
||||
typedef void *(*QOSBeforeTest) (GString *cmd_line, void *arg);
|
||||
|
||||
/**
|
||||
* SECTION: qgraph.h
|
||||
* @title: Qtest Driver Framework
|
||||
* @short_description: interfaces to organize drivers and tests
|
||||
* as nodes in a graph
|
||||
*
|
||||
* This Qgraph API provides all basic functions to create a graph
|
||||
* and instantiate nodes representing machines, drivers and tests
|
||||
* representing their relations with CONSUMES, PRODUCES, and CONTAINS
|
||||
* edges.
|
||||
*
|
||||
* The idea is to have a framework where each test asks for a specific
|
||||
* driver, and the framework takes care of allocating the proper devices
|
||||
* required and passing the correct command line arguments to QEMU.
|
||||
*
|
||||
* A node can be of four types:
|
||||
* - QNODE_MACHINE: for example "arm/raspi2"
|
||||
* - QNODE_DRIVER: for example "generic-sdhci"
|
||||
* - QNODE_INTERFACE: for example "sdhci" (interface for all "-sdhci" drivers)
|
||||
* an interface is not explicitly created, it will be auto-
|
||||
* matically instantiated when a node consumes or produces
|
||||
* it.
|
||||
* - QNODE_TEST: for example "sdhci-test", consumes an interface and tests
|
||||
* the functions provided
|
||||
*
|
||||
* Notes for the nodes:
|
||||
* - QNODE_MACHINE: each machine struct must have a QGuestAllocator and
|
||||
* implement get_driver to return the allocator passing
|
||||
* "memory". The function can also return NULL if the
|
||||
* allocator is not set.
|
||||
* - QNODE_DRIVER: driver names must be unique, and machines and nodes
|
||||
* planned to be "consumed" by other nodes must match QEMU
|
||||
* drivers name, otherwise they won't be discovered
|
||||
*
|
||||
* An edge relation between two nodes (drivers or machines) X and Y can be:
|
||||
* - X CONSUMES Y: Y can be plugged into X
|
||||
* - X PRODUCES Y: X provides the interface Y
|
||||
* - X CONTAINS Y: Y is part of X component
|
||||
*
|
||||
* Basic framework steps are the following:
|
||||
* - All nodes and edges are created in their respective
|
||||
* machine/driver/test files
|
||||
* - The framework starts QEMU and asks for a list of available devices
|
||||
* and machines (note that only machines and "consumed" nodes are mapped
|
||||
* 1:1 with QEMU devices)
|
||||
* - The framework walks the graph starting from the available machines and
|
||||
* performs a Depth First Search for tests
|
||||
* - Once a test is found, the path is walked again and all drivers are
|
||||
* allocated accordingly and the final interface is passed to the test
|
||||
* - The test is executed
|
||||
* - Unused objects are cleaned and the path discovery is continued
|
||||
*
|
||||
* Depending on the QEMU binary used, only some drivers/machines will be
|
||||
* available and only test that are reached by them will be executed.
|
||||
*
|
||||
* <example>
|
||||
* <title>Creating new driver an its interface</title>
|
||||
* <programlisting>
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
struct My_driver {
|
||||
QOSGraphObject obj;
|
||||
Node_produced prod;
|
||||
Node_contained cont;
|
||||
}
|
||||
|
||||
static void my_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
g_free(obj);
|
||||
}
|
||||
|
||||
static void my_get_driver(void *object, const char *interface) {
|
||||
My_driver *dev = object;
|
||||
if (!g_strcmp0(interface, "my_interface")) {
|
||||
return &dev->prod;
|
||||
}
|
||||
abort();
|
||||
}
|
||||
|
||||
static void my_get_device(void *object, const char *device) {
|
||||
My_driver *dev = object;
|
||||
if (!g_strcmp0(device, "my_driver_contained")) {
|
||||
return &dev->cont;
|
||||
}
|
||||
abort();
|
||||
}
|
||||
|
||||
static void *my_driver_constructor(void *node_consumed,
|
||||
QOSGraphObject *alloc)
|
||||
{
|
||||
My_driver dev = g_new(My_driver, 1);
|
||||
// get the node pointed by the produce edge
|
||||
dev->obj.get_driver = my_get_driver;
|
||||
// get the node pointed by the contains
|
||||
dev->obj.get_device = my_get_device;
|
||||
// free the object
|
||||
dev->obj.destructor = my_destructor;
|
||||
do_something_with_node_consumed(node_consumed);
|
||||
// set all fields of contained device
|
||||
init_contained_device(&dev->cont);
|
||||
return &dev->obj;
|
||||
}
|
||||
|
||||
static void register_my_driver(void)
|
||||
{
|
||||
qos_node_create_driver("my_driver", my_driver_constructor);
|
||||
// contained drivers don't need a constructor,
|
||||
// they will be init by the parent.
|
||||
qos_node_create_driver("my_driver_contained", NULL);
|
||||
|
||||
// For the sake of this example, assume machine x86_64/pc contains
|
||||
// "other_node".
|
||||
// This relation, along with the machine and "other_node" creation,
|
||||
// should be defined in the x86_64_pc-machine.c file.
|
||||
// "my_driver" will then consume "other_node"
|
||||
qos_node_contains("my_driver", "my_driver_contained");
|
||||
qos_node_produces("my_driver", "my_interface");
|
||||
qos_node_consumes("my_driver", "other_node");
|
||||
}
|
||||
* </programlisting>
|
||||
* </example>
|
||||
*
|
||||
* In the above example, all possible types of relations are created:
|
||||
* node "my_driver" consumes, contains and produces other nodes.
|
||||
* more specifically:
|
||||
* x86_64/pc -->contains--> other_node <--consumes-- my_driver
|
||||
* |
|
||||
* my_driver_contained <--contains--+
|
||||
* |
|
||||
* my_interface <--produces--+
|
||||
*
|
||||
* or inverting the consumes edge in consumed_by:
|
||||
*
|
||||
* x86_64/pc -->contains--> other_node --consumed_by--> my_driver
|
||||
* |
|
||||
* my_driver_contained <--contains--+
|
||||
* |
|
||||
* my_interface <--produces--+
|
||||
*
|
||||
* <example>
|
||||
* <title>Creating new test</title>
|
||||
* <programlisting>
|
||||
* #include "libqos/qgraph.h"
|
||||
*
|
||||
* static void my_test_function(void *obj, void *data)
|
||||
* {
|
||||
* Node_produced *interface_to_test = obj;
|
||||
* // test interface_to_test
|
||||
* }
|
||||
*
|
||||
* static void register_my_test(void)
|
||||
* {
|
||||
* qos_add_test("my_interface", "my_test", my_test_function);
|
||||
* }
|
||||
*
|
||||
* libqos_init(register_my_test);
|
||||
*
|
||||
* </programlisting>
|
||||
* </example>
|
||||
*
|
||||
* Here a new test is created, consuming "my_interface" node
|
||||
* and creating a valid path from a machine to a test.
|
||||
* Final graph will be like this:
|
||||
* x86_64/pc -->contains--> other_node <--consumes-- my_driver
|
||||
* |
|
||||
* my_driver_contained <--contains--+
|
||||
* |
|
||||
* my_test --consumes--> my_interface <--produces--+
|
||||
*
|
||||
* or inverting the consumes edge in consumed_by:
|
||||
*
|
||||
* x86_64/pc -->contains--> other_node --consumed_by--> my_driver
|
||||
* |
|
||||
* my_driver_contained <--contains--+
|
||||
* |
|
||||
* my_test <--consumed_by-- my_interface <--produces--+
|
||||
*
|
||||
* Assuming there the binary is
|
||||
* QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64
|
||||
* a valid test path will be:
|
||||
* "/x86_64/pc/other_node/my_driver/my_interface/my_test".
|
||||
*
|
||||
* Additional examples are also in libqos/test-qgraph.c
|
||||
*
|
||||
* Command line:
|
||||
* Command line is built by using node names and optional arguments
|
||||
* passed by the user when building the edges.
|
||||
*
|
||||
* There are three types of command line arguments:
|
||||
* - in node : created from the node name. For example, machines will
|
||||
* have "-M <machine>" to its command line, while devices
|
||||
* "-device <device>". It is automatically done by the
|
||||
* framework.
|
||||
* - after node : added as additional argument to the node name.
|
||||
* This argument is added optionally when creating edges,
|
||||
* by setting the parameter @after_cmd_line and
|
||||
* @extra_edge_opts in #QOSGraphEdgeOptions.
|
||||
* The framework automatically adds
|
||||
* a comma before @extra_edge_opts,
|
||||
* because it is going to add attributes
|
||||
* after the destination node pointed by
|
||||
* the edge containing these options, and automatically
|
||||
* adds a space before @after_cmd_line, because it
|
||||
* adds an additional device, not an attribute.
|
||||
* - before node : added as additional argument to the node name.
|
||||
* This argument is added optionally when creating edges,
|
||||
* by setting the parameter @before_cmd_line in
|
||||
* #QOSGraphEdgeOptions. This attribute
|
||||
* is going to add attributes before the destination node
|
||||
* pointed by the edge containing these options. It is
|
||||
* helpful to commands that are not node-representable,
|
||||
* such as "-fdsev" or "-netdev".
|
||||
*
|
||||
* While adding command line in edges is always used, not all nodes names are
|
||||
* used in every path walk: this is because the contained or produced ones
|
||||
* are already added by QEMU, so only nodes that "consumes" will be used to
|
||||
* build the command line. Also, nodes that will have { "abstract" : true }
|
||||
* as QMP attribute will loose their command line, since they are not proper
|
||||
* devices to be added in QEMU.
|
||||
*
|
||||
* Example:
|
||||
*
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.arg = NULL,
|
||||
.size_arg = 0,
|
||||
.after_cmd_line = "-device other",
|
||||
.before_cmd_line = "-netdev something",
|
||||
.extra_edge_opts = "addr=04.0",
|
||||
};
|
||||
QOSGraphNode * node = qos_node_create_driver("my_node", constructor);
|
||||
qos_node_consumes_args("my_node", "interface", &opts);
|
||||
*
|
||||
* Will produce the following command line:
|
||||
* "-netdev something -device my_node,addr=04.0 -device other"
|
||||
*/
|
||||
|
||||
/**
|
||||
* Edge options to be passed to the contains/consumes *_args function.
|
||||
*/
|
||||
struct QOSGraphEdgeOptions {
|
||||
void *arg; /*
|
||||
* optional arg that will be used by
|
||||
* dest edge
|
||||
*/
|
||||
uint32_t size_arg; /*
|
||||
* optional arg size that will be used by
|
||||
* dest edge
|
||||
*/
|
||||
const char *extra_device_opts;/*
|
||||
*optional additional command line for dest
|
||||
* edge, used to add additional attributes
|
||||
* *after* the node command line, the
|
||||
* framework automatically prepends ","
|
||||
* to this argument.
|
||||
*/
|
||||
const char *before_cmd_line; /*
|
||||
* optional additional command line for dest
|
||||
* edge, used to add additional attributes
|
||||
* *before* the node command line, usually
|
||||
* other non-node represented commands,
|
||||
* like "-fdsev synt"
|
||||
*/
|
||||
const char *after_cmd_line; /*
|
||||
* optional extra command line to be added
|
||||
* after the device command. This option
|
||||
* is used to add other devices
|
||||
* command line that depend on current node.
|
||||
* Automatically prepends " " to this
|
||||
* argument
|
||||
*/
|
||||
const char *edge_name; /*
|
||||
* optional edge to differentiate multiple
|
||||
* devices with same node name
|
||||
*/
|
||||
};
|
||||
|
||||
/**
|
||||
* Test options to be passed to the test functions.
|
||||
*/
|
||||
struct QOSGraphTestOptions {
|
||||
QOSGraphEdgeOptions edge; /* edge arguments that will be used by test.
|
||||
* Note that test *does not* use edge_name,
|
||||
* and uses instead arg and size_arg as
|
||||
* data arg for its test function.
|
||||
*/
|
||||
void *arg; /* passed to the .before function, or to the
|
||||
* test function if there is no .before
|
||||
* function
|
||||
*/
|
||||
QOSBeforeTest before; /* executed before the test. Can add
|
||||
* additional parameters to the command line
|
||||
* and modify the argument to the test function.
|
||||
*/
|
||||
bool subprocess; /* run the test in a subprocess */
|
||||
};
|
||||
|
||||
/**
|
||||
* Each driver, test or machine of this framework will have a
|
||||
* QOSGraphObject as first field.
|
||||
*
|
||||
* This set of functions offered by QOSGraphObject are executed
|
||||
* in different stages of the framework:
|
||||
* - get_driver / get_device : Once a machine-to-test path has been
|
||||
* found, the framework traverses it again and allocates all the
|
||||
* nodes, using the provided constructor. To satisfy their relations,
|
||||
* i.e. for produces or contains, where a struct constructor needs
|
||||
* an external parameter represented by the previous node,
|
||||
* the framework will call get_device (for contains) or
|
||||
* get_driver (for produces), depending on the edge type, passing
|
||||
* them the name of the next node to be taken and getting from them
|
||||
* the corresponding pointer to the actual structure of the next node to
|
||||
* be used in the path.
|
||||
*
|
||||
* - start_hw: This function is executed after all the path objects
|
||||
* have been allocated, but before the test is run. It starts the hw, setting
|
||||
* the initial configurations (*_device_enable) and making it ready for the
|
||||
* test.
|
||||
*
|
||||
* - destructor: Opposite to the node constructor, destroys the object.
|
||||
* This function is called after the test has been executed, and performs
|
||||
* a complete cleanup of each node allocated field. In case no constructor
|
||||
* is provided, no destructor will be called.
|
||||
*
|
||||
*/
|
||||
struct QOSGraphObject {
|
||||
/* for produces edges, returns void * */
|
||||
QOSGetDriver get_driver;
|
||||
/* for contains edges, returns a QOSGraphObject * */
|
||||
QOSGetDevice get_device;
|
||||
/* start the hw, get ready for the test */
|
||||
QOSStartFunct start_hw;
|
||||
/* destroy this QOSGraphObject */
|
||||
QOSDestructorFunc destructor;
|
||||
/* free the memory associated to the QOSGraphObject and its contained
|
||||
* children */
|
||||
GDestroyNotify free;
|
||||
};
|
||||
|
||||
/**
|
||||
* qos_graph_init(): initialize the framework, creates two hash
|
||||
* tables: one for the nodes and another for the edges.
|
||||
*/
|
||||
void qos_graph_init(void);
|
||||
|
||||
/**
|
||||
* qos_graph_destroy(): deallocates all the hash tables,
|
||||
* freeing all nodes and edges.
|
||||
*/
|
||||
void qos_graph_destroy(void);
|
||||
|
||||
/**
|
||||
* qos_node_destroy(): removes and frees a node from the,
|
||||
* nodes hash table.
|
||||
*/
|
||||
void qos_node_destroy(void *key);
|
||||
|
||||
/**
|
||||
* qos_edge_destroy(): removes and frees an edge from the,
|
||||
* edges hash table.
|
||||
*/
|
||||
void qos_edge_destroy(void *key);
|
||||
|
||||
/**
|
||||
* qos_add_test(): adds a test node @name to the nodes hash table.
|
||||
*
|
||||
* The test will consume a @interface node, and once the
|
||||
* graph walking algorithm has found it, the @test_func will be
|
||||
* executed. It also has the possibility to
|
||||
* add an optional @opts (see %QOSGraphNodeOptions).
|
||||
*
|
||||
* For tests, opts->edge.arg and size_arg represent the arg to pass
|
||||
* to @test_func
|
||||
*/
|
||||
void qos_add_test(const char *name, const char *interface,
|
||||
QOSTestFunc test_func,
|
||||
QOSGraphTestOptions *opts);
|
||||
|
||||
/**
|
||||
* qos_node_create_machine(): creates the machine @name and
|
||||
* adds it to the node hash table.
|
||||
*
|
||||
* This node will be of type QNODE_MACHINE and have @function
|
||||
* as constructor
|
||||
*/
|
||||
void qos_node_create_machine(const char *name, QOSCreateMachineFunc function);
|
||||
|
||||
/**
|
||||
* qos_node_create_machine_args(): same as qos_node_create_machine,
|
||||
* but with the possibility to add an optional ", @opts" after -M machine
|
||||
* command line.
|
||||
*/
|
||||
void qos_node_create_machine_args(const char *name,
|
||||
QOSCreateMachineFunc function,
|
||||
const char *opts);
|
||||
|
||||
/**
|
||||
* qos_node_create_driver(): creates the driver @name and
|
||||
* adds it to the node hash table.
|
||||
*
|
||||
* This node will be of type QNODE_DRIVER and have @function
|
||||
* as constructor
|
||||
*/
|
||||
void qos_node_create_driver(const char *name, QOSCreateDriverFunc function);
|
||||
|
||||
/**
|
||||
* qos_node_contains(): creates one or more edges of type QEDGE_CONTAINS
|
||||
* and adds them to the edge list mapped to @container in the
|
||||
* edge hash table.
|
||||
*
|
||||
* The edges will have @container as source and @contained as destination.
|
||||
*
|
||||
* If @opts is NULL, a single edge will be added with no options.
|
||||
* If @opts is non-NULL, the arguments after @contained represent a
|
||||
* NULL-terminated list of %QOSGraphEdgeOptions structs, and an
|
||||
* edge will be added for each of them.
|
||||
*
|
||||
* This function can be useful when there are multiple devices
|
||||
* with the same node name contained in a machine/other node
|
||||
*
|
||||
* For example, if "arm/raspi2" contains 2 "generic-sdhci"
|
||||
* devices, the right commands will be:
|
||||
* qos_node_create_machine("arm/raspi2");
|
||||
* qos_node_create_driver("generic-sdhci", constructor);
|
||||
* //assume rest of the fields are set NULL
|
||||
* QOSGraphEdgeOptions op1 = { .edge_name = "emmc" };
|
||||
* QOSGraphEdgeOptions op2 = { .edge_name = "sdcard" };
|
||||
* qos_node_contains("arm/raspi2", "generic-sdhci", &op1, &op2, NULL);
|
||||
*
|
||||
* Of course this also requires that the @container's get_device function
|
||||
* should implement a case for "emmc" and "sdcard".
|
||||
*
|
||||
* For contains, op1.arg and op1.size_arg represent the arg to pass
|
||||
* to @contained constructor to properly initialize it.
|
||||
*/
|
||||
void qos_node_contains(const char *container, const char *contained,
|
||||
QOSGraphEdgeOptions *opts, ...);
|
||||
|
||||
/**
|
||||
* qos_node_produces(): creates an edge of type QEDGE_PRODUCES and
|
||||
* adds it to the edge list mapped to @producer in the
|
||||
* edge hash table.
|
||||
*
|
||||
* This edge will have @producer as source and @interface as destination.
|
||||
*/
|
||||
void qos_node_produces(const char *producer, const char *interface);
|
||||
|
||||
/**
|
||||
* qos_node_consumes(): creates an edge of type QEDGE_CONSUMED_BY and
|
||||
* adds it to the edge list mapped to @interface in the
|
||||
* edge hash table.
|
||||
*
|
||||
* This edge will have @interface as source and @consumer as destination.
|
||||
* It also has the possibility to add an optional @opts
|
||||
* (see %QOSGraphEdgeOptions)
|
||||
*/
|
||||
void qos_node_consumes(const char *consumer, const char *interface,
|
||||
QOSGraphEdgeOptions *opts);
|
||||
|
||||
/**
|
||||
* qos_invalidate_command_line(): invalidates current command line, so that
|
||||
* qgraph framework cannot try to cache the current command line and
|
||||
* forces QEMU to restart.
|
||||
*/
|
||||
void qos_invalidate_command_line(void);
|
||||
|
||||
/**
|
||||
* qos_get_current_command_line(): return the command line required by the
|
||||
* machine and driver objects. This is the same string that was passed to
|
||||
* the test's "before" callback, if any.
|
||||
*/
|
||||
const char *qos_get_current_command_line(void);
|
||||
|
||||
/**
|
||||
* qos_allocate_objects():
|
||||
* @qts: The #QTestState that will be referred to by the machine object.
|
||||
* @alloc: Where to store the allocator for the machine object, or %NULL.
|
||||
*
|
||||
* Allocate driver objects for the current test
|
||||
* path, but relative to the QTestState @qts.
|
||||
*
|
||||
* Returns a test object just like the one that was passed to
|
||||
* the test function, but relative to @qts.
|
||||
*/
|
||||
void *qos_allocate_objects(QTestState *qts, QGuestAllocator **p_alloc);
|
||||
|
||||
/**
|
||||
* qos_object_destroy(): calls the destructor for @obj
|
||||
*/
|
||||
void qos_object_destroy(QOSGraphObject *obj);
|
||||
|
||||
/**
|
||||
* qos_object_queue_destroy(): queue the destructor for @obj so that it is
|
||||
* called at the end of the test
|
||||
*/
|
||||
void qos_object_queue_destroy(QOSGraphObject *obj);
|
||||
|
||||
/**
|
||||
* qos_object_start_hw(): calls the start_hw function for @obj
|
||||
*/
|
||||
void qos_object_start_hw(QOSGraphObject *obj);
|
||||
|
||||
/**
|
||||
* qos_machine_new(): instantiate a new machine node
|
||||
* @node: A machine node to be instantiated
|
||||
* @qts: The #QTestState that will be referred to by the machine object.
|
||||
*
|
||||
* Returns a machine object.
|
||||
*/
|
||||
QOSGraphObject *qos_machine_new(QOSGraphNode *node, QTestState *qts);
|
||||
|
||||
/**
|
||||
* qos_machine_new(): instantiate a new driver node
|
||||
* @node: A driver node to be instantiated
|
||||
* @parent: A #QOSGraphObject to be consumed by the new driver node
|
||||
* @alloc: An allocator to be used by the new driver node.
|
||||
* @arg: The argument for the consumed-by edge to @node.
|
||||
*
|
||||
* Calls the constructor for the driver object.
|
||||
*/
|
||||
QOSGraphObject *qos_driver_new(QOSGraphNode *node, QOSGraphObject *parent,
|
||||
QGuestAllocator *alloc, void *arg);
|
||||
|
||||
|
||||
#endif
|
||||
257
tests/qtest/libqos/qgraph_internal.h
Normal file
257
tests/qtest/libqos/qgraph_internal.h
Normal file
|
|
@ -0,0 +1,257 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef QGRAPH_INTERNAL_H
|
||||
#define QGRAPH_INTERNAL_H
|
||||
|
||||
/* This header is declaring additional helper functions defined in
|
||||
* libqos/qgraph.c
|
||||
* It should not be included in tests
|
||||
*/
|
||||
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
typedef struct QOSGraphMachine QOSGraphMachine;
|
||||
typedef enum QOSEdgeType QOSEdgeType;
|
||||
typedef enum QOSNodeType QOSNodeType;
|
||||
|
||||
/* callback called when the walk path algorithm found a
|
||||
* valid path
|
||||
*/
|
||||
typedef void (*QOSTestCallback) (QOSGraphNode *path, int len);
|
||||
|
||||
/* edge types*/
|
||||
enum QOSEdgeType {
|
||||
QEDGE_CONTAINS,
|
||||
QEDGE_PRODUCES,
|
||||
QEDGE_CONSUMED_BY
|
||||
};
|
||||
|
||||
/* node types*/
|
||||
enum QOSNodeType {
|
||||
QNODE_MACHINE,
|
||||
QNODE_DRIVER,
|
||||
QNODE_INTERFACE,
|
||||
QNODE_TEST
|
||||
};
|
||||
|
||||
/* Graph Node */
|
||||
struct QOSGraphNode {
|
||||
QOSNodeType type;
|
||||
bool available; /* set by QEMU via QMP, used during graph walk */
|
||||
bool visited; /* used during graph walk */
|
||||
char *name; /* used to identify the node */
|
||||
char *command_line; /* used to start QEMU at test execution */
|
||||
union {
|
||||
struct {
|
||||
QOSCreateDriverFunc constructor;
|
||||
} driver;
|
||||
struct {
|
||||
QOSCreateMachineFunc constructor;
|
||||
} machine;
|
||||
struct {
|
||||
QOSTestFunc function;
|
||||
void *arg;
|
||||
QOSBeforeTest before;
|
||||
bool subprocess;
|
||||
} test;
|
||||
} u;
|
||||
|
||||
/**
|
||||
* only used when traversing the path, never rely on that except in the
|
||||
* qos_traverse_graph callback function
|
||||
*/
|
||||
QOSGraphEdge *path_edge;
|
||||
};
|
||||
|
||||
/**
|
||||
* qos_graph_get_node(): returns the node mapped to that @key.
|
||||
* It performs an hash map search O(1)
|
||||
*
|
||||
* Returns: on success: the %QOSGraphNode
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
QOSGraphNode *qos_graph_get_node(const char *key);
|
||||
|
||||
/**
|
||||
* qos_graph_has_node(): returns #TRUE if the node
|
||||
* has map has a node mapped to that @key.
|
||||
*/
|
||||
bool qos_graph_has_node(const char *node);
|
||||
|
||||
/**
|
||||
* qos_graph_get_node_type(): returns the %QOSNodeType
|
||||
* of the node @node.
|
||||
* It performs an hash map search O(1)
|
||||
* Returns: on success: the %QOSNodeType
|
||||
* otherwise: #-1
|
||||
*/
|
||||
QOSNodeType qos_graph_get_node_type(const char *node);
|
||||
|
||||
/**
|
||||
* qos_graph_get_node_availability(): returns the availability (boolean)
|
||||
* of the node @node.
|
||||
*/
|
||||
bool qos_graph_get_node_availability(const char *node);
|
||||
|
||||
/**
|
||||
* qos_graph_get_edge(): returns the edge
|
||||
* linking of the node @node with @dest.
|
||||
*
|
||||
* Returns: on success: the %QOSGraphEdge
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
QOSGraphEdge *qos_graph_get_edge(const char *node, const char *dest);
|
||||
|
||||
/**
|
||||
* qos_graph_edge_get_type(): returns the edge type
|
||||
* of the edge @edge.
|
||||
*
|
||||
* Returns: on success: the %QOSEdgeType
|
||||
* otherwise: #-1
|
||||
*/
|
||||
QOSEdgeType qos_graph_edge_get_type(QOSGraphEdge *edge);
|
||||
|
||||
/**
|
||||
* qos_graph_edge_get_dest(): returns the name of the node
|
||||
* pointed as destination of edge @edge.
|
||||
*
|
||||
* Returns: on success: the destination
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
char *qos_graph_edge_get_dest(QOSGraphEdge *edge);
|
||||
|
||||
/**
|
||||
* qos_graph_has_edge(): returns #TRUE if there
|
||||
* exists an edge from @start to @dest.
|
||||
*/
|
||||
bool qos_graph_has_edge(const char *start, const char *dest);
|
||||
|
||||
/**
|
||||
* qos_graph_edge_get_arg(): returns the args assigned
|
||||
* to that @edge.
|
||||
*
|
||||
* Returns: on success: the arg
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
void *qos_graph_edge_get_arg(QOSGraphEdge *edge);
|
||||
|
||||
/**
|
||||
* qos_graph_edge_get_after_cmd_line(): returns the edge
|
||||
* command line that will be added after all the node arguments
|
||||
* and all the before_cmd_line arguments.
|
||||
*
|
||||
* Returns: on success: the char* arg
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
char *qos_graph_edge_get_after_cmd_line(QOSGraphEdge *edge);
|
||||
|
||||
/**
|
||||
* qos_graph_edge_get_before_cmd_line(): returns the edge
|
||||
* command line that will be added before the node command
|
||||
* line argument.
|
||||
*
|
||||
* Returns: on success: the char* arg
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
char *qos_graph_edge_get_before_cmd_line(QOSGraphEdge *edge);
|
||||
|
||||
/**
|
||||
* qos_graph_edge_get_extra_device_opts(): returns the arg
|
||||
* command line that will be added to the node command
|
||||
* line argument.
|
||||
*
|
||||
* Returns: on success: the char* arg
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
char *qos_graph_edge_get_extra_device_opts(QOSGraphEdge *edge);
|
||||
|
||||
/**
|
||||
* qos_graph_edge_get_name(): returns the name
|
||||
* assigned to the destination node (different only)
|
||||
* if there are multiple devices with the same node name
|
||||
* e.g. a node has two "generic-sdhci", "emmc" and "sdcard"
|
||||
* there will be two edges with edge_name ="emmc" and "sdcard"
|
||||
*
|
||||
* Returns always the char* edge_name
|
||||
*/
|
||||
char *qos_graph_edge_get_name(QOSGraphEdge *edge);
|
||||
|
||||
/**
|
||||
* qos_graph_get_machine(): returns the machine assigned
|
||||
* to that @node name.
|
||||
*
|
||||
* It performs a search only trough the list of machines
|
||||
* (i.e. the QOS_ROOT child).
|
||||
*
|
||||
* Returns: on success: the %QOSGraphNode
|
||||
* otherwise: #NULL
|
||||
*/
|
||||
QOSGraphNode *qos_graph_get_machine(const char *node);
|
||||
|
||||
/**
|
||||
* qos_graph_has_machine(): returns #TRUE if the node
|
||||
* has map has a node mapped to that @node.
|
||||
*/
|
||||
bool qos_graph_has_machine(const char *node);
|
||||
|
||||
|
||||
/**
|
||||
* qos_print_graph(): walks the graph and prints
|
||||
* all machine-to-test paths.
|
||||
*/
|
||||
void qos_print_graph(void);
|
||||
|
||||
/**
|
||||
* qos_graph_foreach_test_path(): executes the Depth First search
|
||||
* algorithm and applies @fn to all discovered paths.
|
||||
*
|
||||
* See qos_traverse_graph() in qgraph.c for more info on
|
||||
* how it works.
|
||||
*/
|
||||
void qos_graph_foreach_test_path(QOSTestCallback fn);
|
||||
|
||||
/**
|
||||
* qos_get_machine_type(): return QEMU machine type for a machine node.
|
||||
* This function requires every machine @name to be in the form
|
||||
* <arch>/<machine_name>, like "arm/raspi2" or "x86_64/pc".
|
||||
*
|
||||
* The function will validate the format and return a pointer to
|
||||
* @machine to <machine_name>. For example, when passed "x86_64/pc"
|
||||
* it will return "pc".
|
||||
*
|
||||
* Note that this function *does not* allocate any new string.
|
||||
*/
|
||||
char *qos_get_machine_type(char *name);
|
||||
|
||||
/**
|
||||
* qos_delete_cmd_line(): delete the
|
||||
* command line present in node mapped with key @name.
|
||||
*
|
||||
* This function is called when the QMP query returns a node with
|
||||
* { "abstract" : true } attribute.
|
||||
*/
|
||||
void qos_delete_cmd_line(const char *name);
|
||||
|
||||
/**
|
||||
* qos_graph_node_set_availability(): sets the node identified
|
||||
* by @node with availability @av.
|
||||
*/
|
||||
void qos_graph_node_set_availability(const char *node, bool av);
|
||||
|
||||
#endif
|
||||
120
tests/qtest/libqos/rtas.c
Normal file
120
tests/qtest/libqos/rtas.c
Normal file
|
|
@ -0,0 +1,120 @@
|
|||
/*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/rtas.h"
|
||||
|
||||
static void qrtas_copy_args(QTestState *qts, uint64_t target_args,
|
||||
uint32_t nargs, uint32_t *args)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < nargs; i++) {
|
||||
qtest_writel(qts, target_args + i * sizeof(uint32_t), args[i]);
|
||||
}
|
||||
}
|
||||
|
||||
static void qrtas_copy_ret(QTestState *qts, uint64_t target_ret,
|
||||
uint32_t nret, uint32_t *ret)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < nret; i++) {
|
||||
ret[i] = qtest_readl(qts, target_ret + i * sizeof(uint32_t));
|
||||
}
|
||||
}
|
||||
|
||||
static uint64_t qrtas_call(QTestState *qts, QGuestAllocator *alloc,
|
||||
const char *name,
|
||||
uint32_t nargs, uint32_t *args,
|
||||
uint32_t nret, uint32_t *ret)
|
||||
{
|
||||
uint64_t res;
|
||||
uint64_t target_args, target_ret;
|
||||
|
||||
target_args = guest_alloc(alloc, nargs * sizeof(uint32_t));
|
||||
target_ret = guest_alloc(alloc, nret * sizeof(uint32_t));
|
||||
|
||||
qrtas_copy_args(qts, target_args, nargs, args);
|
||||
res = qtest_rtas_call(qts, name, nargs, target_args, nret, target_ret);
|
||||
qrtas_copy_ret(qts, target_ret, nret, ret);
|
||||
|
||||
guest_free(alloc, target_ret);
|
||||
guest_free(alloc, target_args);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
int qrtas_get_time_of_day(QTestState *qts, QGuestAllocator *alloc,
|
||||
struct tm *tm, uint32_t *ns)
|
||||
{
|
||||
int res;
|
||||
uint32_t ret[8];
|
||||
|
||||
res = qrtas_call(qts, alloc, "get-time-of-day", 0, NULL, 8, ret);
|
||||
if (res != 0) {
|
||||
return res;
|
||||
}
|
||||
|
||||
res = ret[0];
|
||||
memset(tm, 0, sizeof(*tm));
|
||||
tm->tm_year = ret[1] - 1900;
|
||||
tm->tm_mon = ret[2] - 1;
|
||||
tm->tm_mday = ret[3];
|
||||
tm->tm_hour = ret[4];
|
||||
tm->tm_min = ret[5];
|
||||
tm->tm_sec = ret[6];
|
||||
*ns = ret[7];
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
uint32_t qrtas_ibm_read_pci_config(QTestState *qts, QGuestAllocator *alloc,
|
||||
uint64_t buid,
|
||||
uint32_t addr, uint32_t size)
|
||||
{
|
||||
int res;
|
||||
uint32_t args[4], ret[2];
|
||||
|
||||
args[0] = addr;
|
||||
args[1] = buid >> 32;
|
||||
args[2] = buid & 0xffffffff;
|
||||
args[3] = size;
|
||||
res = qrtas_call(qts, alloc, "ibm,read-pci-config", 4, args, 2, ret);
|
||||
if (res != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ret[0] != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return ret[1];
|
||||
}
|
||||
|
||||
int qrtas_ibm_write_pci_config(QTestState *qts, QGuestAllocator *alloc,
|
||||
uint64_t buid,
|
||||
uint32_t addr, uint32_t size, uint32_t val)
|
||||
{
|
||||
int res;
|
||||
uint32_t args[5], ret[1];
|
||||
|
||||
args[0] = addr;
|
||||
args[1] = buid >> 32;
|
||||
args[2] = buid & 0xffffffff;
|
||||
args[3] = size;
|
||||
args[4] = val;
|
||||
res = qrtas_call(qts, alloc, "ibm,write-pci-config", 5, args, 1, ret);
|
||||
if (res != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ret[0] != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
17
tests/qtest/libqos/rtas.h
Normal file
17
tests/qtest/libqos/rtas.h
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_RTAS_H
|
||||
#define LIBQOS_RTAS_H
|
||||
#include "libqos/malloc.h"
|
||||
|
||||
int qrtas_get_time_of_day(QTestState *qts, QGuestAllocator *alloc,
|
||||
struct tm *tm, uint32_t *ns);
|
||||
uint32_t qrtas_ibm_read_pci_config(QTestState *qts, QGuestAllocator *alloc,
|
||||
uint64_t buid, uint32_t addr, uint32_t size);
|
||||
int qrtas_ibm_write_pci_config(QTestState *qts, QGuestAllocator *alloc,
|
||||
uint64_t buid, uint32_t addr, uint32_t size,
|
||||
uint32_t val);
|
||||
#endif /* LIBQOS_RTAS_H */
|
||||
164
tests/qtest/libqos/sdhci.c
Normal file
164
tests/qtest/libqos/sdhci.c
Normal file
|
|
@ -0,0 +1,164 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "pci.h"
|
||||
#include "qemu/module.h"
|
||||
#include "sdhci.h"
|
||||
#include "hw/pci/pci.h"
|
||||
|
||||
static void set_qsdhci_fields(QSDHCI *s, uint8_t version, uint8_t baseclock,
|
||||
bool sdma, uint64_t reg)
|
||||
{
|
||||
s->props.version = version;
|
||||
s->props.baseclock = baseclock;
|
||||
s->props.capab.sdma = sdma;
|
||||
s->props.capab.reg = reg;
|
||||
}
|
||||
|
||||
/* Memory mapped implementation of QSDHCI */
|
||||
|
||||
static uint16_t sdhci_mm_readw(QSDHCI *s, uint32_t reg)
|
||||
{
|
||||
QSDHCI_MemoryMapped *smm = container_of(s, QSDHCI_MemoryMapped, sdhci);
|
||||
return qtest_readw(smm->qts, smm->addr + reg);
|
||||
}
|
||||
|
||||
static uint64_t sdhci_mm_readq(QSDHCI *s, uint32_t reg)
|
||||
{
|
||||
QSDHCI_MemoryMapped *smm = container_of(s, QSDHCI_MemoryMapped, sdhci);
|
||||
return qtest_readq(smm->qts, smm->addr + reg);
|
||||
}
|
||||
|
||||
static void sdhci_mm_writeq(QSDHCI *s, uint32_t reg, uint64_t val)
|
||||
{
|
||||
QSDHCI_MemoryMapped *smm = container_of(s, QSDHCI_MemoryMapped, sdhci);
|
||||
qtest_writeq(smm->qts, smm->addr + reg, val);
|
||||
}
|
||||
|
||||
static void *sdhci_mm_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QSDHCI_MemoryMapped *smm = obj;
|
||||
if (!g_strcmp0(interface, "sdhci")) {
|
||||
return &smm->sdhci;
|
||||
}
|
||||
fprintf(stderr, "%s not present in generic-sdhci\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
void qos_init_sdhci_mm(QSDHCI_MemoryMapped *sdhci, QTestState *qts,
|
||||
uint32_t addr, QSDHCIProperties *common)
|
||||
{
|
||||
sdhci->obj.get_driver = sdhci_mm_get_driver;
|
||||
sdhci->sdhci.readw = sdhci_mm_readw;
|
||||
sdhci->sdhci.readq = sdhci_mm_readq;
|
||||
sdhci->sdhci.writeq = sdhci_mm_writeq;
|
||||
memcpy(&sdhci->sdhci.props, common, sizeof(QSDHCIProperties));
|
||||
sdhci->addr = addr;
|
||||
sdhci->qts = qts;
|
||||
}
|
||||
|
||||
/* PCI implementation of QSDHCI */
|
||||
|
||||
static uint16_t sdhci_pci_readw(QSDHCI *s, uint32_t reg)
|
||||
{
|
||||
QSDHCI_PCI *spci = container_of(s, QSDHCI_PCI, sdhci);
|
||||
return qpci_io_readw(&spci->dev, spci->mem_bar, reg);
|
||||
}
|
||||
|
||||
static uint64_t sdhci_pci_readq(QSDHCI *s, uint32_t reg)
|
||||
{
|
||||
QSDHCI_PCI *spci = container_of(s, QSDHCI_PCI, sdhci);
|
||||
return qpci_io_readq(&spci->dev, spci->mem_bar, reg);
|
||||
}
|
||||
|
||||
static void sdhci_pci_writeq(QSDHCI *s, uint32_t reg, uint64_t val)
|
||||
{
|
||||
QSDHCI_PCI *spci = container_of(s, QSDHCI_PCI, sdhci);
|
||||
return qpci_io_writeq(&spci->dev, spci->mem_bar, reg, val);
|
||||
}
|
||||
|
||||
static void *sdhci_pci_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QSDHCI_PCI *spci = object;
|
||||
if (!g_strcmp0(interface, "sdhci")) {
|
||||
return &spci->sdhci;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in sdhci-pci\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void sdhci_pci_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QSDHCI_PCI *spci = (QSDHCI_PCI *)obj;
|
||||
qpci_device_enable(&spci->dev);
|
||||
}
|
||||
|
||||
static void sdhci_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QSDHCI_PCI *spci = (QSDHCI_PCI *)obj;
|
||||
qpci_iounmap(&spci->dev, spci->mem_bar);
|
||||
}
|
||||
|
||||
static void *sdhci_pci_create(void *pci_bus, QGuestAllocator *alloc, void *addr)
|
||||
{
|
||||
QSDHCI_PCI *spci = g_new0(QSDHCI_PCI, 1);
|
||||
QPCIBus *bus = pci_bus;
|
||||
uint64_t barsize;
|
||||
|
||||
qpci_device_init(&spci->dev, bus, addr);
|
||||
spci->mem_bar = qpci_iomap(&spci->dev, 0, &barsize);
|
||||
spci->sdhci.readw = sdhci_pci_readw;
|
||||
spci->sdhci.readq = sdhci_pci_readq;
|
||||
spci->sdhci.writeq = sdhci_pci_writeq;
|
||||
set_qsdhci_fields(&spci->sdhci, 2, 0, 1, 0x057834b4);
|
||||
|
||||
spci->obj.get_driver = sdhci_pci_get_driver;
|
||||
spci->obj.start_hw = sdhci_pci_start_hw;
|
||||
spci->obj.destructor = sdhci_destructor;
|
||||
return &spci->obj;
|
||||
}
|
||||
|
||||
static void qsdhci_register_nodes(void)
|
||||
{
|
||||
QPCIAddress addr = {
|
||||
.devfn = QPCI_DEVFN(4, 0),
|
||||
.vendor_id = PCI_VENDOR_ID_REDHAT,
|
||||
.device_id = PCI_DEVICE_ID_REDHAT_SDHCI,
|
||||
};
|
||||
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "addr=04.0",
|
||||
};
|
||||
|
||||
/* generic-sdhci */
|
||||
qos_node_create_driver("generic-sdhci", NULL);
|
||||
qos_node_produces("generic-sdhci", "sdhci");
|
||||
|
||||
/* sdhci-pci */
|
||||
add_qpci_address(&opts, &addr);
|
||||
qos_node_create_driver("sdhci-pci", sdhci_pci_create);
|
||||
qos_node_produces("sdhci-pci", "sdhci");
|
||||
qos_node_consumes("sdhci-pci", "pci-bus", &opts);
|
||||
|
||||
}
|
||||
|
||||
libqos_init(qsdhci_register_nodes);
|
||||
70
tests/qtest/libqos/sdhci.h
Normal file
70
tests/qtest/libqos/sdhci.h
Normal file
|
|
@ -0,0 +1,70 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef QGRAPH_QSDHCI_H
|
||||
#define QGRAPH_QSDHCI_H
|
||||
|
||||
#include "libqos/qgraph.h"
|
||||
#include "pci.h"
|
||||
|
||||
typedef struct QSDHCI QSDHCI;
|
||||
typedef struct QSDHCI_MemoryMapped QSDHCI_MemoryMapped;
|
||||
typedef struct QSDHCI_PCI QSDHCI_PCI;
|
||||
typedef struct QSDHCIProperties QSDHCIProperties;
|
||||
|
||||
/* Properties common to all QSDHCI devices */
|
||||
struct QSDHCIProperties {
|
||||
uint8_t version;
|
||||
uint8_t baseclock;
|
||||
struct {
|
||||
bool sdma;
|
||||
uint64_t reg;
|
||||
} capab;
|
||||
};
|
||||
|
||||
struct QSDHCI {
|
||||
uint16_t (*readw)(QSDHCI *s, uint32_t reg);
|
||||
uint64_t (*readq)(QSDHCI *s, uint32_t reg);
|
||||
void (*writeq)(QSDHCI *s, uint32_t reg, uint64_t val);
|
||||
QSDHCIProperties props;
|
||||
};
|
||||
|
||||
/* Memory Mapped implementation of QSDHCI */
|
||||
struct QSDHCI_MemoryMapped {
|
||||
QOSGraphObject obj;
|
||||
QTestState *qts;
|
||||
QSDHCI sdhci;
|
||||
uint64_t addr;
|
||||
};
|
||||
|
||||
/* PCI implementation of QSDHCI */
|
||||
struct QSDHCI_PCI {
|
||||
QOSGraphObject obj;
|
||||
QPCIDevice dev;
|
||||
QSDHCI sdhci;
|
||||
QPCIBar mem_bar;
|
||||
};
|
||||
|
||||
/**
|
||||
* qos_init_sdhci_mm(): external constructor used by all drivers/machines
|
||||
* that "contain" a #QSDHCI_MemoryMapped driver
|
||||
*/
|
||||
void qos_init_sdhci_mm(QSDHCI_MemoryMapped *sdhci, QTestState *qts,
|
||||
uint32_t addr, QSDHCIProperties *common);
|
||||
|
||||
#endif
|
||||
66
tests/qtest/libqos/tpci200.c
Normal file
66
tests/qtest/libqos/tpci200.c
Normal file
|
|
@ -0,0 +1,66 @@
|
|||
/*
|
||||
* QTest testcase for tpci200 PCI-IndustryPack bridge
|
||||
*
|
||||
* Copyright (c) 2014 SUSE LINUX Products GmbH
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/pci.h"
|
||||
|
||||
typedef struct QTpci200 QTpci200;
|
||||
typedef struct QIpack QIpack;
|
||||
|
||||
struct QIpack {
|
||||
|
||||
};
|
||||
struct QTpci200 {
|
||||
QOSGraphObject obj;
|
||||
QPCIDevice dev;
|
||||
QIpack ipack;
|
||||
};
|
||||
|
||||
/* tpci200 */
|
||||
static void *tpci200_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QTpci200 *tpci200 = obj;
|
||||
if (!g_strcmp0(interface, "ipack")) {
|
||||
return &tpci200->ipack;
|
||||
}
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return &tpci200->dev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in tpci200\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *tpci200_create(void *pci_bus, QGuestAllocator *alloc, void *addr)
|
||||
{
|
||||
QTpci200 *tpci200 = g_new0(QTpci200, 1);
|
||||
QPCIBus *bus = pci_bus;
|
||||
|
||||
qpci_device_init(&tpci200->dev, bus, addr);
|
||||
tpci200->obj.get_driver = tpci200_get_driver;
|
||||
return &tpci200->obj;
|
||||
}
|
||||
|
||||
static void tpci200_register_nodes(void)
|
||||
{
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "addr=04.0,id=ipack0",
|
||||
};
|
||||
add_qpci_address(&opts, &(QPCIAddress) { .devfn = QPCI_DEVFN(4, 0) });
|
||||
|
||||
qos_node_create_driver("tpci200", tpci200_create);
|
||||
qos_node_consumes("tpci200", "pci-bus", &opts);
|
||||
qos_node_produces("tpci200", "ipack");
|
||||
qos_node_produces("tpci200", "pci-device");
|
||||
}
|
||||
|
||||
libqos_init(tpci200_register_nodes);
|
||||
57
tests/qtest/libqos/usb.c
Normal file
57
tests/qtest/libqos/usb.c
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* common code shared by usb tests
|
||||
*
|
||||
* Copyright (c) 2014 Red Hat, Inc
|
||||
*
|
||||
* Authors:
|
||||
* Gerd Hoffmann <kraxel@redhat.com>
|
||||
* John Snow <jsnow@redhat.com>
|
||||
* Igor Mammedov <imammedo@redhat.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "hw/usb/uhci-regs.h"
|
||||
#include "libqos/usb.h"
|
||||
|
||||
void qusb_pci_init_one(QPCIBus *pcibus, struct qhc *hc, uint32_t devfn, int bar)
|
||||
{
|
||||
hc->dev = qpci_device_find(pcibus, devfn);
|
||||
g_assert(hc->dev != NULL);
|
||||
qpci_device_enable(hc->dev);
|
||||
hc->bar = qpci_iomap(hc->dev, bar, NULL);
|
||||
}
|
||||
|
||||
void uhci_deinit(struct qhc *hc)
|
||||
{
|
||||
g_free(hc->dev);
|
||||
}
|
||||
|
||||
void uhci_port_test(struct qhc *hc, int port, uint16_t expect)
|
||||
{
|
||||
uint16_t value = qpci_io_readw(hc->dev, hc->bar, 0x10 + 2 * port);
|
||||
uint16_t mask = ~(UHCI_PORT_WRITE_CLEAR | UHCI_PORT_RSVD1);
|
||||
|
||||
g_assert((value & mask) == (expect & mask));
|
||||
}
|
||||
|
||||
void usb_test_hotplug(QTestState *qts, const char *hcd_id, const char *port,
|
||||
void (*port_check)(void))
|
||||
{
|
||||
char *id = g_strdup_printf("usbdev%s", port);
|
||||
char *bus = g_strdup_printf("%s.0", hcd_id);
|
||||
|
||||
qtest_qmp_device_add(qts, "usb-tablet", id, "{'port': %s, 'bus': %s}",
|
||||
port, bus);
|
||||
|
||||
if (port_check) {
|
||||
port_check();
|
||||
}
|
||||
|
||||
qtest_qmp_device_del(qts, id);
|
||||
|
||||
g_free(bus);
|
||||
g_free(id);
|
||||
}
|
||||
18
tests/qtest/libqos/usb.h
Normal file
18
tests/qtest/libqos/usb.h
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
#ifndef LIBQOS_USB_H
|
||||
#define LIBQOS_USB_H
|
||||
|
||||
#include "libqos/pci-pc.h"
|
||||
|
||||
struct qhc {
|
||||
QPCIDevice *dev;
|
||||
QPCIBar bar;
|
||||
};
|
||||
|
||||
void qusb_pci_init_one(QPCIBus *pcibus, struct qhc *hc,
|
||||
uint32_t devfn, int bar);
|
||||
void uhci_port_test(struct qhc *hc, int port, uint16_t expect);
|
||||
void uhci_deinit(struct qhc *hc);
|
||||
|
||||
void usb_test_hotplug(QTestState *qts, const char *bus_name, const char *port,
|
||||
void (*port_check)(void));
|
||||
#endif
|
||||
180
tests/qtest/libqos/virtio-9p.c
Normal file
180
tests/qtest/libqos/virtio-9p.c
Normal file
|
|
@ -0,0 +1,180 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "standard-headers/linux/virtio_ids.h"
|
||||
#include "libqos/virtio-9p.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
static QGuestAllocator *alloc;
|
||||
|
||||
static void virtio_9p_cleanup(QVirtio9P *interface)
|
||||
{
|
||||
qvirtqueue_cleanup(interface->vdev->bus, interface->vq, alloc);
|
||||
}
|
||||
|
||||
static void virtio_9p_setup(QVirtio9P *interface)
|
||||
{
|
||||
uint64_t features;
|
||||
|
||||
features = qvirtio_get_features(interface->vdev);
|
||||
features &= ~(QVIRTIO_F_BAD_FEATURE | (1ull << VIRTIO_RING_F_EVENT_IDX));
|
||||
qvirtio_set_features(interface->vdev, features);
|
||||
|
||||
interface->vq = qvirtqueue_setup(interface->vdev, alloc, 0);
|
||||
qvirtio_set_driver_ok(interface->vdev);
|
||||
}
|
||||
|
||||
/* virtio-9p-device */
|
||||
static void virtio_9p_device_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtio9PDevice *v_9p = (QVirtio9PDevice *) obj;
|
||||
QVirtio9P *v9p = &v_9p->v9p;
|
||||
|
||||
virtio_9p_cleanup(v9p);
|
||||
}
|
||||
|
||||
static void virtio_9p_device_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtio9PDevice *v_9p = (QVirtio9PDevice *) obj;
|
||||
QVirtio9P *v9p = &v_9p->v9p;
|
||||
|
||||
virtio_9p_setup(v9p);
|
||||
}
|
||||
|
||||
static void *virtio_9p_get_driver(QVirtio9P *v_9p,
|
||||
const char *interface)
|
||||
{
|
||||
if (!g_strcmp0(interface, "virtio-9p")) {
|
||||
return v_9p;
|
||||
}
|
||||
if (!g_strcmp0(interface, "virtio")) {
|
||||
return v_9p->vdev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in virtio-9p-device\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *virtio_9p_device_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QVirtio9PDevice *v_9p = object;
|
||||
return virtio_9p_get_driver(&v_9p->v9p, interface);
|
||||
}
|
||||
|
||||
static void *virtio_9p_device_create(void *virtio_dev,
|
||||
QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtio9PDevice *virtio_device = g_new0(QVirtio9PDevice, 1);
|
||||
QVirtio9P *interface = &virtio_device->v9p;
|
||||
|
||||
interface->vdev = virtio_dev;
|
||||
alloc = t_alloc;
|
||||
|
||||
virtio_device->obj.destructor = virtio_9p_device_destructor;
|
||||
virtio_device->obj.get_driver = virtio_9p_device_get_driver;
|
||||
virtio_device->obj.start_hw = virtio_9p_device_start_hw;
|
||||
|
||||
return &virtio_device->obj;
|
||||
}
|
||||
|
||||
/* virtio-9p-pci */
|
||||
static void virtio_9p_pci_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtio9PPCI *v9_pci = (QVirtio9PPCI *) obj;
|
||||
QVirtio9P *interface = &v9_pci->v9p;
|
||||
QOSGraphObject *pci_vobj = &v9_pci->pci_vdev.obj;
|
||||
|
||||
virtio_9p_cleanup(interface);
|
||||
qvirtio_pci_destructor(pci_vobj);
|
||||
}
|
||||
|
||||
static void virtio_9p_pci_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtio9PPCI *v9_pci = (QVirtio9PPCI *) obj;
|
||||
QVirtio9P *interface = &v9_pci->v9p;
|
||||
QOSGraphObject *pci_vobj = &v9_pci->pci_vdev.obj;
|
||||
|
||||
qvirtio_pci_start_hw(pci_vobj);
|
||||
virtio_9p_setup(interface);
|
||||
}
|
||||
|
||||
static void *virtio_9p_pci_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QVirtio9PPCI *v_9p = object;
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return v_9p->pci_vdev.pdev;
|
||||
}
|
||||
return virtio_9p_get_driver(&v_9p->v9p, interface);
|
||||
}
|
||||
|
||||
static void *virtio_9p_pci_create(void *pci_bus, QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtio9PPCI *v9_pci = g_new0(QVirtio9PPCI, 1);
|
||||
QVirtio9P *interface = &v9_pci->v9p;
|
||||
QOSGraphObject *obj = &v9_pci->pci_vdev.obj;
|
||||
|
||||
virtio_pci_init(&v9_pci->pci_vdev, pci_bus, addr);
|
||||
interface->vdev = &v9_pci->pci_vdev.vdev;
|
||||
alloc = t_alloc;
|
||||
|
||||
g_assert_cmphex(interface->vdev->device_type, ==, VIRTIO_ID_9P);
|
||||
|
||||
obj->destructor = virtio_9p_pci_destructor;
|
||||
obj->start_hw = virtio_9p_pci_start_hw;
|
||||
obj->get_driver = virtio_9p_pci_get_driver;
|
||||
|
||||
return obj;
|
||||
}
|
||||
|
||||
static void virtio_9p_register_nodes(void)
|
||||
{
|
||||
const char *str_simple = "fsdev=fsdev0,mount_tag=" MOUNT_TAG;
|
||||
const char *str_addr = "fsdev=fsdev0,addr=04.0,mount_tag=" MOUNT_TAG;
|
||||
|
||||
QPCIAddress addr = {
|
||||
.devfn = QPCI_DEVFN(4, 0),
|
||||
};
|
||||
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.before_cmd_line = "-fsdev synth,id=fsdev0",
|
||||
};
|
||||
|
||||
/* virtio-9p-device */
|
||||
opts.extra_device_opts = str_simple,
|
||||
qos_node_create_driver("virtio-9p-device", virtio_9p_device_create);
|
||||
qos_node_consumes("virtio-9p-device", "virtio-bus", &opts);
|
||||
qos_node_produces("virtio-9p-device", "virtio");
|
||||
qos_node_produces("virtio-9p-device", "virtio-9p");
|
||||
|
||||
/* virtio-9p-pci */
|
||||
opts.extra_device_opts = str_addr;
|
||||
add_qpci_address(&opts, &addr);
|
||||
qos_node_create_driver("virtio-9p-pci", virtio_9p_pci_create);
|
||||
qos_node_consumes("virtio-9p-pci", "pci-bus", &opts);
|
||||
qos_node_produces("virtio-9p-pci", "pci-device");
|
||||
qos_node_produces("virtio-9p-pci", "virtio");
|
||||
qos_node_produces("virtio-9p-pci", "virtio-9p");
|
||||
|
||||
}
|
||||
|
||||
libqos_init(virtio_9p_register_nodes);
|
||||
47
tests/qtest/libqos/virtio-9p.h
Normal file
47
tests/qtest/libqos/virtio-9p.h
Normal file
|
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef TESTS_LIBQOS_VIRTIO_9P_H
|
||||
#define TESTS_LIBQOS_VIRTIO_9P_H
|
||||
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/virtio-pci.h"
|
||||
|
||||
typedef struct QVirtio9P QVirtio9P;
|
||||
typedef struct QVirtio9PPCI QVirtio9PPCI;
|
||||
typedef struct QVirtio9PDevice QVirtio9PDevice;
|
||||
|
||||
#define MOUNT_TAG "qtest"
|
||||
|
||||
struct QVirtio9P {
|
||||
QVirtioDevice *vdev;
|
||||
QVirtQueue *vq;
|
||||
};
|
||||
|
||||
struct QVirtio9PPCI {
|
||||
QVirtioPCIDevice pci_vdev;
|
||||
QVirtio9P v9p;
|
||||
};
|
||||
|
||||
struct QVirtio9PDevice {
|
||||
QOSGraphObject obj;
|
||||
QVirtio9P v9p;
|
||||
};
|
||||
|
||||
#endif
|
||||
114
tests/qtest/libqos/virtio-balloon.c
Normal file
114
tests/qtest/libqos/virtio-balloon.c
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio-balloon.h"
|
||||
|
||||
/* virtio-balloon-device */
|
||||
static void *qvirtio_balloon_get_driver(QVirtioBalloon *v_balloon,
|
||||
const char *interface)
|
||||
{
|
||||
if (!g_strcmp0(interface, "virtio-balloon")) {
|
||||
return v_balloon;
|
||||
}
|
||||
if (!g_strcmp0(interface, "virtio")) {
|
||||
return v_balloon->vdev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in virtio-balloon-device\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *qvirtio_balloon_device_get_driver(void *object,
|
||||
const char *interface)
|
||||
{
|
||||
QVirtioBalloonDevice *v_balloon = object;
|
||||
return qvirtio_balloon_get_driver(&v_balloon->balloon, interface);
|
||||
}
|
||||
|
||||
static void *virtio_balloon_device_create(void *virtio_dev,
|
||||
QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtioBalloonDevice *virtio_bdevice = g_new0(QVirtioBalloonDevice, 1);
|
||||
QVirtioBalloon *interface = &virtio_bdevice->balloon;
|
||||
|
||||
interface->vdev = virtio_dev;
|
||||
|
||||
virtio_bdevice->obj.get_driver = qvirtio_balloon_device_get_driver;
|
||||
|
||||
return &virtio_bdevice->obj;
|
||||
}
|
||||
|
||||
/* virtio-balloon-pci */
|
||||
static void *qvirtio_balloon_pci_get_driver(void *object,
|
||||
const char *interface)
|
||||
{
|
||||
QVirtioBalloonPCI *v_balloon = object;
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return v_balloon->pci_vdev.pdev;
|
||||
}
|
||||
return qvirtio_balloon_get_driver(&v_balloon->balloon, interface);
|
||||
}
|
||||
|
||||
static void *virtio_balloon_pci_create(void *pci_bus, QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtioBalloonPCI *virtio_bpci = g_new0(QVirtioBalloonPCI, 1);
|
||||
QVirtioBalloon *interface = &virtio_bpci->balloon;
|
||||
QOSGraphObject *obj = &virtio_bpci->pci_vdev.obj;
|
||||
|
||||
|
||||
virtio_pci_init(&virtio_bpci->pci_vdev, pci_bus, addr);
|
||||
interface->vdev = &virtio_bpci->pci_vdev.vdev;
|
||||
|
||||
obj->get_driver = qvirtio_balloon_pci_get_driver;
|
||||
|
||||
return obj;
|
||||
}
|
||||
|
||||
static void virtio_balloon_register_nodes(void)
|
||||
{
|
||||
QPCIAddress addr = {
|
||||
.devfn = QPCI_DEVFN(4, 0),
|
||||
};
|
||||
|
||||
QOSGraphEdgeOptions opts = {
|
||||
.extra_device_opts = "addr=04.0",
|
||||
};
|
||||
|
||||
/* virtio-balloon-device */
|
||||
qos_node_create_driver("virtio-balloon-device",
|
||||
virtio_balloon_device_create);
|
||||
qos_node_consumes("virtio-balloon-device", "virtio-bus", NULL);
|
||||
qos_node_produces("virtio-balloon-device", "virtio");
|
||||
qos_node_produces("virtio-balloon-device", "virtio-balloon");
|
||||
|
||||
/* virtio-balloon-pci */
|
||||
add_qpci_address(&opts, &addr);
|
||||
qos_node_create_driver("virtio-balloon-pci", virtio_balloon_pci_create);
|
||||
qos_node_consumes("virtio-balloon-pci", "pci-bus", &opts);
|
||||
qos_node_produces("virtio-balloon-pci", "pci-device");
|
||||
qos_node_produces("virtio-balloon-pci", "virtio");
|
||||
qos_node_produces("virtio-balloon-pci", "virtio-balloon");
|
||||
}
|
||||
|
||||
libqos_init(virtio_balloon_register_nodes);
|
||||
44
tests/qtest/libqos/virtio-balloon.h
Normal file
44
tests/qtest/libqos/virtio-balloon.h
Normal file
|
|
@ -0,0 +1,44 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef TESTS_LIBQOS_VIRTIO_BALLOON_H
|
||||
#define TESTS_LIBQOS_VIRTIO_BALLOON_H
|
||||
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/virtio-pci.h"
|
||||
|
||||
typedef struct QVirtioBalloon QVirtioBalloon;
|
||||
typedef struct QVirtioBalloonPCI QVirtioBalloonPCI;
|
||||
typedef struct QVirtioBalloonDevice QVirtioBalloonDevice;
|
||||
|
||||
struct QVirtioBalloon {
|
||||
QVirtioDevice *vdev;
|
||||
};
|
||||
|
||||
struct QVirtioBalloonPCI {
|
||||
QVirtioPCIDevice pci_vdev;
|
||||
QVirtioBalloon balloon;
|
||||
};
|
||||
|
||||
struct QVirtioBalloonDevice {
|
||||
QOSGraphObject obj;
|
||||
QVirtioBalloon balloon;
|
||||
};
|
||||
|
||||
#endif
|
||||
125
tests/qtest/libqos/virtio-blk.c
Normal file
125
tests/qtest/libqos/virtio-blk.c
Normal file
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "standard-headers/linux/virtio_blk.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio-blk.h"
|
||||
|
||||
#define PCI_SLOT 0x04
|
||||
#define PCI_FN 0x00
|
||||
|
||||
/* virtio-blk-device */
|
||||
static void *qvirtio_blk_get_driver(QVirtioBlk *v_blk,
|
||||
const char *interface)
|
||||
{
|
||||
if (!g_strcmp0(interface, "virtio-blk")) {
|
||||
return v_blk;
|
||||
}
|
||||
if (!g_strcmp0(interface, "virtio")) {
|
||||
return v_blk->vdev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in virtio-blk-device\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *qvirtio_blk_device_get_driver(void *object,
|
||||
const char *interface)
|
||||
{
|
||||
QVirtioBlkDevice *v_blk = object;
|
||||
return qvirtio_blk_get_driver(&v_blk->blk, interface);
|
||||
}
|
||||
|
||||
static void *virtio_blk_device_create(void *virtio_dev,
|
||||
QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtioBlkDevice *virtio_blk = g_new0(QVirtioBlkDevice, 1);
|
||||
QVirtioBlk *interface = &virtio_blk->blk;
|
||||
|
||||
interface->vdev = virtio_dev;
|
||||
|
||||
virtio_blk->obj.get_driver = qvirtio_blk_device_get_driver;
|
||||
|
||||
return &virtio_blk->obj;
|
||||
}
|
||||
|
||||
/* virtio-blk-pci */
|
||||
static void *qvirtio_blk_pci_get_driver(void *object, const char *interface)
|
||||
{
|
||||
QVirtioBlkPCI *v_blk = object;
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return v_blk->pci_vdev.pdev;
|
||||
}
|
||||
return qvirtio_blk_get_driver(&v_blk->blk, interface);
|
||||
}
|
||||
|
||||
static void *virtio_blk_pci_create(void *pci_bus, QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtioBlkPCI *virtio_blk = g_new0(QVirtioBlkPCI, 1);
|
||||
QVirtioBlk *interface = &virtio_blk->blk;
|
||||
QOSGraphObject *obj = &virtio_blk->pci_vdev.obj;
|
||||
|
||||
virtio_pci_init(&virtio_blk->pci_vdev, pci_bus, addr);
|
||||
interface->vdev = &virtio_blk->pci_vdev.vdev;
|
||||
|
||||
g_assert_cmphex(interface->vdev->device_type, ==, VIRTIO_ID_BLOCK);
|
||||
|
||||
obj->get_driver = qvirtio_blk_pci_get_driver;
|
||||
|
||||
return obj;
|
||||
}
|
||||
|
||||
static void virtio_blk_register_nodes(void)
|
||||
{
|
||||
/* FIXME: every test using these two nodes needs to setup a
|
||||
* -drive,id=drive0 otherwise QEMU is not going to start.
|
||||
* Therefore, we do not include "produces" edge for virtio
|
||||
* and pci-device yet.
|
||||
*/
|
||||
|
||||
char *arg = g_strdup_printf("id=drv0,drive=drive0,addr=%x.%x",
|
||||
PCI_SLOT, PCI_FN);
|
||||
|
||||
QPCIAddress addr = {
|
||||
.devfn = QPCI_DEVFN(PCI_SLOT, PCI_FN),
|
||||
};
|
||||
|
||||
QOSGraphEdgeOptions opts = { };
|
||||
|
||||
/* virtio-blk-device */
|
||||
opts.extra_device_opts = "drive=drive0";
|
||||
qos_node_create_driver("virtio-blk-device", virtio_blk_device_create);
|
||||
qos_node_consumes("virtio-blk-device", "virtio-bus", &opts);
|
||||
qos_node_produces("virtio-blk-device", "virtio-blk");
|
||||
|
||||
/* virtio-blk-pci */
|
||||
opts.extra_device_opts = arg;
|
||||
add_qpci_address(&opts, &addr);
|
||||
qos_node_create_driver("virtio-blk-pci", virtio_blk_pci_create);
|
||||
qos_node_consumes("virtio-blk-pci", "pci-bus", &opts);
|
||||
qos_node_produces("virtio-blk-pci", "virtio-blk");
|
||||
|
||||
g_free(arg);
|
||||
}
|
||||
|
||||
libqos_init(virtio_blk_register_nodes);
|
||||
45
tests/qtest/libqos/virtio-blk.h
Normal file
45
tests/qtest/libqos/virtio-blk.h
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef TESTS_LIBQOS_VIRTIO_BLK_H
|
||||
#define TESTS_LIBQOS_VIRTIO_BLK_H
|
||||
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/virtio-pci.h"
|
||||
|
||||
typedef struct QVirtioBlk QVirtioBlk;
|
||||
typedef struct QVirtioBlkPCI QVirtioBlkPCI;
|
||||
typedef struct QVirtioBlkDevice QVirtioBlkDevice;
|
||||
|
||||
/* virtqueue is created in each test */
|
||||
struct QVirtioBlk {
|
||||
QVirtioDevice *vdev;
|
||||
};
|
||||
|
||||
struct QVirtioBlkPCI {
|
||||
QVirtioPCIDevice pci_vdev;
|
||||
QVirtioBlk blk;
|
||||
};
|
||||
|
||||
struct QVirtioBlkDevice {
|
||||
QOSGraphObject obj;
|
||||
QVirtioBlk blk;
|
||||
};
|
||||
|
||||
#endif
|
||||
266
tests/qtest/libqos/virtio-mmio.c
Normal file
266
tests/qtest/libqos/virtio-mmio.c
Normal file
|
|
@ -0,0 +1,266 @@
|
|||
/*
|
||||
* libqos virtio MMIO driver
|
||||
*
|
||||
* Copyright (c) 2014 Marc Marí
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/virtio-mmio.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "standard-headers/linux/virtio_ring.h"
|
||||
|
||||
static uint8_t qvirtio_mmio_config_readb(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
return qtest_readb(dev->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);
|
||||
}
|
||||
|
||||
static uint16_t qvirtio_mmio_config_readw(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
return qtest_readw(dev->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);
|
||||
}
|
||||
|
||||
static uint32_t qvirtio_mmio_config_readl(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
return qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);
|
||||
}
|
||||
|
||||
static uint64_t qvirtio_mmio_config_readq(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
return qtest_readq(dev->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);
|
||||
}
|
||||
|
||||
static uint64_t qvirtio_mmio_get_features(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
uint64_t lo;
|
||||
uint64_t hi = 0;
|
||||
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 0);
|
||||
lo = qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES);
|
||||
|
||||
if (dev->version >= 2) {
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 1);
|
||||
hi = qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES);
|
||||
}
|
||||
|
||||
return (hi << 32) | lo;
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_set_features(QVirtioDevice *d, uint64_t features)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
dev->features = features;
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 0);
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES, features);
|
||||
|
||||
if (dev->version >= 2) {
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 1);
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES,
|
||||
features >> 32);
|
||||
}
|
||||
}
|
||||
|
||||
static uint64_t qvirtio_mmio_get_guest_features(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
return dev->features;
|
||||
}
|
||||
|
||||
static uint8_t qvirtio_mmio_get_status(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
return (uint8_t)qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_DEVICE_STATUS);
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_set_status(QVirtioDevice *d, uint8_t status)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_DEVICE_STATUS, (uint32_t)status);
|
||||
}
|
||||
|
||||
static bool qvirtio_mmio_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
uint32_t isr;
|
||||
|
||||
isr = qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 1;
|
||||
if (isr != 0) {
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 1);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool qvirtio_mmio_get_config_isr_status(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
uint32_t isr;
|
||||
|
||||
isr = qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 2;
|
||||
if (isr != 0) {
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 2);
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_wait_config_isr_status(QVirtioDevice *d,
|
||||
gint64 timeout_us)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
gint64 start_time = g_get_monotonic_time();
|
||||
|
||||
do {
|
||||
g_assert(g_get_monotonic_time() - start_time <= timeout_us);
|
||||
qtest_clock_step(dev->qts, 100);
|
||||
} while (!qvirtio_mmio_get_config_isr_status(d));
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_queue_select(QVirtioDevice *d, uint16_t index)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_QUEUE_SEL, (uint32_t)index);
|
||||
|
||||
g_assert_cmphex(qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_QUEUE_PFN), ==, 0);
|
||||
}
|
||||
|
||||
static uint16_t qvirtio_mmio_get_queue_size(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
return (uint16_t)qtest_readl(dev->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NUM_MAX);
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_set_queue_address(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
uint64_t pfn = vq->desc / dev->page_size;
|
||||
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_QUEUE_PFN, pfn);
|
||||
}
|
||||
|
||||
static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d,
|
||||
QGuestAllocator *alloc, uint16_t index)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
QVirtQueue *vq;
|
||||
uint64_t addr;
|
||||
|
||||
vq = g_malloc0(sizeof(*vq));
|
||||
vq->vdev = d;
|
||||
qvirtio_mmio_queue_select(d, index);
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_QUEUE_ALIGN, dev->page_size);
|
||||
|
||||
vq->index = index;
|
||||
vq->size = qvirtio_mmio_get_queue_size(d);
|
||||
vq->free_head = 0;
|
||||
vq->num_free = vq->size;
|
||||
vq->align = dev->page_size;
|
||||
vq->indirect = dev->features & (1ull << VIRTIO_RING_F_INDIRECT_DESC);
|
||||
vq->event = dev->features & (1ull << VIRTIO_RING_F_EVENT_IDX);
|
||||
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NUM, vq->size);
|
||||
|
||||
/* Check different than 0 */
|
||||
g_assert_cmpint(vq->size, !=, 0);
|
||||
|
||||
/* Check power of 2 */
|
||||
g_assert_cmpint(vq->size & (vq->size - 1), ==, 0);
|
||||
|
||||
addr = guest_alloc(alloc, qvring_size(vq->size, dev->page_size));
|
||||
qvring_init(dev->qts, alloc, vq, addr);
|
||||
qvirtio_mmio_set_queue_address(d, vq);
|
||||
|
||||
return vq;
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_virtqueue_cleanup(QVirtQueue *vq,
|
||||
QGuestAllocator *alloc)
|
||||
{
|
||||
guest_free(alloc, vq->desc);
|
||||
g_free(vq);
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioMMIODevice *dev = container_of(d, QVirtioMMIODevice, vdev);
|
||||
qtest_writel(dev->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NOTIFY, vq->index);
|
||||
}
|
||||
|
||||
const QVirtioBus qvirtio_mmio = {
|
||||
.config_readb = qvirtio_mmio_config_readb,
|
||||
.config_readw = qvirtio_mmio_config_readw,
|
||||
.config_readl = qvirtio_mmio_config_readl,
|
||||
.config_readq = qvirtio_mmio_config_readq,
|
||||
.get_features = qvirtio_mmio_get_features,
|
||||
.set_features = qvirtio_mmio_set_features,
|
||||
.get_guest_features = qvirtio_mmio_get_guest_features,
|
||||
.get_status = qvirtio_mmio_get_status,
|
||||
.set_status = qvirtio_mmio_set_status,
|
||||
.get_queue_isr_status = qvirtio_mmio_get_queue_isr_status,
|
||||
.wait_config_isr_status = qvirtio_mmio_wait_config_isr_status,
|
||||
.queue_select = qvirtio_mmio_queue_select,
|
||||
.get_queue_size = qvirtio_mmio_get_queue_size,
|
||||
.set_queue_address = qvirtio_mmio_set_queue_address,
|
||||
.virtqueue_setup = qvirtio_mmio_virtqueue_setup,
|
||||
.virtqueue_cleanup = qvirtio_mmio_virtqueue_cleanup,
|
||||
.virtqueue_kick = qvirtio_mmio_virtqueue_kick,
|
||||
};
|
||||
|
||||
static void *qvirtio_mmio_get_driver(void *obj, const char *interface)
|
||||
{
|
||||
QVirtioMMIODevice *virtio_mmio = obj;
|
||||
if (!g_strcmp0(interface, "virtio-bus")) {
|
||||
return &virtio_mmio->vdev;
|
||||
}
|
||||
fprintf(stderr, "%s not present in virtio-mmio\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void qvirtio_mmio_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtioMMIODevice *dev = (QVirtioMMIODevice *) obj;
|
||||
qvirtio_start_device(&dev->vdev);
|
||||
}
|
||||
|
||||
void qvirtio_mmio_init_device(QVirtioMMIODevice *dev, QTestState *qts,
|
||||
uint64_t addr, uint32_t page_size)
|
||||
{
|
||||
uint32_t magic;
|
||||
magic = qtest_readl(qts, addr + QVIRTIO_MMIO_MAGIC_VALUE);
|
||||
g_assert(magic == ('v' | 'i' << 8 | 'r' << 16 | 't' << 24));
|
||||
|
||||
dev->version = qtest_readl(qts, addr + QVIRTIO_MMIO_VERSION);
|
||||
g_assert(dev->version == 1 || dev->version == 2);
|
||||
|
||||
dev->qts = qts;
|
||||
dev->addr = addr;
|
||||
dev->page_size = page_size;
|
||||
dev->vdev.device_type = qtest_readl(qts, addr + QVIRTIO_MMIO_DEVICE_ID);
|
||||
dev->vdev.bus = &qvirtio_mmio;
|
||||
|
||||
qtest_writel(qts, addr + QVIRTIO_MMIO_GUEST_PAGE_SIZE, page_size);
|
||||
|
||||
dev->obj.get_driver = qvirtio_mmio_get_driver;
|
||||
dev->obj.start_hw = qvirtio_mmio_start_hw;
|
||||
}
|
||||
|
||||
static void virtio_mmio_register_nodes(void)
|
||||
{
|
||||
qos_node_create_driver("virtio-mmio", NULL);
|
||||
qos_node_produces("virtio-mmio", "virtio-bus");
|
||||
}
|
||||
|
||||
libqos_init(virtio_mmio_register_nodes);
|
||||
51
tests/qtest/libqos/virtio-mmio.h
Normal file
51
tests/qtest/libqos/virtio-mmio.h
Normal file
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* libqos virtio MMIO definitions
|
||||
*
|
||||
* Copyright (c) 2014 Marc Marí
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_VIRTIO_MMIO_H
|
||||
#define LIBQOS_VIRTIO_MMIO_H
|
||||
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
#define QVIRTIO_MMIO_MAGIC_VALUE 0x000
|
||||
#define QVIRTIO_MMIO_VERSION 0x004
|
||||
#define QVIRTIO_MMIO_DEVICE_ID 0x008
|
||||
#define QVIRTIO_MMIO_VENDOR_ID 0x00C
|
||||
#define QVIRTIO_MMIO_HOST_FEATURES 0x010
|
||||
#define QVIRTIO_MMIO_HOST_FEATURES_SEL 0x014
|
||||
#define QVIRTIO_MMIO_GUEST_FEATURES 0x020
|
||||
#define QVIRTIO_MMIO_GUEST_FEATURES_SEL 0x024
|
||||
#define QVIRTIO_MMIO_GUEST_PAGE_SIZE 0x028
|
||||
#define QVIRTIO_MMIO_QUEUE_SEL 0x030
|
||||
#define QVIRTIO_MMIO_QUEUE_NUM_MAX 0x034
|
||||
#define QVIRTIO_MMIO_QUEUE_NUM 0x038
|
||||
#define QVIRTIO_MMIO_QUEUE_ALIGN 0x03C
|
||||
#define QVIRTIO_MMIO_QUEUE_PFN 0x040
|
||||
#define QVIRTIO_MMIO_QUEUE_NOTIFY 0x050
|
||||
#define QVIRTIO_MMIO_INTERRUPT_STATUS 0x060
|
||||
#define QVIRTIO_MMIO_INTERRUPT_ACK 0x064
|
||||
#define QVIRTIO_MMIO_DEVICE_STATUS 0x070
|
||||
#define QVIRTIO_MMIO_DEVICE_SPECIFIC 0x100
|
||||
|
||||
typedef struct QVirtioMMIODevice {
|
||||
QOSGraphObject obj;
|
||||
QVirtioDevice vdev;
|
||||
QTestState *qts;
|
||||
uint64_t addr;
|
||||
uint32_t page_size;
|
||||
uint32_t features; /* As it cannot be read later, save it */
|
||||
uint32_t version;
|
||||
} QVirtioMMIODevice;
|
||||
|
||||
extern const QVirtioBus qvirtio_mmio;
|
||||
|
||||
void qvirtio_mmio_init_device(QVirtioMMIODevice *dev, QTestState *qts,
|
||||
uint64_t addr, uint32_t page_size);
|
||||
|
||||
#endif
|
||||
197
tests/qtest/libqos/virtio-net.c
Normal file
197
tests/qtest/libqos/virtio-net.c
Normal file
|
|
@ -0,0 +1,197 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "qemu/module.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio-net.h"
|
||||
#include "hw/virtio/virtio-net.h"
|
||||
|
||||
|
||||
static QGuestAllocator *alloc;
|
||||
|
||||
static void virtio_net_cleanup(QVirtioNet *interface)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < interface->n_queues; i++) {
|
||||
qvirtqueue_cleanup(interface->vdev->bus, interface->queues[i], alloc);
|
||||
}
|
||||
g_free(interface->queues);
|
||||
}
|
||||
|
||||
static void virtio_net_setup(QVirtioNet *interface)
|
||||
{
|
||||
QVirtioDevice *vdev = interface->vdev;
|
||||
uint64_t features;
|
||||
int i;
|
||||
|
||||
features = qvirtio_get_features(vdev);
|
||||
features &= ~(QVIRTIO_F_BAD_FEATURE |
|
||||
(1ull << VIRTIO_RING_F_INDIRECT_DESC) |
|
||||
(1ull << VIRTIO_RING_F_EVENT_IDX));
|
||||
qvirtio_set_features(vdev, features);
|
||||
|
||||
if (features & (1ull << VIRTIO_NET_F_MQ)) {
|
||||
interface->n_queues = qvirtio_config_readw(vdev, 8) * 2;
|
||||
} else {
|
||||
interface->n_queues = 2;
|
||||
}
|
||||
interface->n_queues++; /* Account for the ctrl queue */
|
||||
|
||||
interface->queues = g_new(QVirtQueue *, interface->n_queues);
|
||||
for (i = 0; i < interface->n_queues; i++) {
|
||||
interface->queues[i] = qvirtqueue_setup(vdev, alloc, i);
|
||||
}
|
||||
qvirtio_set_driver_ok(vdev);
|
||||
}
|
||||
|
||||
/* virtio-net-device */
|
||||
static void qvirtio_net_device_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtioNetDevice *v_net = (QVirtioNetDevice *) obj;
|
||||
virtio_net_cleanup(&v_net->net);
|
||||
}
|
||||
|
||||
static void qvirtio_net_device_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtioNetDevice *v_net = (QVirtioNetDevice *) obj;
|
||||
QVirtioNet *interface = &v_net->net;
|
||||
|
||||
virtio_net_setup(interface);
|
||||
}
|
||||
|
||||
static void *qvirtio_net_get_driver(QVirtioNet *v_net,
|
||||
const char *interface)
|
||||
{
|
||||
if (!g_strcmp0(interface, "virtio-net")) {
|
||||
return v_net;
|
||||
}
|
||||
if (!g_strcmp0(interface, "virtio")) {
|
||||
return v_net->vdev;
|
||||
}
|
||||
|
||||
fprintf(stderr, "%s not present in virtio-net-device\n", interface);
|
||||
g_assert_not_reached();
|
||||
}
|
||||
|
||||
static void *qvirtio_net_device_get_driver(void *object,
|
||||
const char *interface)
|
||||
{
|
||||
QVirtioNetDevice *v_net = object;
|
||||
return qvirtio_net_get_driver(&v_net->net, interface);
|
||||
}
|
||||
|
||||
static void *virtio_net_device_create(void *virtio_dev,
|
||||
QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtioNetDevice *virtio_ndevice = g_new0(QVirtioNetDevice, 1);
|
||||
QVirtioNet *interface = &virtio_ndevice->net;
|
||||
|
||||
interface->vdev = virtio_dev;
|
||||
alloc = t_alloc;
|
||||
|
||||
virtio_ndevice->obj.destructor = qvirtio_net_device_destructor;
|
||||
virtio_ndevice->obj.get_driver = qvirtio_net_device_get_driver;
|
||||
virtio_ndevice->obj.start_hw = qvirtio_net_device_start_hw;
|
||||
|
||||
return &virtio_ndevice->obj;
|
||||
}
|
||||
|
||||
/* virtio-net-pci */
|
||||
static void qvirtio_net_pci_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtioNetPCI *v_net = (QVirtioNetPCI *) obj;
|
||||
QVirtioNet *interface = &v_net->net;
|
||||
QOSGraphObject *pci_vobj = &v_net->pci_vdev.obj;
|
||||
|
||||
virtio_net_cleanup(interface);
|
||||
qvirtio_pci_destructor(pci_vobj);
|
||||
}
|
||||
|
||||
static void qvirtio_net_pci_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtioNetPCI *v_net = (QVirtioNetPCI *) obj;
|
||||
QVirtioNet *interface = &v_net->net;
|
||||
QOSGraphObject *pci_vobj = &v_net->pci_vdev.obj;
|
||||
|
||||
qvirtio_pci_start_hw(pci_vobj);
|
||||
virtio_net_setup(interface);
|
||||
}
|
||||
|
||||
static void *qvirtio_net_pci_get_driver(void *object,
|
||||
const char *interface)
|
||||
{
|
||||
QVirtioNetPCI *v_net = object;
|
||||
if (!g_strcmp0(interface, "pci-device")) {
|
||||
return v_net->pci_vdev.pdev;
|
||||
}
|
||||
return qvirtio_net_get_driver(&v_net->net, interface);
|
||||
}
|
||||
|
||||
static void *virtio_net_pci_create(void *pci_bus, QGuestAllocator *t_alloc,
|
||||
void *addr)
|
||||
{
|
||||
QVirtioNetPCI *virtio_bpci = g_new0(QVirtioNetPCI, 1);
|
||||
QVirtioNet *interface = &virtio_bpci->net;
|
||||
QOSGraphObject *obj = &virtio_bpci->pci_vdev.obj;
|
||||
|
||||
virtio_pci_init(&virtio_bpci->pci_vdev, pci_bus, addr);
|
||||
interface->vdev = &virtio_bpci->pci_vdev.vdev;
|
||||
alloc = t_alloc;
|
||||
|
||||
g_assert_cmphex(interface->vdev->device_type, ==, VIRTIO_ID_NET);
|
||||
|
||||
obj->destructor = qvirtio_net_pci_destructor;
|
||||
obj->start_hw = qvirtio_net_pci_start_hw;
|
||||
obj->get_driver = qvirtio_net_pci_get_driver;
|
||||
|
||||
return obj;
|
||||
}
|
||||
|
||||
static void virtio_net_register_nodes(void)
|
||||
{
|
||||
/* FIXME: every test using these nodes needs to setup a
|
||||
* -netdev socket,id=hs0 otherwise QEMU is not going to start.
|
||||
* Therefore, we do not include "produces" edge for virtio
|
||||
* and pci-device yet.
|
||||
*/
|
||||
QPCIAddress addr = {
|
||||
.devfn = QPCI_DEVFN(4, 0),
|
||||
};
|
||||
|
||||
QOSGraphEdgeOptions opts = { };
|
||||
|
||||
/* virtio-net-device */
|
||||
opts.extra_device_opts = "netdev=hs0";
|
||||
qos_node_create_driver("virtio-net-device",
|
||||
virtio_net_device_create);
|
||||
qos_node_consumes("virtio-net-device", "virtio-bus", &opts);
|
||||
qos_node_produces("virtio-net-device", "virtio-net");
|
||||
|
||||
/* virtio-net-pci */
|
||||
opts.extra_device_opts = "netdev=hs0,addr=04.0";
|
||||
add_qpci_address(&opts, &addr);
|
||||
qos_node_create_driver("virtio-net-pci", virtio_net_pci_create);
|
||||
qos_node_consumes("virtio-net-pci", "pci-bus", &opts);
|
||||
qos_node_produces("virtio-net-pci", "virtio-net");
|
||||
}
|
||||
|
||||
libqos_init(virtio_net_register_nodes);
|
||||
46
tests/qtest/libqos/virtio-net.h
Normal file
46
tests/qtest/libqos/virtio-net.h
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* libqos driver framework
|
||||
*
|
||||
* Copyright (c) 2018 Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
||||
*/
|
||||
|
||||
#ifndef TESTS_LIBQOS_VIRTIO_NET_H
|
||||
#define TESTS_LIBQOS_VIRTIO_NET_H
|
||||
|
||||
#include "libqos/qgraph.h"
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/virtio-pci.h"
|
||||
|
||||
typedef struct QVirtioNet QVirtioNet;
|
||||
typedef struct QVirtioNetPCI QVirtioNetPCI;
|
||||
typedef struct QVirtioNetDevice QVirtioNetDevice;
|
||||
|
||||
struct QVirtioNet {
|
||||
QVirtioDevice *vdev;
|
||||
int n_queues; /* total number of virtqueues (rx, tx, ctrl) */
|
||||
QVirtQueue **queues;
|
||||
};
|
||||
|
||||
struct QVirtioNetPCI {
|
||||
QVirtioPCIDevice pci_vdev;
|
||||
QVirtioNet net;
|
||||
};
|
||||
|
||||
struct QVirtioNetDevice {
|
||||
QOSGraphObject obj;
|
||||
QVirtioNet net;
|
||||
};
|
||||
|
||||
#endif
|
||||
443
tests/qtest/libqos/virtio-pci-modern.c
Normal file
443
tests/qtest/libqos/virtio-pci-modern.c
Normal file
|
|
@ -0,0 +1,443 @@
|
|||
/*
|
||||
* libqos VIRTIO 1.0 PCI driver
|
||||
*
|
||||
* Copyright (c) 2019 Red Hat, Inc
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "standard-headers/linux/pci_regs.h"
|
||||
#include "standard-headers/linux/virtio_pci.h"
|
||||
#include "standard-headers/linux/virtio_config.h"
|
||||
#include "virtio-pci-modern.h"
|
||||
|
||||
static uint8_t config_readb(QVirtioDevice *d, uint64_t addr)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readb(dev->pdev, dev->bar, dev->device_cfg_offset + addr);
|
||||
}
|
||||
|
||||
static uint16_t config_readw(QVirtioDevice *d, uint64_t addr)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readw(dev->pdev, dev->bar, dev->device_cfg_offset + addr);
|
||||
}
|
||||
|
||||
static uint32_t config_readl(QVirtioDevice *d, uint64_t addr)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readl(dev->pdev, dev->bar, dev->device_cfg_offset + addr);
|
||||
}
|
||||
|
||||
static uint64_t config_readq(QVirtioDevice *d, uint64_t addr)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readq(dev->pdev, dev->bar, dev->device_cfg_offset + addr);
|
||||
}
|
||||
|
||||
static uint64_t get_features(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
uint64_t lo, hi;
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
device_feature_select),
|
||||
0);
|
||||
lo = qpci_io_readl(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, device_feature));
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
device_feature_select),
|
||||
1);
|
||||
hi = qpci_io_readl(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, device_feature));
|
||||
|
||||
return (hi << 32) | lo;
|
||||
}
|
||||
|
||||
static void set_features(QVirtioDevice *d, uint64_t features)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
/* Drivers must enable VIRTIO 1.0 or else use the Legacy interface */
|
||||
g_assert_cmphex(features & (1ull << VIRTIO_F_VERSION_1), !=, 0);
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
guest_feature_select),
|
||||
0);
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
guest_feature),
|
||||
features);
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
guest_feature_select),
|
||||
1);
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
guest_feature),
|
||||
features >> 32);
|
||||
}
|
||||
|
||||
static uint64_t get_guest_features(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
uint64_t lo, hi;
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
guest_feature_select),
|
||||
0);
|
||||
lo = qpci_io_readl(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, guest_feature));
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
guest_feature_select),
|
||||
1);
|
||||
hi = qpci_io_readl(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, guest_feature));
|
||||
|
||||
return (hi << 32) | lo;
|
||||
}
|
||||
|
||||
static uint8_t get_status(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
return qpci_io_readb(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
device_status));
|
||||
}
|
||||
|
||||
static void set_status(QVirtioDevice *d, uint8_t status)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
return qpci_io_writeb(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
device_status),
|
||||
status);
|
||||
}
|
||||
|
||||
static bool get_msix_status(QVirtioPCIDevice *dev, uint32_t msix_entry,
|
||||
uint32_t msix_addr, uint32_t msix_data)
|
||||
{
|
||||
uint32_t data;
|
||||
|
||||
g_assert_cmpint(msix_entry, !=, -1);
|
||||
if (qpci_msix_masked(dev->pdev, msix_entry)) {
|
||||
/* No ISR checking should be done if masked, but read anyway */
|
||||
return qpci_msix_pending(dev->pdev, msix_entry);
|
||||
}
|
||||
|
||||
data = qtest_readl(dev->pdev->bus->qts, msix_addr);
|
||||
if (data == msix_data) {
|
||||
qtest_writel(dev->pdev->bus->qts, msix_addr, 0);
|
||||
return true;
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static bool get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
if (dev->pdev->msix_enabled) {
|
||||
QVirtQueuePCI *vqpci = container_of(vq, QVirtQueuePCI, vq);
|
||||
|
||||
return get_msix_status(dev, vqpci->msix_entry, vqpci->msix_addr,
|
||||
vqpci->msix_data);
|
||||
}
|
||||
|
||||
return qpci_io_readb(dev->pdev, dev->bar, dev->isr_cfg_offset) & 1;
|
||||
}
|
||||
|
||||
static bool get_config_isr_status(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
if (dev->pdev->msix_enabled) {
|
||||
return get_msix_status(dev, dev->config_msix_entry,
|
||||
dev->config_msix_addr, dev->config_msix_data);
|
||||
}
|
||||
|
||||
return qpci_io_readb(dev->pdev, dev->bar, dev->isr_cfg_offset) & 2;
|
||||
}
|
||||
|
||||
static void wait_config_isr_status(QVirtioDevice *d, gint64 timeout_us)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
gint64 start_time = g_get_monotonic_time();
|
||||
|
||||
do {
|
||||
g_assert(g_get_monotonic_time() - start_time <= timeout_us);
|
||||
qtest_clock_step(dev->pdev->bus->qts, 100);
|
||||
} while (!get_config_isr_status(d));
|
||||
}
|
||||
|
||||
static void queue_select(QVirtioDevice *d, uint16_t index)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
qpci_io_writew(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_select),
|
||||
index);
|
||||
}
|
||||
|
||||
static uint16_t get_queue_size(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
return qpci_io_readw(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_size));
|
||||
}
|
||||
|
||||
static void set_queue_address(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_desc_lo),
|
||||
vq->desc);
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_desc_hi),
|
||||
vq->desc >> 32);
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_avail_lo),
|
||||
vq->avail);
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_avail_hi),
|
||||
vq->avail >> 32);
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_used_lo),
|
||||
vq->used);
|
||||
qpci_io_writel(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_used_hi),
|
||||
vq->used >> 32);
|
||||
}
|
||||
|
||||
static QVirtQueue *virtqueue_setup(QVirtioDevice *d, QGuestAllocator *alloc,
|
||||
uint16_t index)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
QVirtQueue *vq;
|
||||
QVirtQueuePCI *vqpci;
|
||||
uint16_t notify_off;
|
||||
|
||||
vq = qvirtio_pci_virtqueue_setup_common(d, alloc, index);
|
||||
vqpci = container_of(vq, QVirtQueuePCI, vq);
|
||||
|
||||
notify_off = qpci_io_readw(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
queue_notify_off));
|
||||
|
||||
vqpci->notify_offset = dev->notify_cfg_offset +
|
||||
notify_off * dev->notify_off_multiplier;
|
||||
|
||||
qpci_io_writew(dev->pdev, dev->bar, dev->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_enable), 1);
|
||||
|
||||
return vq;
|
||||
}
|
||||
|
||||
static void virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
QVirtQueuePCI *vqpci = container_of(vq, QVirtQueuePCI, vq);
|
||||
|
||||
qpci_io_writew(dev->pdev, dev->bar, vqpci->notify_offset, vq->index);
|
||||
}
|
||||
|
||||
static const QVirtioBus qvirtio_pci_virtio_1 = {
|
||||
.config_readb = config_readb,
|
||||
.config_readw = config_readw,
|
||||
.config_readl = config_readl,
|
||||
.config_readq = config_readq,
|
||||
.get_features = get_features,
|
||||
.set_features = set_features,
|
||||
.get_guest_features = get_guest_features,
|
||||
.get_status = get_status,
|
||||
.set_status = set_status,
|
||||
.get_queue_isr_status = get_queue_isr_status,
|
||||
.wait_config_isr_status = wait_config_isr_status,
|
||||
.queue_select = queue_select,
|
||||
.get_queue_size = get_queue_size,
|
||||
.set_queue_address = set_queue_address,
|
||||
.virtqueue_setup = virtqueue_setup,
|
||||
.virtqueue_cleanup = qvirtio_pci_virtqueue_cleanup_common,
|
||||
.virtqueue_kick = virtqueue_kick,
|
||||
};
|
||||
|
||||
static void set_config_vector(QVirtioPCIDevice *d, uint16_t entry)
|
||||
{
|
||||
uint16_t vector;
|
||||
|
||||
qpci_io_writew(d->pdev, d->bar, d->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, msix_config), entry);
|
||||
vector = qpci_io_readw(d->pdev, d->bar, d->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
msix_config));
|
||||
g_assert_cmphex(vector, !=, VIRTIO_MSI_NO_VECTOR);
|
||||
}
|
||||
|
||||
static void set_queue_vector(QVirtioPCIDevice *d, uint16_t vq_idx,
|
||||
uint16_t entry)
|
||||
{
|
||||
uint16_t vector;
|
||||
|
||||
queue_select(&d->vdev, vq_idx);
|
||||
qpci_io_writew(d->pdev, d->bar, d->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg, queue_msix_vector),
|
||||
entry);
|
||||
vector = qpci_io_readw(d->pdev, d->bar, d->common_cfg_offset +
|
||||
offsetof(struct virtio_pci_common_cfg,
|
||||
queue_msix_vector));
|
||||
g_assert_cmphex(vector, !=, VIRTIO_MSI_NO_VECTOR);
|
||||
}
|
||||
|
||||
static const QVirtioPCIMSIXOps qvirtio_pci_msix_ops_virtio_1 = {
|
||||
.set_config_vector = set_config_vector,
|
||||
.set_queue_vector = set_queue_vector,
|
||||
};
|
||||
|
||||
static bool probe_device_type(QVirtioPCIDevice *dev)
|
||||
{
|
||||
uint16_t vendor_id;
|
||||
uint16_t device_id;
|
||||
|
||||
/* "Drivers MUST match devices with the PCI Vendor ID 0x1AF4" */
|
||||
vendor_id = qpci_config_readw(dev->pdev, PCI_VENDOR_ID);
|
||||
if (vendor_id != 0x1af4) {
|
||||
return false;
|
||||
}
|
||||
|
||||
/*
|
||||
* "Any PCI device with ... PCI Device ID 0x1000 through 0x107F inclusive
|
||||
* is a virtio device"
|
||||
*/
|
||||
device_id = qpci_config_readw(dev->pdev, PCI_DEVICE_ID);
|
||||
if (device_id < 0x1000 || device_id > 0x107f) {
|
||||
return false;
|
||||
}
|
||||
|
||||
/*
|
||||
* "Devices MAY utilize a Transitional PCI Device ID range, 0x1000 to
|
||||
* 0x103F depending on the device type"
|
||||
*/
|
||||
if (device_id < 0x1040) {
|
||||
/*
|
||||
* "Transitional devices MUST have the PCI Subsystem Device ID matching
|
||||
* the Virtio Device ID"
|
||||
*/
|
||||
dev->vdev.device_type = qpci_config_readw(dev->pdev, PCI_SUBSYSTEM_ID);
|
||||
} else {
|
||||
/*
|
||||
* "The PCI Device ID is calculated by adding 0x1040 to the Virtio
|
||||
* Device ID"
|
||||
*/
|
||||
dev->vdev.device_type = device_id - 0x1040;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Find the first VIRTIO 1.0 PCI structure for a given type */
|
||||
static bool find_structure(QVirtioPCIDevice *dev, uint8_t cfg_type,
|
||||
uint8_t *bar, uint32_t *offset, uint32_t *length,
|
||||
uint8_t *cfg_addr)
|
||||
{
|
||||
uint8_t addr = 0;
|
||||
|
||||
while ((addr = qpci_find_capability(dev->pdev, PCI_CAP_ID_VNDR,
|
||||
addr)) != 0) {
|
||||
uint8_t type;
|
||||
|
||||
type = qpci_config_readb(dev->pdev,
|
||||
addr + offsetof(struct virtio_pci_cap, cfg_type));
|
||||
if (type != cfg_type) {
|
||||
continue;
|
||||
}
|
||||
|
||||
*bar = qpci_config_readb(dev->pdev,
|
||||
addr + offsetof(struct virtio_pci_cap, bar));
|
||||
*offset = qpci_config_readl(dev->pdev,
|
||||
addr + offsetof(struct virtio_pci_cap, offset));
|
||||
*length = qpci_config_readl(dev->pdev,
|
||||
addr + offsetof(struct virtio_pci_cap, length));
|
||||
if (cfg_addr) {
|
||||
*cfg_addr = addr;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool probe_device_layout(QVirtioPCIDevice *dev)
|
||||
{
|
||||
uint8_t bar;
|
||||
uint8_t cfg_addr;
|
||||
uint32_t length;
|
||||
|
||||
/*
|
||||
* Due to the qpci_iomap() API we only support devices that put all
|
||||
* structures in the same PCI BAR. Luckily this is true with QEMU.
|
||||
*/
|
||||
|
||||
if (!find_structure(dev, VIRTIO_PCI_CAP_COMMON_CFG, &bar,
|
||||
&dev->common_cfg_offset, &length, NULL)) {
|
||||
return false;
|
||||
}
|
||||
dev->bar_idx = bar;
|
||||
|
||||
if (!find_structure(dev, VIRTIO_PCI_CAP_NOTIFY_CFG, &bar,
|
||||
&dev->notify_cfg_offset, &length, &cfg_addr)) {
|
||||
return false;
|
||||
}
|
||||
g_assert_cmphex(bar, ==, dev->bar_idx);
|
||||
|
||||
dev->notify_off_multiplier = qpci_config_readl(dev->pdev,
|
||||
cfg_addr + offsetof(struct virtio_pci_notify_cap,
|
||||
notify_off_multiplier));
|
||||
|
||||
if (!find_structure(dev, VIRTIO_PCI_CAP_ISR_CFG, &bar,
|
||||
&dev->isr_cfg_offset, &length, NULL)) {
|
||||
return false;
|
||||
}
|
||||
g_assert_cmphex(bar, ==, dev->bar_idx);
|
||||
|
||||
if (!find_structure(dev, VIRTIO_PCI_CAP_DEVICE_CFG, &bar,
|
||||
&dev->device_cfg_offset, &length, NULL)) {
|
||||
return false;
|
||||
}
|
||||
g_assert_cmphex(bar, ==, dev->bar_idx);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Probe a VIRTIO 1.0 device */
|
||||
bool qvirtio_pci_init_virtio_1(QVirtioPCIDevice *dev)
|
||||
{
|
||||
if (!probe_device_type(dev)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!probe_device_layout(dev)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
dev->vdev.bus = &qvirtio_pci_virtio_1;
|
||||
dev->msix_ops = &qvirtio_pci_msix_ops_virtio_1;
|
||||
dev->vdev.big_endian = false;
|
||||
return true;
|
||||
}
|
||||
17
tests/qtest/libqos/virtio-pci-modern.h
Normal file
17
tests/qtest/libqos/virtio-pci-modern.h
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* libqos virtio PCI VIRTIO 1.0 definitions
|
||||
*
|
||||
* Copyright (c) 2019 Red Hat, Inc
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_VIRTIO_PCI_MODERN_H
|
||||
#define LIBQOS_VIRTIO_PCI_MODERN_H
|
||||
|
||||
#include "virtio-pci.h"
|
||||
|
||||
bool qvirtio_pci_init_virtio_1(QVirtioPCIDevice *dev);
|
||||
|
||||
#endif /* LIBQOS_VIRTIO_PCI_MODERN_H */
|
||||
435
tests/qtest/libqos/virtio-pci.c
Normal file
435
tests/qtest/libqos/virtio-pci.c
Normal file
|
|
@ -0,0 +1,435 @@
|
|||
/*
|
||||
* libqos virtio PCI driver
|
||||
*
|
||||
* Copyright (c) 2014 Marc Marí
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "libqtest.h"
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/virtio-pci.h"
|
||||
#include "libqos/pci.h"
|
||||
#include "libqos/pci-pc.h"
|
||||
#include "libqos/malloc.h"
|
||||
#include "libqos/malloc-pc.h"
|
||||
#include "libqos/qgraph.h"
|
||||
#include "standard-headers/linux/virtio_ring.h"
|
||||
#include "standard-headers/linux/virtio_pci.h"
|
||||
|
||||
#include "hw/pci/pci.h"
|
||||
#include "hw/pci/pci_regs.h"
|
||||
|
||||
#include "virtio-pci-modern.h"
|
||||
|
||||
/* virtio-pci is a superclass of all virtio-xxx-pci devices;
|
||||
* the relation between virtio-pci and virtio-xxx-pci is implicit,
|
||||
* and therefore virtio-pci does not produce virtio and is not
|
||||
* reached by any edge, not even as a "contains" edge.
|
||||
* In facts, every device is a QVirtioPCIDevice with
|
||||
* additional fields, since every one has its own
|
||||
* number of queues and various attributes.
|
||||
* Virtio-pci provides default functions to start the
|
||||
* hw and destroy the object, and nodes that want to
|
||||
* override them should always remember to call the
|
||||
* original qvirtio_pci_destructor and qvirtio_pci_start_hw.
|
||||
*/
|
||||
|
||||
#define CONFIG_BASE(dev) (VIRTIO_PCI_CONFIG_OFF((dev)->pdev->msix_enabled))
|
||||
|
||||
static uint8_t qvirtio_pci_config_readb(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readb(dev->pdev, dev->bar, CONFIG_BASE(dev) + off);
|
||||
}
|
||||
|
||||
/* PCI is always read in little-endian order
|
||||
* but virtio ( < 1.0) is in guest order
|
||||
* so with a big-endian guest the order has been reversed,
|
||||
* reverse it again
|
||||
* virtio-1.0 is always little-endian, like PCI
|
||||
*/
|
||||
|
||||
static uint16_t qvirtio_pci_config_readw(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
uint16_t value;
|
||||
|
||||
value = qpci_io_readw(dev->pdev, dev->bar, CONFIG_BASE(dev) + off);
|
||||
if (qvirtio_is_big_endian(d)) {
|
||||
value = bswap16(value);
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
static uint32_t qvirtio_pci_config_readl(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
uint32_t value;
|
||||
|
||||
value = qpci_io_readl(dev->pdev, dev->bar, CONFIG_BASE(dev) + off);
|
||||
if (qvirtio_is_big_endian(d)) {
|
||||
value = bswap32(value);
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d, uint64_t off)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
uint64_t val;
|
||||
|
||||
val = qpci_io_readq(dev->pdev, dev->bar, CONFIG_BASE(dev) + off);
|
||||
if (qvirtio_is_big_endian(d)) {
|
||||
val = bswap64(val);
|
||||
}
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static uint64_t qvirtio_pci_get_features(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readl(dev->pdev, dev->bar, VIRTIO_PCI_HOST_FEATURES);
|
||||
}
|
||||
|
||||
static void qvirtio_pci_set_features(QVirtioDevice *d, uint64_t features)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
qpci_io_writel(dev->pdev, dev->bar, VIRTIO_PCI_GUEST_FEATURES, features);
|
||||
}
|
||||
|
||||
static uint64_t qvirtio_pci_get_guest_features(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readl(dev->pdev, dev->bar, VIRTIO_PCI_GUEST_FEATURES);
|
||||
}
|
||||
|
||||
static uint8_t qvirtio_pci_get_status(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readb(dev->pdev, dev->bar, VIRTIO_PCI_STATUS);
|
||||
}
|
||||
|
||||
static void qvirtio_pci_set_status(QVirtioDevice *d, uint8_t status)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
qpci_io_writeb(dev->pdev, dev->bar, VIRTIO_PCI_STATUS, status);
|
||||
}
|
||||
|
||||
static bool qvirtio_pci_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
QVirtQueuePCI *vqpci = (QVirtQueuePCI *)vq;
|
||||
uint32_t data;
|
||||
|
||||
if (dev->pdev->msix_enabled) {
|
||||
g_assert_cmpint(vqpci->msix_entry, !=, -1);
|
||||
if (qpci_msix_masked(dev->pdev, vqpci->msix_entry)) {
|
||||
/* No ISR checking should be done if masked, but read anyway */
|
||||
return qpci_msix_pending(dev->pdev, vqpci->msix_entry);
|
||||
} else {
|
||||
data = qtest_readl(dev->pdev->bus->qts, vqpci->msix_addr);
|
||||
if (data == vqpci->msix_data) {
|
||||
qtest_writel(dev->pdev->bus->qts, vqpci->msix_addr, 0);
|
||||
return true;
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
return qpci_io_readb(dev->pdev, dev->bar, VIRTIO_PCI_ISR) & 1;
|
||||
}
|
||||
}
|
||||
|
||||
static bool qvirtio_pci_get_config_isr_status(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
uint32_t data;
|
||||
|
||||
if (dev->pdev->msix_enabled) {
|
||||
g_assert_cmpint(dev->config_msix_entry, !=, -1);
|
||||
if (qpci_msix_masked(dev->pdev, dev->config_msix_entry)) {
|
||||
/* No ISR checking should be done if masked, but read anyway */
|
||||
return qpci_msix_pending(dev->pdev, dev->config_msix_entry);
|
||||
} else {
|
||||
data = qtest_readl(dev->pdev->bus->qts, dev->config_msix_addr);
|
||||
if (data == dev->config_msix_data) {
|
||||
qtest_writel(dev->pdev->bus->qts, dev->config_msix_addr, 0);
|
||||
return true;
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
return qpci_io_readb(dev->pdev, dev->bar, VIRTIO_PCI_ISR) & 2;
|
||||
}
|
||||
}
|
||||
|
||||
static void qvirtio_pci_wait_config_isr_status(QVirtioDevice *d,
|
||||
gint64 timeout_us)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
gint64 start_time = g_get_monotonic_time();
|
||||
|
||||
do {
|
||||
g_assert(g_get_monotonic_time() - start_time <= timeout_us);
|
||||
qtest_clock_step(dev->pdev->bus->qts, 100);
|
||||
} while (!qvirtio_pci_get_config_isr_status(d));
|
||||
}
|
||||
|
||||
static void qvirtio_pci_queue_select(QVirtioDevice *d, uint16_t index)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
qpci_io_writeb(dev->pdev, dev->bar, VIRTIO_PCI_QUEUE_SEL, index);
|
||||
}
|
||||
|
||||
static uint16_t qvirtio_pci_get_queue_size(QVirtioDevice *d)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
return qpci_io_readw(dev->pdev, dev->bar, VIRTIO_PCI_QUEUE_NUM);
|
||||
}
|
||||
|
||||
static void qvirtio_pci_set_queue_address(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
uint64_t pfn = vq->desc / VIRTIO_PCI_VRING_ALIGN;
|
||||
|
||||
qpci_io_writel(dev->pdev, dev->bar, VIRTIO_PCI_QUEUE_PFN, pfn);
|
||||
}
|
||||
|
||||
QVirtQueue *qvirtio_pci_virtqueue_setup_common(QVirtioDevice *d,
|
||||
QGuestAllocator *alloc,
|
||||
uint16_t index)
|
||||
{
|
||||
uint64_t feat;
|
||||
uint64_t addr;
|
||||
QVirtQueuePCI *vqpci;
|
||||
QVirtioPCIDevice *qvpcidev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
|
||||
vqpci = g_malloc0(sizeof(*vqpci));
|
||||
feat = d->bus->get_guest_features(d);
|
||||
|
||||
d->bus->queue_select(d, index);
|
||||
vqpci->vq.vdev = d;
|
||||
vqpci->vq.index = index;
|
||||
vqpci->vq.size = d->bus->get_queue_size(d);
|
||||
vqpci->vq.free_head = 0;
|
||||
vqpci->vq.num_free = vqpci->vq.size;
|
||||
vqpci->vq.align = VIRTIO_PCI_VRING_ALIGN;
|
||||
vqpci->vq.indirect = feat & (1ull << VIRTIO_RING_F_INDIRECT_DESC);
|
||||
vqpci->vq.event = feat & (1ull << VIRTIO_RING_F_EVENT_IDX);
|
||||
|
||||
vqpci->msix_entry = -1;
|
||||
vqpci->msix_addr = 0;
|
||||
vqpci->msix_data = 0x12345678;
|
||||
|
||||
/* Check different than 0 */
|
||||
g_assert_cmpint(vqpci->vq.size, !=, 0);
|
||||
|
||||
/* Check power of 2 */
|
||||
g_assert_cmpint(vqpci->vq.size & (vqpci->vq.size - 1), ==, 0);
|
||||
|
||||
addr = guest_alloc(alloc, qvring_size(vqpci->vq.size,
|
||||
VIRTIO_PCI_VRING_ALIGN));
|
||||
qvring_init(qvpcidev->pdev->bus->qts, alloc, &vqpci->vq, addr);
|
||||
d->bus->set_queue_address(d, &vqpci->vq);
|
||||
|
||||
return &vqpci->vq;
|
||||
}
|
||||
|
||||
void qvirtio_pci_virtqueue_cleanup_common(QVirtQueue *vq,
|
||||
QGuestAllocator *alloc)
|
||||
{
|
||||
QVirtQueuePCI *vqpci = container_of(vq, QVirtQueuePCI, vq);
|
||||
|
||||
guest_free(alloc, vq->desc);
|
||||
g_free(vqpci);
|
||||
}
|
||||
|
||||
static void qvirtio_pci_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq)
|
||||
{
|
||||
QVirtioPCIDevice *dev = container_of(d, QVirtioPCIDevice, vdev);
|
||||
qpci_io_writew(dev->pdev, dev->bar, VIRTIO_PCI_QUEUE_NOTIFY, vq->index);
|
||||
}
|
||||
|
||||
static const QVirtioBus qvirtio_pci_legacy = {
|
||||
.config_readb = qvirtio_pci_config_readb,
|
||||
.config_readw = qvirtio_pci_config_readw,
|
||||
.config_readl = qvirtio_pci_config_readl,
|
||||
.config_readq = qvirtio_pci_config_readq,
|
||||
.get_features = qvirtio_pci_get_features,
|
||||
.set_features = qvirtio_pci_set_features,
|
||||
.get_guest_features = qvirtio_pci_get_guest_features,
|
||||
.get_status = qvirtio_pci_get_status,
|
||||
.set_status = qvirtio_pci_set_status,
|
||||
.get_queue_isr_status = qvirtio_pci_get_queue_isr_status,
|
||||
.wait_config_isr_status = qvirtio_pci_wait_config_isr_status,
|
||||
.queue_select = qvirtio_pci_queue_select,
|
||||
.get_queue_size = qvirtio_pci_get_queue_size,
|
||||
.set_queue_address = qvirtio_pci_set_queue_address,
|
||||
.virtqueue_setup = qvirtio_pci_virtqueue_setup_common,
|
||||
.virtqueue_cleanup = qvirtio_pci_virtqueue_cleanup_common,
|
||||
.virtqueue_kick = qvirtio_pci_virtqueue_kick,
|
||||
};
|
||||
|
||||
static void qvirtio_pci_set_config_vector(QVirtioPCIDevice *d, uint16_t entry)
|
||||
{
|
||||
uint16_t vector;
|
||||
|
||||
qpci_io_writew(d->pdev, d->bar, VIRTIO_MSI_CONFIG_VECTOR, entry);
|
||||
vector = qpci_io_readw(d->pdev, d->bar, VIRTIO_MSI_CONFIG_VECTOR);
|
||||
g_assert_cmphex(vector, !=, VIRTIO_MSI_NO_VECTOR);
|
||||
}
|
||||
|
||||
static void qvirtio_pci_set_queue_vector(QVirtioPCIDevice *d, uint16_t vq_idx,
|
||||
uint16_t entry)
|
||||
{
|
||||
uint16_t vector;
|
||||
|
||||
qvirtio_pci_queue_select(&d->vdev, vq_idx);
|
||||
qpci_io_writew(d->pdev, d->bar, VIRTIO_MSI_QUEUE_VECTOR, entry);
|
||||
vector = qpci_io_readw(d->pdev, d->bar, VIRTIO_MSI_QUEUE_VECTOR);
|
||||
g_assert_cmphex(vector, !=, VIRTIO_MSI_NO_VECTOR);
|
||||
}
|
||||
|
||||
static const QVirtioPCIMSIXOps qvirtio_pci_msix_ops_legacy = {
|
||||
.set_config_vector = qvirtio_pci_set_config_vector,
|
||||
.set_queue_vector = qvirtio_pci_set_queue_vector,
|
||||
};
|
||||
|
||||
void qvirtio_pci_device_enable(QVirtioPCIDevice *d)
|
||||
{
|
||||
qpci_device_enable(d->pdev);
|
||||
d->bar = qpci_iomap(d->pdev, d->bar_idx, NULL);
|
||||
}
|
||||
|
||||
void qvirtio_pci_device_disable(QVirtioPCIDevice *d)
|
||||
{
|
||||
qpci_iounmap(d->pdev, d->bar);
|
||||
}
|
||||
|
||||
void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d, QVirtQueuePCI *vqpci,
|
||||
QGuestAllocator *alloc, uint16_t entry)
|
||||
{
|
||||
uint32_t control;
|
||||
uint64_t off;
|
||||
|
||||
g_assert(d->pdev->msix_enabled);
|
||||
off = d->pdev->msix_table_off + (entry * 16);
|
||||
|
||||
g_assert_cmpint(entry, >=, 0);
|
||||
g_assert_cmpint(entry, <, qpci_msix_table_size(d->pdev));
|
||||
vqpci->msix_entry = entry;
|
||||
|
||||
vqpci->msix_addr = guest_alloc(alloc, 4);
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_LOWER_ADDR, vqpci->msix_addr & ~0UL);
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_UPPER_ADDR,
|
||||
(vqpci->msix_addr >> 32) & ~0UL);
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_DATA, vqpci->msix_data);
|
||||
|
||||
control = qpci_io_readl(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_VECTOR_CTRL);
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_VECTOR_CTRL,
|
||||
control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT);
|
||||
|
||||
d->msix_ops->set_queue_vector(d, vqpci->vq.index, entry);
|
||||
}
|
||||
|
||||
void qvirtio_pci_set_msix_configuration_vector(QVirtioPCIDevice *d,
|
||||
QGuestAllocator *alloc, uint16_t entry)
|
||||
{
|
||||
uint32_t control;
|
||||
uint64_t off;
|
||||
|
||||
g_assert(d->pdev->msix_enabled);
|
||||
off = d->pdev->msix_table_off + (entry * 16);
|
||||
|
||||
g_assert_cmpint(entry, >=, 0);
|
||||
g_assert_cmpint(entry, <, qpci_msix_table_size(d->pdev));
|
||||
d->config_msix_entry = entry;
|
||||
|
||||
d->config_msix_data = 0x12345678;
|
||||
d->config_msix_addr = guest_alloc(alloc, 4);
|
||||
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_LOWER_ADDR, d->config_msix_addr & ~0UL);
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_UPPER_ADDR,
|
||||
(d->config_msix_addr >> 32) & ~0UL);
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_DATA, d->config_msix_data);
|
||||
|
||||
control = qpci_io_readl(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_VECTOR_CTRL);
|
||||
qpci_io_writel(d->pdev, d->pdev->msix_table_bar,
|
||||
off + PCI_MSIX_ENTRY_VECTOR_CTRL,
|
||||
control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT);
|
||||
|
||||
d->msix_ops->set_config_vector(d, entry);
|
||||
}
|
||||
|
||||
void qvirtio_pci_destructor(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)obj;
|
||||
qvirtio_pci_device_disable(dev);
|
||||
g_free(dev->pdev);
|
||||
}
|
||||
|
||||
void qvirtio_pci_start_hw(QOSGraphObject *obj)
|
||||
{
|
||||
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)obj;
|
||||
qvirtio_pci_device_enable(dev);
|
||||
qvirtio_start_device(&dev->vdev);
|
||||
}
|
||||
|
||||
static void qvirtio_pci_init_legacy(QVirtioPCIDevice *dev)
|
||||
{
|
||||
dev->vdev.device_type = qpci_config_readw(dev->pdev, PCI_SUBSYSTEM_ID);
|
||||
dev->bar_idx = 0;
|
||||
dev->vdev.bus = &qvirtio_pci_legacy;
|
||||
dev->msix_ops = &qvirtio_pci_msix_ops_legacy;
|
||||
dev->vdev.big_endian = qtest_big_endian(dev->pdev->bus->qts);
|
||||
}
|
||||
|
||||
static void qvirtio_pci_init_from_pcidev(QVirtioPCIDevice *dev, QPCIDevice *pci_dev)
|
||||
{
|
||||
dev->pdev = pci_dev;
|
||||
dev->config_msix_entry = -1;
|
||||
|
||||
if (!qvirtio_pci_init_virtio_1(dev)) {
|
||||
qvirtio_pci_init_legacy(dev);
|
||||
}
|
||||
|
||||
/* each virtio-xxx-pci device should override at least this function */
|
||||
dev->obj.get_driver = NULL;
|
||||
dev->obj.start_hw = qvirtio_pci_start_hw;
|
||||
dev->obj.destructor = qvirtio_pci_destructor;
|
||||
}
|
||||
|
||||
void virtio_pci_init(QVirtioPCIDevice *dev, QPCIBus *bus, QPCIAddress * addr)
|
||||
{
|
||||
QPCIDevice *pci_dev = qpci_device_find(bus, addr->devfn);
|
||||
g_assert_nonnull(pci_dev);
|
||||
qvirtio_pci_init_from_pcidev(dev, pci_dev);
|
||||
}
|
||||
|
||||
QVirtioPCIDevice *virtio_pci_new(QPCIBus *bus, QPCIAddress * addr)
|
||||
{
|
||||
QVirtioPCIDevice *dev;
|
||||
QPCIDevice *pci_dev = qpci_device_find(bus, addr->devfn);
|
||||
if (!pci_dev) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
dev = g_new0(QVirtioPCIDevice, 1);
|
||||
qvirtio_pci_init_from_pcidev(dev, pci_dev);
|
||||
dev->obj.free = g_free;
|
||||
return dev;
|
||||
}
|
||||
86
tests/qtest/libqos/virtio-pci.h
Normal file
86
tests/qtest/libqos/virtio-pci.h
Normal file
|
|
@ -0,0 +1,86 @@
|
|||
/*
|
||||
* libqos virtio PCI definitions
|
||||
*
|
||||
* Copyright (c) 2014 Marc Marí
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*/
|
||||
|
||||
#ifndef LIBQOS_VIRTIO_PCI_H
|
||||
#define LIBQOS_VIRTIO_PCI_H
|
||||
|
||||
#include "libqos/virtio.h"
|
||||
#include "libqos/pci.h"
|
||||
#include "libqos/qgraph.h"
|
||||
|
||||
typedef struct QVirtioPCIMSIXOps QVirtioPCIMSIXOps;
|
||||
|
||||
typedef struct QVirtioPCIDevice {
|
||||
QOSGraphObject obj;
|
||||
QVirtioDevice vdev;
|
||||
QPCIDevice *pdev;
|
||||
QPCIBar bar;
|
||||
const QVirtioPCIMSIXOps *msix_ops;
|
||||
uint16_t config_msix_entry;
|
||||
uint64_t config_msix_addr;
|
||||
uint32_t config_msix_data;
|
||||
|
||||
int bar_idx;
|
||||
|
||||
/* VIRTIO 1.0 */
|
||||
uint32_t common_cfg_offset;
|
||||
uint32_t notify_cfg_offset;
|
||||
uint32_t notify_off_multiplier;
|
||||
uint32_t isr_cfg_offset;
|
||||
uint32_t device_cfg_offset;
|
||||
} QVirtioPCIDevice;
|
||||
|
||||
struct QVirtioPCIMSIXOps {
|
||||
/* Set the Configuration Vector for MSI-X */
|
||||
void (*set_config_vector)(QVirtioPCIDevice *d, uint16_t entry);
|
||||
|
||||
/* Set the Queue Vector for MSI-X */
|
||||
void (*set_queue_vector)(QVirtioPCIDevice *d, uint16_t vq_idx,
|
||||
uint16_t entry);
|
||||
};
|
||||
|
||||
typedef struct QVirtQueuePCI {
|
||||
QVirtQueue vq;
|
||||
uint16_t msix_entry;
|
||||
uint64_t msix_addr;
|
||||
uint32_t msix_data;
|
||||
|
||||
/* VIRTIO 1.0 */
|
||||
uint64_t notify_offset;
|
||||
} QVirtQueuePCI;
|
||||
|
||||
void virtio_pci_init(QVirtioPCIDevice *dev, QPCIBus *bus, QPCIAddress * addr);
|
||||
QVirtioPCIDevice *virtio_pci_new(QPCIBus *bus, QPCIAddress * addr);
|
||||
|
||||
/* virtio-pci object functions available for subclasses that
|
||||
* override the original start_hw and destroy
|
||||
* function. All virtio-xxx-pci subclass that override must
|
||||
* take care of calling these two functions in the respective
|
||||
* places
|
||||
*/
|
||||
void qvirtio_pci_destructor(QOSGraphObject *obj);
|
||||
void qvirtio_pci_start_hw(QOSGraphObject *obj);
|
||||
|
||||
|
||||
void qvirtio_pci_device_enable(QVirtioPCIDevice *d);
|
||||
void qvirtio_pci_device_disable(QVirtioPCIDevice *d);
|
||||
|
||||
void qvirtio_pci_set_msix_configuration_vector(QVirtioPCIDevice *d,
|
||||
QGuestAllocator *alloc, uint16_t entry);
|
||||
void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d, QVirtQueuePCI *vqpci,
|
||||
QGuestAllocator *alloc, uint16_t entry);
|
||||
|
||||
/* Used by Legacy and Modern virtio-pci code */
|
||||
QVirtQueue *qvirtio_pci_virtqueue_setup_common(QVirtioDevice *d,
|
||||
QGuestAllocator *alloc,
|
||||
uint16_t index);
|
||||
void qvirtio_pci_virtqueue_cleanup_common(QVirtQueue *vq,
|
||||
QGuestAllocator *alloc);
|
||||
|
||||
#endif
|
||||
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