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target-xtensa: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUXtensaState/g" target-xtensa/*.[hc] sed -i "s/#define CPUXtensaState/#define CPUState/" target-xtensa/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Andreas Färber
parent
eb23b556aa
commit
97129ac899
4 changed files with 68 additions and 68 deletions
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@ -33,7 +33,7 @@
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#include "hw/loader.h"
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#endif
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static void reset_mmu(CPUState *env);
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static void reset_mmu(CPUXtensaState *env);
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void cpu_state_reset(CPUXtensaState *env)
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{
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@ -57,7 +57,7 @@ void xtensa_register_core(XtensaConfigList *node)
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xtensa_cores = node;
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}
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static uint32_t check_hw_breakpoints(CPUState *env)
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static uint32_t check_hw_breakpoints(CPUXtensaState *env)
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{
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unsigned i;
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@ -72,7 +72,7 @@ static uint32_t check_hw_breakpoints(CPUState *env)
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static CPUDebugExcpHandler *prev_debug_excp_handler;
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static void breakpoint_handler(CPUState *env)
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static void breakpoint_handler(CPUXtensaState *env)
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{
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if (env->watchpoint_hit) {
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if (env->watchpoint_hit->flags & BP_CPU) {
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@ -139,7 +139,7 @@ void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf)
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}
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}
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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target_phys_addr_t cpu_get_phys_page_debug(CPUXtensaState *env, target_ulong addr)
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{
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uint32_t paddr;
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uint32_t page_size;
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@ -156,7 +156,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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return ~0;
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}
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static uint32_t relocated_vector(CPUState *env, uint32_t vector)
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static uint32_t relocated_vector(CPUXtensaState *env, uint32_t vector)
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{
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if (xtensa_option_enabled(env->config,
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XTENSA_OPTION_RELOCATABLE_VECTOR)) {
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@ -172,7 +172,7 @@ static uint32_t relocated_vector(CPUState *env, uint32_t vector)
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* For the level-1 interrupt convert it to either user, kernel or double
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* exception with the 'level-1 interrupt' exception cause.
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*/
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static void handle_interrupt(CPUState *env)
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static void handle_interrupt(CPUXtensaState *env)
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{
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int level = env->pending_irq_level;
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@ -209,7 +209,7 @@ static void handle_interrupt(CPUState *env)
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}
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}
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void do_interrupt(CPUState *env)
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void do_interrupt(CPUXtensaState *env)
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{
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if (env->exception_index == EXC_IRQ) {
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qemu_log_mask(CPU_LOG_INT,
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@ -260,7 +260,7 @@ void do_interrupt(CPUState *env)
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check_interrupts(env);
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}
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static void reset_tlb_mmu_all_ways(CPUState *env,
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static void reset_tlb_mmu_all_ways(CPUXtensaState *env,
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const xtensa_tlb *tlb, xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
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{
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unsigned wi, ei;
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@ -273,7 +273,7 @@ static void reset_tlb_mmu_all_ways(CPUState *env,
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}
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}
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static void reset_tlb_mmu_ways56(CPUState *env,
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static void reset_tlb_mmu_ways56(CPUXtensaState *env,
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const xtensa_tlb *tlb, xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
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{
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if (!tlb->varway56) {
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@ -320,7 +320,7 @@ static void reset_tlb_mmu_ways56(CPUState *env,
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}
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}
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static void reset_tlb_region_way0(CPUState *env,
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static void reset_tlb_region_way0(CPUXtensaState *env,
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xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
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{
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unsigned ei;
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@ -334,7 +334,7 @@ static void reset_tlb_region_way0(CPUState *env,
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}
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}
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static void reset_mmu(CPUState *env)
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static void reset_mmu(CPUXtensaState *env)
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{
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if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
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env->sregs[RASID] = 0x04030201;
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@ -351,7 +351,7 @@ static void reset_mmu(CPUState *env)
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}
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}
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static unsigned get_ring(const CPUState *env, uint8_t asid)
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static unsigned get_ring(const CPUXtensaState *env, uint8_t asid)
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{
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unsigned i;
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for (i = 0; i < 4; ++i) {
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@ -371,7 +371,7 @@ static unsigned get_ring(const CPUState *env, uint8_t asid)
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* \param pring: [out] access ring
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* \return 0 if ok, exception cause code otherwise
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*/
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int xtensa_tlb_lookup(const CPUState *env, uint32_t addr, bool dtlb,
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int xtensa_tlb_lookup(const CPUXtensaState *env, uint32_t addr, bool dtlb,
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uint32_t *pwi, uint32_t *pei, uint8_t *pring)
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{
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const xtensa_tlb *tlb = dtlb ?
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@ -458,10 +458,10 @@ static bool is_access_granted(unsigned access, int is_write)
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}
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}
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static int autorefill_mmu(CPUState *env, uint32_t vaddr, bool dtlb,
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static int autorefill_mmu(CPUXtensaState *env, uint32_t vaddr, bool dtlb,
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uint32_t *wi, uint32_t *ei, uint8_t *ring);
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static int get_physical_addr_mmu(CPUState *env,
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static int get_physical_addr_mmu(CPUXtensaState *env,
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uint32_t vaddr, int is_write, int mmu_idx,
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uint32_t *paddr, uint32_t *page_size, unsigned *access)
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{
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@ -504,7 +504,7 @@ static int get_physical_addr_mmu(CPUState *env,
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return 0;
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}
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static int autorefill_mmu(CPUState *env, uint32_t vaddr, bool dtlb,
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static int autorefill_mmu(CPUXtensaState *env, uint32_t vaddr, bool dtlb,
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uint32_t *wi, uint32_t *ei, uint8_t *ring)
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{
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uint32_t paddr;
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@ -532,7 +532,7 @@ static int autorefill_mmu(CPUState *env, uint32_t vaddr, bool dtlb,
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return ret;
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}
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static int get_physical_addr_region(CPUState *env,
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static int get_physical_addr_region(CPUXtensaState *env,
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uint32_t vaddr, int is_write, int mmu_idx,
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uint32_t *paddr, uint32_t *page_size, unsigned *access)
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{
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@ -563,7 +563,7 @@ static int get_physical_addr_region(CPUState *env,
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*
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* \return 0 if ok, exception cause code otherwise
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*/
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int xtensa_get_physical_addr(CPUState *env,
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int xtensa_get_physical_addr(CPUXtensaState *env,
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uint32_t vaddr, int is_write, int mmu_idx,
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uint32_t *paddr, uint32_t *page_size, unsigned *access)
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{
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@ -584,7 +584,7 @@ int xtensa_get_physical_addr(CPUState *env,
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}
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static void dump_tlb(FILE *f, fprintf_function cpu_fprintf,
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CPUState *env, bool dtlb)
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CPUXtensaState *env, bool dtlb)
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{
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unsigned wi, ei;
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const xtensa_tlb *conf =
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@ -634,7 +634,7 @@ static void dump_tlb(FILE *f, fprintf_function cpu_fprintf,
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}
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}
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void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env)
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void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env)
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{
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if (xtensa_option_bits_enabled(env->config,
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XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
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