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tcg: Convert remu to TCGOutOpBinary
For TCI, we're losing type information in the interpreter. Introduce a tci-specific opcode to handle the difference. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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25 changed files with 112 additions and 101 deletions
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@ -1887,6 +1887,27 @@ static const TCGOutOpBinary outop_rems = {
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.out_rrr = tgen_rems,
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};
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static void tgen_remu(TCGContext *s, TCGType type,
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TCGReg a0, TCGReg a1, TCGReg a2)
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{
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if (use_mips32r6_instructions) {
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if (type == TCG_TYPE_I32) {
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tcg_out_opc_reg(s, OPC_MODU, a0, a1, a2);
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} else {
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tcg_out_opc_reg(s, OPC_DMODU, a0, a1, a2);
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}
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} else {
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MIPSInsn insn = type == TCG_TYPE_I32 ? OPC_DIVU : OPC_DDIVU;
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tcg_out_opc_reg(s, insn, 0, a1, a2);
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tcg_out_opc_reg(s, OPC_MFHI, a0, 0, 0);
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}
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}
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static const TCGOutOpBinary outop_remu = {
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.base.static_constraint = C_O1_I2(r, r, r),
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.out_rrr = tgen_remu,
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};
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static void tgen_sub(TCGContext *s, TCGType type,
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TCGReg a0, TCGReg a1, TCGReg a2)
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{
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@ -2010,24 +2031,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
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tcg_out_ldst(s, i1, a0, a1, a2);
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break;
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case INDEX_op_remu_i32:
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if (use_mips32r6_instructions) {
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tcg_out_opc_reg(s, OPC_MODU, a0, a1, a2);
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break;
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}
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i1 = OPC_DIVU, i2 = OPC_MFHI;
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goto do_hilo1;
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case INDEX_op_remu_i64:
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if (use_mips32r6_instructions) {
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tcg_out_opc_reg(s, OPC_DMODU, a0, a1, a2);
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break;
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}
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i1 = OPC_DDIVU, i2 = OPC_MFHI;
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do_hilo1:
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tcg_out_opc_reg(s, i1, 0, a1, a2);
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tcg_out_opc_reg(s, i2, a0, 0, 0);
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break;
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case INDEX_op_muls2_i32:
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i1 = OPC_MULT;
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goto do_hilo2;
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@ -2282,9 +2285,7 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags)
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case INDEX_op_st_i64:
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return C_O0_I2(rz, r);
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case INDEX_op_remu_i32:
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case INDEX_op_setcond_i32:
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case INDEX_op_remu_i64:
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case INDEX_op_setcond_i64:
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return C_O1_I2(r, rz, rz);
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case INDEX_op_muls2_i32:
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