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tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h'

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Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-03-23 18:45:29 +01:00 • committed by Richard Henderson
parent 8201f1a29c
commit 9638cb59ee
4 changed files with 43 additions and 28 deletions
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41
accel/tcg/backend-ldst.h Normal file
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@ -0,0 +1,41 @@
/*
* Internal memory barrier helpers for QEMU (target agnostic)
*
* Copyright (c) 2003 Fabrice Bellard
*
* SPDX-License-Identifier: LGPL-2.1-or-later
*/
#ifndef ACCEL_TCG_BACKEND_LDST_H
#define ACCEL_TCG_BACKEND_LDST_H
#include "tcg-target-mo.h"
/**
* tcg_req_mo:
* @guest_mo: Guest default memory order
* @type: TCGBar
*
* Filter @type to the barrier that is required for the guest
* memory ordering vs the host memory ordering. A non-zero
* result indicates that some barrier is required.
*/
#define tcg_req_mo(guest_mo, type) \
((type) & guest_mo & ~TCG_TARGET_DEFAULT_MO)
/**
* cpu_req_mo:
* @cpu: CPUState
* @type: TCGBar
*
* If tcg_req_mo indicates a barrier for @type is required
* for the guest memory model, issue a host memory barrier.
*/
#define cpu_req_mo(cpu, type) \
do { \
if (tcg_req_mo(cpu->cc->tcg_ops->guest_default_memory_order, type)) { \
smp_mb(); \
} \
} while (0)
#endif

1
accel/tcg/cputlb.c
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@ -48,6 +48,7 @@
#include "qemu/plugin-memory.h" #include "qemu/plugin-memory.h"
#endif #endif
#include "tcg/tcg-ldst.h" #include "tcg/tcg-ldst.h"
#include "backend-ldst.h"
/* DEBUG defines, enable DEBUG_TLB_LOG to log to the CPU_LOG_MMU target */ /* DEBUG defines, enable DEBUG_TLB_LOG to log to the CPU_LOG_MMU target */

28
accel/tcg/internal-target.h
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@ -13,7 +13,6 @@
#include "exec/exec-all.h" #include "exec/exec-all.h"
#include "exec/translation-block.h" #include "exec/translation-block.h"
#include "tb-internal.h" #include "tb-internal.h"
#include "tcg-target-mo.h"
#include "exec/mmap-lock.h" #include "exec/mmap-lock.h"
/* /*
@ -44,31 +43,4 @@ void page_table_config_init(void);
G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
#endif /* CONFIG_USER_ONLY */ #endif /* CONFIG_USER_ONLY */
/**
* tcg_req_mo:
* @guest_mo: Guest default memory order
* @type: TCGBar
*
* Filter @type to the barrier that is required for the guest
* memory ordering vs the host memory ordering. A non-zero
* result indicates that some barrier is required.
*/
#define tcg_req_mo(guest_mo, type) \
((type) & guest_mo & ~TCG_TARGET_DEFAULT_MO)
/**
* cpu_req_mo:
* @cpu: CPUState
* @type: TCGBar
*
* If tcg_req_mo indicates a barrier for @type is required
* for the guest memory model, issue a host memory barrier.
*/
#define cpu_req_mo(cpu, type) \
do { \
if (tcg_req_mo(cpu->cc->tcg_ops->guest_default_memory_order, type)) { \
smp_mb(); \
} \
} while (0)
#endif /* ACCEL_TCG_INTERNAL_H */ #endif /* ACCEL_TCG_INTERNAL_H */

1
accel/tcg/user-exec.c
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@ -37,6 +37,7 @@
#include "qemu/int128.h" #include "qemu/int128.h"
#include "trace.h" #include "trace.h"
#include "tcg/tcg-ldst.h" #include "tcg/tcg-ldst.h"
#include "backend-ldst.h"
#include "internal-common.h" #include "internal-common.h"
#include "internal-target.h" #include "internal-target.h"
#include "tb-internal.h" #include "tb-internal.h"