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target/loongarch: Add fixed point atomic instruction translation

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This includes:
- LL.{W/D}, SC.{W/D}
- AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[_DB].{W/D}
- AM{MAX/MIN}[_DB].{WU/DU}

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-9-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Song Gao 2022-06-06 20:42:58 +08:00 • committed by Richard Henderson
parent bb79174d4e
commit 94b02d57b0
4 changed files with 159 additions and 1 deletions
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44
target/loongarch/insns.decode
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@ -193,3 +193,47 @@ stle_b 0011 10000111 11100 ..... ..... ..... @rrr
stle_h 0011 10000111 11101 ..... ..... ..... @rrr
stle_w 0011 10000111 11110 ..... ..... ..... @rrr
stle_d 0011 10000111 11111 ..... ..... ..... @rrr
#
# Fixed point atomic instruction
#
ll_w 0010 0000 .............. ..... ..... @rr_i14s2
sc_w 0010 0001 .............. ..... ..... @rr_i14s2
ll_d 0010 0010 .............. ..... ..... @rr_i14s2
sc_d 0010 0011 .............. ..... ..... @rr_i14s2
amswap_w 0011 10000110 00000 ..... ..... ..... @rrr
amswap_d 0011 10000110 00001 ..... ..... ..... @rrr
amadd_w 0011 10000110 00010 ..... ..... ..... @rrr
amadd_d 0011 10000110 00011 ..... ..... ..... @rrr
amand_w 0011 10000110 00100 ..... ..... ..... @rrr
amand_d 0011 10000110 00101 ..... ..... ..... @rrr
amor_w 0011 10000110 00110 ..... ..... ..... @rrr
amor_d 0011 10000110 00111 ..... ..... ..... @rrr
amxor_w 0011 10000110 01000 ..... ..... ..... @rrr
amxor_d 0011 10000110 01001 ..... ..... ..... @rrr
ammax_w 0011 10000110 01010 ..... ..... ..... @rrr
ammax_d 0011 10000110 01011 ..... ..... ..... @rrr
ammin_w 0011 10000110 01100 ..... ..... ..... @rrr
ammin_d 0011 10000110 01101 ..... ..... ..... @rrr
ammax_wu 0011 10000110 01110 ..... ..... ..... @rrr
ammax_du 0011 10000110 01111 ..... ..... ..... @rrr
ammin_wu 0011 10000110 10000 ..... ..... ..... @rrr
ammin_du 0011 10000110 10001 ..... ..... ..... @rrr
amswap_db_w 0011 10000110 10010 ..... ..... ..... @rrr
amswap_db_d 0011 10000110 10011 ..... ..... ..... @rrr
amadd_db_w 0011 10000110 10100 ..... ..... ..... @rrr
amadd_db_d 0011 10000110 10101 ..... ..... ..... @rrr
amand_db_w 0011 10000110 10110 ..... ..... ..... @rrr
amand_db_d 0011 10000110 10111 ..... ..... ..... @rrr
amor_db_w 0011 10000110 11000 ..... ..... ..... @rrr
amor_db_d 0011 10000110 11001 ..... ..... ..... @rrr
amxor_db_w 0011 10000110 11010 ..... ..... ..... @rrr
amxor_db_d 0011 10000110 11011 ..... ..... ..... @rrr
ammax_db_w 0011 10000110 11100 ..... ..... ..... @rrr
ammax_db_d 0011 10000110 11101 ..... ..... ..... @rrr
ammin_db_w 0011 10000110 11110 ..... ..... ..... @rrr
ammin_db_d 0011 10000110 11111 ..... ..... ..... @rrr
ammax_db_wu 0011 10000111 00000 ..... ..... ..... @rrr
ammax_db_du 0011 10000111 00001 ..... ..... ..... @rrr
ammin_db_wu 0011 10000111 00010 ..... ..... ..... @rrr
ammin_db_du 0011 10000111 00011 ..... ..... ..... @rrr