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nvic: In escalation to HardFault, support HF not being priority -1
When escalating to HardFault, we must go into Lockup if we can't take the synchronous HardFault because the current execution priority is already at or below the priority of HardFault. In v7M HF is always priority -1 so a simple < 0 comparison sufficed; in v8M the priority of HardFault can vary depending on whether it is a Secure or NonSecure HardFault, so we must check against the priority of the HardFault exception vector we're about to use. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-13-git-send-email-peter.maydell@linaro.org
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1 changed files with 12 additions and 11 deletions
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@ -487,18 +487,8 @@ void armv7m_nvic_set_pending(void *opaque, int irq, bool secure)
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}
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if (escalate) {
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if (running < 0) {
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/* We want to escalate to HardFault but we can't take a
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* synchronous HardFault at this point either. This is a
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* Lockup condition due to a guest bug. We don't model
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* Lockup, so report via cpu_abort() instead.
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*/
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cpu_abort(&s->cpu->parent_obj,
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"Lockup: can't escalate %d to HardFault "
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"(current priority %d)\n", irq, running);
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}
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/* We can do the escalation, so we take HardFault instead.
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/* We need to escalate this exception to a synchronous HardFault.
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* If BFHFNMINS is set then we escalate to the banked HF for
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* the target security state of the original exception; otherwise
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* we take a Secure HardFault.
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@ -511,6 +501,17 @@ void armv7m_nvic_set_pending(void *opaque, int irq, bool secure)
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} else {
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vec = &s->vectors[irq];
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}
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if (running <= vec->prio) {
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/* We want to escalate to HardFault but we can't take the
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* synchronous HardFault at this point either. This is a
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* Lockup condition due to a guest bug. We don't model
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* Lockup, so report via cpu_abort() instead.
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*/
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cpu_abort(&s->cpu->parent_obj,
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"Lockup: can't escalate %d to HardFault "
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"(current priority %d)\n", irq, running);
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}
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/* HF may be banked but there is only one shared HFSR */
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s->cpu->env.v7m.hfsr |= R_V7M_HFSR_FORCED_MASK;
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}
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