mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-07 01:33:56 -06:00
qdev/isa: convert ne2000
Also split the isa bits into a separate source file, so we don't drag in a dependency for isa-bus.o for machines which want ne2k_pci only. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
parent
9df34396d5
commit
9453c5bc26
8 changed files with 170 additions and 93 deletions
99
hw/ne2000.c
99
hw/ne2000.c
|
@ -25,6 +25,7 @@
|
|||
#include "pci.h"
|
||||
#include "pc.h"
|
||||
#include "net.h"
|
||||
#include "ne2000.h"
|
||||
|
||||
/* debug NE2000 card */
|
||||
//#define DEBUG_NE2000
|
||||
|
@ -116,42 +117,12 @@
|
|||
#define ENTSR_CDH 0x40 /* The collision detect "heartbeat" signal was lost. */
|
||||
#define ENTSR_OWC 0x80 /* There was an out-of-window collision. */
|
||||
|
||||
#define NE2000_PMEM_SIZE (32*1024)
|
||||
#define NE2000_PMEM_START (16*1024)
|
||||
#define NE2000_PMEM_END (NE2000_PMEM_SIZE+NE2000_PMEM_START)
|
||||
#define NE2000_MEM_SIZE NE2000_PMEM_END
|
||||
|
||||
typedef struct NE2000State {
|
||||
uint8_t cmd;
|
||||
uint32_t start;
|
||||
uint32_t stop;
|
||||
uint8_t boundary;
|
||||
uint8_t tsr;
|
||||
uint8_t tpsr;
|
||||
uint16_t tcnt;
|
||||
uint16_t rcnt;
|
||||
uint32_t rsar;
|
||||
uint8_t rsr;
|
||||
uint8_t rxcr;
|
||||
uint8_t isr;
|
||||
uint8_t dcfg;
|
||||
uint8_t imr;
|
||||
uint8_t phys[6]; /* mac address */
|
||||
uint8_t curpag;
|
||||
uint8_t mult[8]; /* multicast mask array */
|
||||
qemu_irq irq;
|
||||
int isa_io_base;
|
||||
VLANClientState *vc;
|
||||
uint8_t macaddr[6];
|
||||
uint8_t mem[NE2000_MEM_SIZE];
|
||||
} NE2000State;
|
||||
|
||||
typedef struct PCINE2000State {
|
||||
PCIDevice dev;
|
||||
NE2000State ne2000;
|
||||
} PCINE2000State;
|
||||
|
||||
static void ne2000_reset(NE2000State *s)
|
||||
void ne2000_reset(NE2000State *s)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
@ -217,7 +188,7 @@ static int ne2000_buffer_full(NE2000State *s)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ne2000_can_receive(VLANClientState *vc)
|
||||
int ne2000_can_receive(VLANClientState *vc)
|
||||
{
|
||||
NE2000State *s = vc->opaque;
|
||||
|
||||
|
@ -228,7 +199,7 @@ static int ne2000_can_receive(VLANClientState *vc)
|
|||
|
||||
#define MIN_BUF_SIZE 60
|
||||
|
||||
static ssize_t ne2000_receive(VLANClientState *vc, const uint8_t *buf, size_t size_)
|
||||
ssize_t ne2000_receive(VLANClientState *vc, const uint8_t *buf, size_t size_)
|
||||
{
|
||||
NE2000State *s = vc->opaque;
|
||||
int size = size_;
|
||||
|
@ -325,7 +296,7 @@ static ssize_t ne2000_receive(VLANClientState *vc, const uint8_t *buf, size_t si
|
|||
return size_;
|
||||
}
|
||||
|
||||
static void ne2000_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
||||
void ne2000_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
||||
{
|
||||
NE2000State *s = opaque;
|
||||
int offset, page, index;
|
||||
|
@ -422,7 +393,7 @@ static void ne2000_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
|||
}
|
||||
}
|
||||
|
||||
static uint32_t ne2000_ioport_read(void *opaque, uint32_t addr)
|
||||
uint32_t ne2000_ioport_read(void *opaque, uint32_t addr)
|
||||
{
|
||||
NE2000State *s = opaque;
|
||||
int offset, page, ret;
|
||||
|
@ -572,7 +543,7 @@ static inline void ne2000_dma_update(NE2000State *s, int len)
|
|||
}
|
||||
}
|
||||
|
||||
static void ne2000_asic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
||||
void ne2000_asic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
||||
{
|
||||
NE2000State *s = opaque;
|
||||
|
||||
|
@ -592,7 +563,7 @@ static void ne2000_asic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
|||
}
|
||||
}
|
||||
|
||||
static uint32_t ne2000_asic_ioport_read(void *opaque, uint32_t addr)
|
||||
uint32_t ne2000_asic_ioport_read(void *opaque, uint32_t addr)
|
||||
{
|
||||
NE2000State *s = opaque;
|
||||
int ret;
|
||||
|
@ -640,19 +611,19 @@ static uint32_t ne2000_asic_ioport_readl(void *opaque, uint32_t addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void ne2000_reset_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
||||
void ne2000_reset_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
||||
{
|
||||
/* nothing to do (end of reset pulse) */
|
||||
}
|
||||
|
||||
static uint32_t ne2000_reset_ioport_read(void *opaque, uint32_t addr)
|
||||
uint32_t ne2000_reset_ioport_read(void *opaque, uint32_t addr)
|
||||
{
|
||||
NE2000State *s = opaque;
|
||||
ne2000_reset(s);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ne2000_save(QEMUFile* f, void* opaque)
|
||||
void ne2000_save(QEMUFile* f, void* opaque)
|
||||
{
|
||||
NE2000State* s = opaque;
|
||||
uint32_t tmp;
|
||||
|
@ -680,7 +651,7 @@ static void ne2000_save(QEMUFile* f, void* opaque)
|
|||
qemu_put_buffer(f, s->mem, NE2000_MEM_SIZE);
|
||||
}
|
||||
|
||||
static int ne2000_load(QEMUFile* f, void* opaque, int version_id)
|
||||
int ne2000_load(QEMUFile* f, void* opaque, int version_id)
|
||||
{
|
||||
NE2000State* s = opaque;
|
||||
uint32_t tmp;
|
||||
|
@ -741,52 +712,6 @@ static int pci_ne2000_load(QEMUFile* f, void* opaque, int version_id)
|
|||
return ne2000_load(f, &s->ne2000, version_id);
|
||||
}
|
||||
|
||||
static void isa_ne2000_cleanup(VLANClientState *vc)
|
||||
{
|
||||
NE2000State *s = vc->opaque;
|
||||
|
||||
unregister_savevm("ne2000", s);
|
||||
|
||||
isa_unassign_ioport(s->isa_io_base, 16);
|
||||
isa_unassign_ioport(s->isa_io_base + 0x10, 2);
|
||||
isa_unassign_ioport(s->isa_io_base + 0x1f, 1);
|
||||
|
||||
qemu_free(s);
|
||||
}
|
||||
|
||||
void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd)
|
||||
{
|
||||
NE2000State *s;
|
||||
|
||||
qemu_check_nic_model(nd, "ne2k_isa");
|
||||
|
||||
s = qemu_mallocz(sizeof(NE2000State));
|
||||
|
||||
register_ioport_write(base, 16, 1, ne2000_ioport_write, s);
|
||||
register_ioport_read(base, 16, 1, ne2000_ioport_read, s);
|
||||
|
||||
register_ioport_write(base + 0x10, 1, 1, ne2000_asic_ioport_write, s);
|
||||
register_ioport_read(base + 0x10, 1, 1, ne2000_asic_ioport_read, s);
|
||||
register_ioport_write(base + 0x10, 2, 2, ne2000_asic_ioport_write, s);
|
||||
register_ioport_read(base + 0x10, 2, 2, ne2000_asic_ioport_read, s);
|
||||
|
||||
register_ioport_write(base + 0x1f, 1, 1, ne2000_reset_ioport_write, s);
|
||||
register_ioport_read(base + 0x1f, 1, 1, ne2000_reset_ioport_read, s);
|
||||
s->isa_io_base = base;
|
||||
s->irq = irq;
|
||||
memcpy(s->macaddr, nd->macaddr, 6);
|
||||
|
||||
ne2000_reset(s);
|
||||
|
||||
s->vc = nd->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
|
||||
ne2000_can_receive, ne2000_receive,
|
||||
NULL, isa_ne2000_cleanup, s);
|
||||
|
||||
qemu_format_nic_info_str(s->vc, s->macaddr);
|
||||
|
||||
register_savevm("ne2000", -1, 2, ne2000_save, ne2000_load, s);
|
||||
}
|
||||
|
||||
/***********************************************************/
|
||||
/* PCI NE2000 definitions */
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue