aspeed: introduce a new UART0 device name

The Aspeed datasheet refers to the UART controllers
as UART1 - UART13 for the ast10x0, ast2600, ast2500
and ast2400 SoCs and the Aspeed ast2700 introduces an UART0
and the UART controllers as UART0 - UART12.

To keep the naming in the QEMU models
in sync with the datasheet, let's introduce a new  UART0 device name
and do the required adjustements.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[ clg: - Kept original assert() in aspeed_soc_uart_set_chr()
       - Fixed 'i' range in connect_serial_hds_to_uarts() loop ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Jamin Lin 2024-02-15 15:53:30 +08:00 committed by Cédric Le Goater
parent 1b330dafcd
commit 944128ee8e
6 changed files with 33 additions and 7 deletions

View file

@ -140,6 +140,7 @@ struct AspeedSoCClass {
int wdts_num;
int macs_num;
int uarts_num;
int uarts_base;
const int *irqmap;
const hwaddr *memmap;
uint32_t num_cpus;
@ -151,6 +152,7 @@ const char *aspeed_soc_cpu_type(AspeedSoCClass *sc);
enum {
ASPEED_DEV_SPI_BOOT,
ASPEED_DEV_IOMEM,
ASPEED_DEV_UART0,
ASPEED_DEV_UART1,
ASPEED_DEV_UART2,
ASPEED_DEV_UART3,
@ -235,4 +237,19 @@ void aspeed_mmio_map_unimplemented(AspeedSoCState *s, SysBusDevice *dev,
void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
unsigned int count, int unit0);
static inline int aspeed_uart_index(int uart_dev)
{
return uart_dev - ASPEED_DEV_UART0;
}
static inline int aspeed_uart_first(AspeedSoCClass *sc)
{
return aspeed_uart_index(sc->uarts_base);
}
static inline int aspeed_uart_last(AspeedSoCClass *sc)
{
return aspeed_uart_first(sc) + sc->uarts_num - 1;
}
#endif /* ASPEED_SOC_H */