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Rename CPUState -> CPUArchState
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
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parent
5bfcb36ec4
commit
9349b4f9fd
59 changed files with 419 additions and 419 deletions
16
cpu-exec.c
16
cpu-exec.c
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@ -26,12 +26,12 @@ int tb_invalidated_flag;
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//#define CONFIG_DEBUG_EXEC
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bool qemu_cpu_has_work(CPUState *env)
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bool qemu_cpu_has_work(CPUArchState *env)
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{
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return cpu_has_work(env);
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}
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void cpu_loop_exit(CPUState *env)
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void cpu_loop_exit(CPUArchState *env)
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{
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env->current_tb = NULL;
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longjmp(env->jmp_env, 1);
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@ -41,7 +41,7 @@ void cpu_loop_exit(CPUState *env)
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restored in a state compatible with the CPU emulator
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*/
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#if defined(CONFIG_SOFTMMU)
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void cpu_resume_from_signal(CPUState *env, void *puc)
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void cpu_resume_from_signal(CPUArchState *env, void *puc)
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{
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/* XXX: restore cpu registers saved in host registers */
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@ -52,7 +52,7 @@ void cpu_resume_from_signal(CPUState *env, void *puc)
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/* Execute the code without caching the generated code. An interpreter
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could be used if available. */
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static void cpu_exec_nocache(CPUState *env, int max_cycles,
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static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
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TranslationBlock *orig_tb)
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{
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unsigned long next_tb;
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@ -79,7 +79,7 @@ static void cpu_exec_nocache(CPUState *env, int max_cycles,
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tb_free(tb);
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}
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static TranslationBlock *tb_find_slow(CPUState *env,
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static TranslationBlock *tb_find_slow(CPUArchState *env,
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target_ulong pc,
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target_ulong cs_base,
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uint64_t flags)
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@ -135,7 +135,7 @@ static TranslationBlock *tb_find_slow(CPUState *env,
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return tb;
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}
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static inline TranslationBlock *tb_find_fast(CPUState *env)
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static inline TranslationBlock *tb_find_fast(CPUArchState *env)
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{
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TranslationBlock *tb;
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target_ulong cs_base, pc;
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@ -163,7 +163,7 @@ CPUDebugExcpHandler *cpu_set_debug_excp_handler(CPUDebugExcpHandler *handler)
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return old_handler;
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}
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static void cpu_handle_debug_exception(CPUState *env)
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static void cpu_handle_debug_exception(CPUArchState *env)
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{
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CPUWatchpoint *wp;
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@ -181,7 +181,7 @@ static void cpu_handle_debug_exception(CPUState *env)
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volatile sig_atomic_t exit_request;
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int cpu_exec(CPUState *env)
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int cpu_exec(CPUArchState *env)
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{
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int ret, interrupt_request;
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TranslationBlock *tb;
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