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hw/arm: Add the USART to the stm32l4x5 SoC

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Add the USART to the SoC and connect it to the other implemented devices.

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240329174402.60382-5-arnaud.minier@telecom-paris.fr
[PMM: fixed a few checkpatch nits]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Arnaud Minier 2024-03-29 18:44:01 +01:00 • committed by Peter Maydell
parent c4c12ee487
commit 92741432ed
4 changed files with 86 additions and 7 deletions
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7
include/hw/arm/stm32l4x5_soc.h
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@ -31,6 +31,7 @@
#include "hw/misc/stm32l4x5_exti.h"
#include "hw/misc/stm32l4x5_rcc.h"
#include "hw/gpio/stm32l4x5_gpio.h"
#include "hw/char/stm32l4x5_usart.h"
#include "qom/object.h"
#define TYPE_STM32L4X5_SOC "stm32l4x5-soc"
@ -41,6 +42,9 @@ OBJECT_DECLARE_TYPE(Stm32l4x5SocState, Stm32l4x5SocClass, STM32L4X5_SOC)
#define NUM_EXTI_OR_GATES 4
#define STM_NUM_USARTS 3
#define STM_NUM_UARTS 2
struct Stm32l4x5SocState {
SysBusDevice parent_obj;
@ -51,6 +55,9 @@ struct Stm32l4x5SocState {
Stm32l4x5SyscfgState syscfg;
Stm32l4x5RccState rcc;
Stm32l4x5GpioState gpio[NUM_GPIOS];
Stm32l4x5UsartBaseState usart[STM_NUM_USARTS];
Stm32l4x5UsartBaseState uart[STM_NUM_UARTS];
Stm32l4x5UsartBaseState lpuart;
MemoryRegion sram1;
MemoryRegion sram2;