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arm: Don't set freq properties on CMSDK timer, dualtimer, watchdog, ARMSSE
Remove all the code that sets frequency properties on the CMSDK timer, dualtimer and watchdog devices and on the ARMSSE SoC device: these properties are unused now that the devices rely on their Clock inputs instead. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-24-peter.maydell@linaro.org Message-id: 20210121190622.22000-24-peter.maydell@linaro.org
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5 changed files with 0 additions and 15 deletions
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@ -727,7 +727,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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* it to the appropriate PPC port; then we can realize the PPC and
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* map its upstream ends to the right place in the container.
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*/
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qdev_prop_set_uint32(DEVICE(&s->timer0), "pclk-frq", s->mainclk_frq);
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qdev_connect_clock_in(DEVICE(&s->timer0), "pclk", s->mainclk);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer0), errp)) {
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return;
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@ -738,7 +737,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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object_property_set_link(OBJECT(&s->apb_ppc0), "port[0]", OBJECT(mr),
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&error_abort);
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qdev_prop_set_uint32(DEVICE(&s->timer1), "pclk-frq", s->mainclk_frq);
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qdev_connect_clock_in(DEVICE(&s->timer1), "pclk", s->mainclk);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer1), errp)) {
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return;
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@ -749,7 +747,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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object_property_set_link(OBJECT(&s->apb_ppc0), "port[1]", OBJECT(mr),
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&error_abort);
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qdev_prop_set_uint32(DEVICE(&s->dualtimer), "pclk-frq", s->mainclk_frq);
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qdev_connect_clock_in(DEVICE(&s->dualtimer), "TIMCLK", s->mainclk);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->dualtimer), errp)) {
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return;
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@ -908,7 +905,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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/* Devices behind APB PPC1:
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* 0x4002f000: S32K timer
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*/
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qdev_prop_set_uint32(DEVICE(&s->s32ktimer), "pclk-frq", S32KCLK);
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qdev_connect_clock_in(DEVICE(&s->s32ktimer), "pclk", s->s32kclk);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->s32ktimer), errp)) {
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return;
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@ -1002,7 +998,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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qdev_connect_gpio_out(DEVICE(&s->nmi_orgate), 0,
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qdev_get_gpio_in_named(DEVICE(&s->armv7m), "NMI", 0));
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qdev_prop_set_uint32(DEVICE(&s->s32kwatchdog), "wdogclk-frq", S32KCLK);
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qdev_connect_clock_in(DEVICE(&s->s32kwatchdog), "WDOGCLK", s->s32kclk);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->s32kwatchdog), errp)) {
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return;
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@ -1013,7 +1008,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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/* 0x40080000 .. 0x4008ffff : ARMSSE second Base peripheral region */
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qdev_prop_set_uint32(DEVICE(&s->nswatchdog), "wdogclk-frq", s->mainclk_frq);
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qdev_connect_clock_in(DEVICE(&s->nswatchdog), "WDOGCLK", s->mainclk);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->nswatchdog), errp)) {
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return;
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@ -1022,7 +1016,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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armsse_get_common_irq_in(s, 1));
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->nswatchdog), 0, 0x40081000);
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qdev_prop_set_uint32(DEVICE(&s->swatchdog), "wdogclk-frq", s->mainclk_frq);
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qdev_connect_clock_in(DEVICE(&s->swatchdog), "WDOGCLK", s->mainclk);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->swatchdog), errp)) {
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return;
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