motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 16:23:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

tcg/loongarch64: Do not accept constant argument to nor

Browse source 
The instruction set does not implement nor with immediate.
There is no reason to pretend that we do.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-06 20:37:25 -08:00
parent 59379a45af
commit 8fb04b8295
1 changed files with 2 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

10
tcg/loongarch64/tcg-target.c.inc
View file

@ -1425,12 +1425,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
case INDEX_op_nor_i32:
case INDEX_op_nor_i64:
if (c2) {
tcg_out_opc_ori(s, a0, a1, a2);
tcg_out_opc_nor(s, a0, a0, TCG_REG_ZERO);
} else {
tcg_out_opc_nor(s, a0, a1, a2);
}
tcg_out_opc_nor(s, a0, a1, a2);
break;
case INDEX_op_extract_i32:
@ -2314,8 +2309,7 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags)
case INDEX_op_nor_i32:
case INDEX_op_nor_i64:
/* LoongArch reg-imm bitops have their imms ZERO-extended */
return C_O1_I2(r, r, rU);
return C_O1_I2(r, r, r);
case INDEX_op_clz_i32:
case INDEX_op_clz_i64: