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hw/cxl: Introduce CXL_T3_MSIX_VECTOR enumeration
Introduce the `CXL_T3_MSIX_VECTOR` enumeration to specify MSIX vector assignments specific to the Type 3 (T3) CXL device. The primary goal of this change is to encapsulate the MSIX vector uses that are unique to the T3 device within an enumeration, improving code readability and maintenance by avoiding magic numbers. This organizational change allows for more explicit references to each vector’s role, thereby reducing the potential for misconfiguration. It also modified `mailbox_reg_init_common` to accept the `msi_n` parameter, reflecting the new MSIX vector setup. This pertains to the T3 device privately; other endpoints should refrain from using it, despite its public accessibility to all of them. Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250203161908.145406-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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4 changed files with 24 additions and 16 deletions
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@ -264,8 +264,8 @@ void cxl_device_register_block_init(Object *obj, CXLDeviceState *dev,
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typedef struct CXLType3Dev CXLType3Dev;
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typedef struct CSWMBCCIDev CSWMBCCIDev;
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/* Set up default values for the register block */
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void cxl_device_register_init_t3(CXLType3Dev *ct3d);
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void cxl_device_register_init_swcci(CSWMBCCIDev *sw);
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void cxl_device_register_init_t3(CXLType3Dev *ct3d, int msi_n);
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void cxl_device_register_init_swcci(CSWMBCCIDev *sw, int msi_n);
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/*
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* CXL r3.1 Section 8.2.8.1: CXL Device Capabilities Array Register
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