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i386: Populate AMD Processor Cache Information for cpuid 0x8000001D
Add information for cpuid 0x8000001D leaf. Populate cache topology information for different cache types (Data Cache, Instruction Cache, L2 and L3) supported by 0x8000001D leaf. Please refer to the Processor Programming Reference (PPR) for AMD Family 17h Model for more details. Signed-off-by: Babu Moger <babu.moger@amd.com> Message-Id: <1527176614-26271-3-git-send-email-babu.moger@amd.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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2 changed files with 143 additions and 3 deletions
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@ -979,9 +979,32 @@ int kvm_arch_init_vcpu(CPUState *cs)
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}
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c = &cpuid_data.entries[cpuid_i++];
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c->function = i;
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c->flags = 0;
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cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
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switch (i) {
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case 0x8000001d:
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/* Query for all AMD cache information leaves */
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for (j = 0; ; j++) {
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c->function = i;
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c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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c->index = j;
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cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
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if (c->eax == 0) {
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break;
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}
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if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
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fprintf(stderr, "cpuid_data is full, no space for "
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"cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
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abort();
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}
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c = &cpuid_data.entries[cpuid_i++];
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}
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break;
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default:
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c->function = i;
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c->flags = 0;
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cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
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break;
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}
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}
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/* Call Centaur's CPUID instructions they are supported. */
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