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target/hppa: Populate CPUClass.mmu_index
Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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3f605a15a7
commit
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2 changed files with 14 additions and 5 deletions
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@ -94,6 +94,17 @@ static bool hppa_cpu_has_work(CPUState *cs)
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return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
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return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
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}
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}
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int hppa_cpu_mmu_index(CPUState *cs, bool ifetch)
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{
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CPUHPPAState *env = cpu_env(cs);
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if (env->psw & (ifetch ? PSW_C : PSW_D)) {
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return PRIV_P_TO_MMU_IDX(env->iaoq_f & 3, env->psw & PSW_P);
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}
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/* mmu disabled */
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return env->psw & PSW_W ? MMU_ABS_W_IDX : MMU_ABS_IDX;
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}
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static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
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static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
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{
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{
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info->mach = bfd_mach_hppa20;
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info->mach = bfd_mach_hppa20;
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@ -194,6 +205,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
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cc->class_by_name = hppa_cpu_class_by_name;
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cc->class_by_name = hppa_cpu_class_by_name;
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cc->has_work = hppa_cpu_has_work;
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cc->has_work = hppa_cpu_has_work;
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cc->mmu_index = hppa_cpu_mmu_index;
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cc->dump_state = hppa_cpu_dump_state;
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cc->dump_state = hppa_cpu_dump_state;
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cc->set_pc = hppa_cpu_set_pc;
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cc->set_pc = hppa_cpu_set_pc;
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cc->get_pc = hppa_cpu_get_pc;
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cc->get_pc = hppa_cpu_get_pc;
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@ -281,16 +281,13 @@ static inline int HPPA_BTLB_ENTRIES(CPUHPPAState *env)
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return hppa_is_pa20(env) ? 0 : PA10_BTLB_FIXED + PA10_BTLB_VARIABLE;
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return hppa_is_pa20(env) ? 0 : PA10_BTLB_FIXED + PA10_BTLB_VARIABLE;
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}
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}
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int hppa_cpu_mmu_index(CPUState *cs, bool ifetch);
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static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch)
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static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch)
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{
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{
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#ifdef CONFIG_USER_ONLY
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#ifdef CONFIG_USER_ONLY
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return MMU_USER_IDX;
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return MMU_USER_IDX;
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#else
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#else
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if (env->psw & (ifetch ? PSW_C : PSW_D)) {
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return hppa_cpu_mmu_index(env_cpu(env), ifetch);
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return PRIV_P_TO_MMU_IDX(env->iaoq_f & 3, env->psw & PSW_P);
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}
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/* mmu disabled */
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return env->psw & PSW_W ? MMU_ABS_W_IDX : MMU_ABS_IDX;
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#endif
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#endif
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}
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}
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