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usb/hcd-xhci: Split pci wrapper for xhci base model
This patch sets the base to use xhci as sysbus model, for which pci specific hooks are moved to hcd-xhci-pci.c. As a part of this requirment msi/msix interrupts handling is moved under XHCIPCIState. Made required changes for qemu-xhci-nec. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Message-id: 1600957256-6494-4-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
Sai Pavan Boddu
Gerd Hoffmann
parent
755fba11fb
commit
8ddab8dd3d
5 changed files with 303 additions and 193 deletions
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@ -25,12 +25,205 @@
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#include "qemu/osdep.h"
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#include "hw/pci/pci.h"
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#include "hw/qdev-properties.h"
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#include "migration/vmstate.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msix.h"
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#include "hcd-xhci.h"
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#include "hcd-xhci-pci.h"
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#include "trace.h"
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#include "qapi/error.h"
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#define OFF_MSIX_TABLE 0x3000
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#define OFF_MSIX_PBA 0x3800
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static void xhci_pci_intr_update(XHCIState *xhci, int n, bool enable)
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{
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XHCIPciState *s = container_of(xhci, XHCIPciState, xhci);
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PCIDevice *pci_dev = PCI_DEVICE(s);
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if (!msix_enabled(pci_dev)) {
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return;
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}
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if (enable == !!xhci->intr[n].msix_used) {
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return;
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}
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if (enable) {
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trace_usb_xhci_irq_msix_use(n);
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msix_vector_use(pci_dev, n);
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xhci->intr[n].msix_used = true;
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} else {
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trace_usb_xhci_irq_msix_unuse(n);
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msix_vector_unuse(pci_dev, n);
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xhci->intr[n].msix_used = false;
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}
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}
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static void xhci_pci_intr_raise(XHCIState *xhci, int n, bool level)
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{
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XHCIPciState *s = container_of(xhci, XHCIPciState, xhci);
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PCIDevice *pci_dev = PCI_DEVICE(s);
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if (n == 0 &&
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!(msix_enabled(pci_dev) ||
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msi_enabled(pci_dev))) {
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pci_set_irq(pci_dev, level);
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}
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if (msix_enabled(pci_dev)) {
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msix_notify(pci_dev, n);
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return;
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}
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if (msi_enabled(pci_dev)) {
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msi_notify(pci_dev, n);
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return;
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}
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}
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static void xhci_pci_reset(DeviceState *dev)
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{
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XHCIPciState *s = XHCI_PCI(dev);
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device_legacy_reset(DEVICE(&s->xhci));
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}
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static int xhci_pci_vmstate_post_load(void *opaque, int version_id)
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{
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XHCIPciState *s = XHCI_PCI(opaque);
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PCIDevice *pci_dev = PCI_DEVICE(s);
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int intr;
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for (intr = 0; intr < s->xhci.numintrs; intr++) {
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if (s->xhci.intr[intr].msix_used) {
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msix_vector_use(pci_dev, intr);
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} else {
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msix_vector_unuse(pci_dev, intr);
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}
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}
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return 0;
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}
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static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp)
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{
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int ret;
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Error *err = NULL;
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XHCIPciState *s = XHCI_PCI(dev);
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dev->config[PCI_CLASS_PROG] = 0x30; /* xHCI */
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dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */
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dev->config[PCI_CACHE_LINE_SIZE] = 0x10;
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dev->config[0x60] = 0x30; /* release number */
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object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL);
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s->xhci.intr_update = xhci_pci_intr_update;
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s->xhci.intr_raise = xhci_pci_intr_raise;
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object_property_set_bool(OBJECT(&s->xhci), "realized", true, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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if (strcmp(object_get_typename(OBJECT(dev)), TYPE_NEC_XHCI) == 0) {
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s->xhci.nec_quirks = true;
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}
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if (s->msi != ON_OFF_AUTO_OFF) {
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ret = msi_init(dev, 0x70, s->xhci.numintrs, true, false, &err);
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/*
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* Any error other than -ENOTSUP(board's MSI support is broken)
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* is a programming error
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*/
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assert(!ret || ret == -ENOTSUP);
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if (ret && s->msi == ON_OFF_AUTO_ON) {
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/* Can't satisfy user's explicit msi=on request, fail */
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error_append_hint(&err, "You have to use msi=auto (default) or "
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"msi=off with this machine type.\n");
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error_propagate(errp, err);
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return;
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}
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assert(!err || s->msi == ON_OFF_AUTO_AUTO);
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/* With msi=auto, we fall back to MSI off silently */
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error_free(err);
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}
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pci_register_bar(dev, 0,
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PCI_BASE_ADDRESS_SPACE_MEMORY |
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PCI_BASE_ADDRESS_MEM_TYPE_64,
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&s->xhci.mem);
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if (pci_bus_is_express(pci_get_bus(dev)) ||
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xhci_get_flag(&s->xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) {
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ret = pcie_endpoint_cap_init(dev, 0xa0);
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assert(ret > 0);
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}
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if (s->msix != ON_OFF_AUTO_OFF) {
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/* TODO check for errors, and should fail when msix=on */
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msix_init(dev, s->xhci.numintrs,
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&s->xhci.mem, 0, OFF_MSIX_TABLE,
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&s->xhci.mem, 0, OFF_MSIX_PBA,
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0x90, NULL);
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}
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s->xhci.as = pci_get_address_space(dev);
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}
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static void usb_xhci_pci_exit(PCIDevice *dev)
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{
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XHCIPciState *s = XHCI_PCI(dev);
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/* destroy msix memory region */
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if (dev->msix_table && dev->msix_pba
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&& dev->msix_entry_used) {
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msix_uninit(dev, &s->xhci.mem, &s->xhci.mem);
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}
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}
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static const VMStateDescription vmstate_xhci_pci = {
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.name = "xhci",
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.version_id = 1,
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.post_load = xhci_pci_vmstate_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_PCI_DEVICE(parent_obj, XHCIPciState),
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VMSTATE_MSIX(parent_obj, XHCIPciState),
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VMSTATE_STRUCT(xhci, XHCIPciState, 1, vmstate_xhci, XHCIState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void xhci_instance_init(Object *obj)
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{
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XHCIPciState *s = XHCI_PCI(obj);
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/*
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* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command
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* line, therefore, no need to wait to realize like other devices
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*/
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PCI_DEVICE(obj)->cap_present |= QEMU_PCI_CAP_EXPRESS;
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object_initialize_child(obj, "xhci-core", &s->xhci, TYPE_XHCI);
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qdev_alias_all_properties(DEVICE(&s->xhci), obj);
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}
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static void xhci_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = xhci_pci_reset;
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dc->vmsd = &vmstate_xhci_pci;
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set_bit(DEVICE_CATEGORY_USB, dc->categories);
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k->realize = usb_xhci_pci_realize;
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k->exit = usb_xhci_pci_exit;
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k->class_id = PCI_CLASS_SERIAL_USB;
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}
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static const TypeInfo xhci_pci_info = {
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.name = TYPE_XHCI_PCI,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(XHCIPciState),
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.class_init = xhci_class_init,
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.instance_init = xhci_instance_init,
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.abstract = true,
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_PCIE_DEVICE },
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ }
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},
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};
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static void qemu_xhci_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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@ -42,10 +235,11 @@ static void qemu_xhci_class_init(ObjectClass *klass, void *data)
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static void qemu_xhci_instance_init(Object *obj)
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{
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XHCIState *xhci = XHCI(obj);
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XHCIPciState *s = XHCI_PCI(obj);
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XHCIState *xhci = &s->xhci;
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xhci->msi = ON_OFF_AUTO_OFF;
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xhci->msix = ON_OFF_AUTO_AUTO;
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s->msi = ON_OFF_AUTO_OFF;
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s->msix = ON_OFF_AUTO_AUTO;
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xhci->numintrs = MAXINTRS;
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xhci->numslots = MAXSLOTS;
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xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST);
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@ -53,13 +247,14 @@ static void qemu_xhci_instance_init(Object *obj)
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static const TypeInfo qemu_xhci_info = {
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.name = TYPE_QEMU_XHCI,
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.parent = TYPE_XHCI,
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.parent = TYPE_XHCI_PCI,
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.class_init = qemu_xhci_class_init,
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.instance_init = qemu_xhci_instance_init,
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};
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static void xhci_register_types(void)
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{
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type_register_static(&xhci_pci_info);
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type_register_static(&qemu_xhci_info);
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}
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