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hw/char/serial: Remove unused prog_if compat property
This property was added to preserve previous value when this was fixed in version 2.1 but the last machine using it was already removed when adding diva-gsp leaving this property unused and unnecessary. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Helge Deller <deller@gmx.de> Link: https://lore.kernel.org/r/20250502095524.DE1F355D264@zero.eik.bme.hu Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
1e94ddc685
commit
8dc4f98100
3 changed files with 6 additions and 17 deletions
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@ -51,7 +51,6 @@ typedef struct PCIDivaSerialState {
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SerialState state[PCI_SERIAL_MAX_PORTS];
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SerialState state[PCI_SERIAL_MAX_PORTS];
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uint32_t level[PCI_SERIAL_MAX_PORTS];
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uint32_t level[PCI_SERIAL_MAX_PORTS];
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qemu_irq *irqs;
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qemu_irq *irqs;
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uint8_t prog_if;
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bool disable;
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bool disable;
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} PCIDivaSerialState;
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} PCIDivaSerialState;
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@ -124,8 +123,8 @@ static void diva_pci_realize(PCIDevice *dev, Error **errp)
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size_t i, offset = 0;
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size_t i, offset = 0;
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size_t portmask = di.omask;
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size_t portmask = di.omask;
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pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
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pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
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pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
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pci->dev.config[PCI_INTERRUPT_PIN] = 1;
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memory_region_init(&pci->membar, OBJECT(pci), "serial_ports", 4096);
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memory_region_init(&pci->membar, OBJECT(pci), "serial_ports", 4096);
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pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &pci->membar);
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pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &pci->membar);
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pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, di.nports);
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pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, di.nports);
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@ -178,7 +177,6 @@ static const Property diva_serial_properties[] = {
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DEFINE_PROP_CHR("chardev2", PCIDivaSerialState, state[1].chr),
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DEFINE_PROP_CHR("chardev2", PCIDivaSerialState, state[1].chr),
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DEFINE_PROP_CHR("chardev3", PCIDivaSerialState, state[2].chr),
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DEFINE_PROP_CHR("chardev3", PCIDivaSerialState, state[2].chr),
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DEFINE_PROP_CHR("chardev4", PCIDivaSerialState, state[3].chr),
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DEFINE_PROP_CHR("chardev4", PCIDivaSerialState, state[3].chr),
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DEFINE_PROP_UINT8("prog_if", PCIDivaSerialState, prog_if, 0x02),
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DEFINE_PROP_UINT32("subvendor", PCIDivaSerialState, subvendor,
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DEFINE_PROP_UINT32("subvendor", PCIDivaSerialState, subvendor,
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PCI_DEVICE_ID_HP_DIVA_TOSCA1),
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PCI_DEVICE_ID_HP_DIVA_TOSCA1),
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};
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};
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@ -46,7 +46,6 @@ typedef struct PCIMultiSerialState {
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SerialState state[PCI_SERIAL_MAX_PORTS];
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SerialState state[PCI_SERIAL_MAX_PORTS];
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uint32_t level[PCI_SERIAL_MAX_PORTS];
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uint32_t level[PCI_SERIAL_MAX_PORTS];
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IRQState irqs[PCI_SERIAL_MAX_PORTS];
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IRQState irqs[PCI_SERIAL_MAX_PORTS];
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uint8_t prog_if;
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} PCIMultiSerialState;
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} PCIMultiSerialState;
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static void multi_serial_pci_exit(PCIDevice *dev)
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static void multi_serial_pci_exit(PCIDevice *dev)
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@ -97,8 +96,8 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp)
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SerialState *s;
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SerialState *s;
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size_t i, nports = multi_serial_get_port_count(pc);
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size_t i, nports = multi_serial_get_port_count(pc);
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pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
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pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
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pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
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pci->dev.config[PCI_INTERRUPT_PIN] = 1;
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memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports);
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memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports);
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pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
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pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
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@ -133,7 +132,6 @@ static const VMStateDescription vmstate_pci_multi_serial = {
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static const Property multi_2x_serial_pci_properties[] = {
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static const Property multi_2x_serial_pci_properties[] = {
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DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
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DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
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DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
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DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
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DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
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};
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};
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static const Property multi_4x_serial_pci_properties[] = {
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static const Property multi_4x_serial_pci_properties[] = {
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@ -141,7 +139,6 @@ static const Property multi_4x_serial_pci_properties[] = {
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DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
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DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
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DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),
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DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),
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DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr),
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DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr),
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DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
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};
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};
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static void multi_2x_serial_pci_class_initfn(ObjectClass *klass,
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static void multi_2x_serial_pci_class_initfn(ObjectClass *klass,
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@ -38,7 +38,6 @@
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struct PCISerialState {
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struct PCISerialState {
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PCIDevice dev;
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PCIDevice dev;
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SerialState state;
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SerialState state;
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uint8_t prog_if;
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};
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};
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#define TYPE_PCI_SERIAL "pci-serial"
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#define TYPE_PCI_SERIAL "pci-serial"
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@ -53,8 +52,8 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp)
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return;
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return;
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}
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}
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pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
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pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
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pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
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pci->dev.config[PCI_INTERRUPT_PIN] = 1;
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s->irq = pci_allocate_irq(&pci->dev);
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s->irq = pci_allocate_irq(&pci->dev);
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memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8);
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memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8);
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@ -81,10 +80,6 @@ static const VMStateDescription vmstate_pci_serial = {
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}
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}
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};
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};
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static const Property serial_pci_properties[] = {
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DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02),
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};
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static void serial_pci_class_initfn(ObjectClass *klass, const void *data)
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static void serial_pci_class_initfn(ObjectClass *klass, const void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -96,7 +91,6 @@ static void serial_pci_class_initfn(ObjectClass *klass, const void *data)
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pc->revision = 1;
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pc->revision = 1;
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pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
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pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
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dc->vmsd = &vmstate_pci_serial;
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dc->vmsd = &vmstate_pci_serial;
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device_class_set_props(dc, serial_pci_properties);
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set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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}
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}
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