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hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper

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For a particular physical address within the EthLite MMIO range,
addr_to_port_index() returns which port is accessed.

txbuf_ptr() points to the beginning of a (RAM) TX buffer
within the device state.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-Id: <20241112181044.92193-10-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-11-11 18:49:56 +01:00
parent fa3ca9aa1c
commit 8d956610f5
1 changed files with 16 additions and 2 deletions
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18
hw/net/xilinx_ethlite.c
View file

@ -27,6 +27,7 @@
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "qemu/bitops.h"
#include "qom/object.h" #include "qom/object.h"
#include "qapi/error.h" #include "qapi/error.h"
#include "exec/tswap.h" #include "exec/tswap.h"
@ -87,6 +88,18 @@ static inline void eth_pulse_irq(XlnxXpsEthLite *s)
} }
} }
static unsigned addr_to_port_index(hwaddr addr)
{
return extract64(addr, 11, 1);
}
static void *txbuf_ptr(XlnxXpsEthLite *s, unsigned port_index)
{
unsigned int rxbase = port_index * (0x800 / 4);
return &s->regs[rxbase + R_TX_BUF0];
}
static uint64_t static uint64_t
eth_read(void *opaque, hwaddr addr, unsigned int size) eth_read(void *opaque, hwaddr addr, unsigned int size)
{ {
@ -119,6 +132,7 @@ eth_write(void *opaque, hwaddr addr,
uint64_t val64, unsigned int size) uint64_t val64, unsigned int size)
{ {
XlnxXpsEthLite *s = opaque; XlnxXpsEthLite *s = opaque;
unsigned int port_index = addr_to_port_index(addr);
unsigned int base = 0; unsigned int base = 0;
uint32_t value = val64; uint32_t value = val64;
@ -132,12 +146,12 @@ eth_write(void *opaque, hwaddr addr,
if ((value & (CTRL_P | CTRL_S)) == CTRL_S) { if ((value & (CTRL_P | CTRL_S)) == CTRL_S) {
qemu_send_packet(qemu_get_queue(s->nic), qemu_send_packet(qemu_get_queue(s->nic),
(void *) &s->regs[base], txbuf_ptr(s, port_index),
s->regs[base + R_TX_LEN0]); s->regs[base + R_TX_LEN0]);
if (s->regs[base + R_TX_CTRL0] & CTRL_I) if (s->regs[base + R_TX_CTRL0] & CTRL_I)
eth_pulse_irq(s); eth_pulse_irq(s);
} else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) {
memcpy(&s->conf.macaddr.a[0], &s->regs[base], 6); memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6);
if (s->regs[base + R_TX_CTRL0] & CTRL_I) if (s->regs[base + R_TX_CTRL0] & CTRL_I)
eth_pulse_irq(s); eth_pulse_irq(s);
} }