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sparc merge (Blue Swirl)

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1098 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2004-10-04 21:23:09 +00:00
parent 023fcb9507
commit 8d5f07fa3b
23 changed files with 492 additions and 592 deletions
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1
target-sparc/cpu.h
View file

@ -76,6 +76,7 @@
#define PTE_ENTRYTYPE_MASK 3
#define PTE_ACCESS_MASK 0x1c
#define PTE_ACCESS_SHIFT 2
#define PTE_PPN_SHIFT 7
#define PTE_ADDR_MASK 0xffffff00
#define PG_ACCESSED_BIT 5

5
target-sparc/exec.h
View file

@ -23,13 +23,16 @@ void helper_flush(target_ulong addr);
void helper_ld_asi(int asi, int size, int sign);
void helper_st_asi(int asi, int size, int sign);
void helper_rett(void);
void helper_stfsr(void);
void helper_ldfsr(void);
void set_cwp(int new_cwp);
void do_fabss(void);
void do_fsqrts(void);
void do_fsqrtd(void);
void do_fcmps(void);
void do_fcmpd(void);
void do_ldd_kernel(uint32_t addr);
void do_ldd_user(uint32_t addr);
void do_ldd_raw(uint32_t addr);
void do_interrupt(int intno, int is_int, int error_code,
unsigned int next_eip, int is_hw);
void raise_exception_err(int exception_index, int error_code);

22
target-sparc/helper.c
View file

@ -21,19 +21,10 @@
#define DEBUG_PCALL
#if 0
#define raise_exception_err(a, b)\
do {\
fprintf(logfile, "raise_exception line=%d\n", __LINE__);\
(raise_exception_err)(a, b);\
} while (0)
#endif
/* Sparc MMU emulation */
int cpu_sparc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
int is_user, int is_softmmu);
/* thread support */
spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
@ -48,15 +39,6 @@ void cpu_unlock(void)
spin_unlock(&global_cpu_lock);
}
#if 0
void cpu_loop_exit(void)
{
/* NOTE: the register at this point must be saved by hand because
longjmp restore them */
longjmp(env->jmp_env, 1);
}
#endif
#if !defined(CONFIG_USER_ONLY)
#define MMUSUFFIX _mmu
@ -258,7 +240,7 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
env->mmuregs[3] |= (access_index << 5) | (error_code << 2) | 2;
env->mmuregs[4] = address; /* Fault address register */
if (env->mmuregs[0] & MMU_NF) // No fault
if (env->mmuregs[0] & MMU_NF || env->psret == 0) // No fault
return 0;
env->exception_index = exception;
@ -306,7 +288,7 @@ void do_interrupt(int intno, int is_int, int error_code,
fprintf(logfile, "%6d: v=%02x e=%04x i=%d pc=%08x npc=%08x SP=%08x\n",
count, intno, error_code, is_int,
env->pc,
env->npc, env->gregs[7]);
env->npc, env->regwptr[6]);
#if 0
cpu_sparc_dump_state(env, logfile, 0);
{

96
target-sparc/op.c
View file

@ -474,92 +474,6 @@ void OPPROTO op_sra(void)
T0 = ((int32_t) T0) >> T1;
}
#if 0
void OPPROTO op_st(void)
{
stl((void *) T0, T1);
}
void OPPROTO op_stb(void)
{
stb((void *) T0, T1);
}
void OPPROTO op_sth(void)
{
stw((void *) T0, T1);
}
void OPPROTO op_std(void)
{
stl((void *) T0, T1);
stl((void *) (T0 + 4), T2);
}
void OPPROTO op_ld(void)
{
T1 = ldl((void *) T0);
}
void OPPROTO op_ldub(void)
{
T1 = ldub((void *) T0);
}
void OPPROTO op_lduh(void)
{
T1 = lduw((void *) T0);
}
void OPPROTO op_ldsb(void)
{
T1 = ldsb((void *) T0);
}
void OPPROTO op_ldsh(void)
{
T1 = ldsw((void *) T0);
}
void OPPROTO op_ldstub(void)
{
T1 = ldub((void *) T0);
stb((void *) T0, 0xff); /* XXX: Should be Atomically */
}
void OPPROTO op_swap(void)
{
unsigned int tmp = ldl((void *) T0);
stl((void *) T0, T1); /* XXX: Should be Atomically */
T1 = tmp;
}
void OPPROTO op_ldd(void)
{
T1 = ldl((void *) T0);
T0 = ldl((void *) (T0 + 4));
}
void OPPROTO op_stf(void)
{
stfl((void *) T0, FT0);
}
void OPPROTO op_stdf(void)
{
stfq((void *) T0, DT0);
}
void OPPROTO op_ldf(void)
{
FT0 = ldfl((void *) T0);
}
void OPPROTO op_lddf(void)
{
DT0 = ldfq((void *) T0);
}
#else
/* Load and store */
#define MEMSUFFIX _raw
#include "op_mem.h"
@ -570,19 +484,16 @@ void OPPROTO op_lddf(void)
#define MEMSUFFIX _kernel
#include "op_mem.h"
#endif
#endif
void OPPROTO op_ldfsr(void)
{
env->fsr = *((uint32_t *) &FT0);
FORCE_RET();
helper_ldfsr();
}
void OPPROTO op_stfsr(void)
{
*((uint32_t *) &FT0) = env->fsr;
helper_stfsr();
FORCE_RET();
}
void OPPROTO op_wry(void)
@ -609,16 +520,17 @@ void OPPROTO op_wrwim(void)
void OPPROTO op_rdpsr(void)
{
T0 = GET_PSR(env);
FORCE_RET();
}
void OPPROTO op_wrpsr(void)
{
int cwp;
env->psr = T0 & ~PSR_ICC;
env->psrs = (T0 & PSR_S)? 1 : 0;
env->psrps = (T0 & PSR_PS)? 1 : 0;
env->psret = (T0 & PSR_ET)? 1 : 0;
env->cwp = (T0 & PSR_CWP);
cwp = (T0 & PSR_CWP) & (NWINDOWS - 1);
set_cwp(cwp);
FORCE_RET();
}

23
target-sparc/op_helper.c
View file

@ -104,6 +104,27 @@ void OPPROTO helper_st_asi(int asi, int size, int sign)
}
}
#if 0
void do_ldd_raw(uint32_t addr)
{
T1 = ldl_raw((void *) addr);
T0 = ldl_raw((void *) (addr + 4));
}
#if !defined(CONFIG_USER_ONLY)
void do_ldd_user(uint32_t addr)
{
T1 = ldl_user((void *) addr);
T0 = ldl_user((void *) (addr + 4));
}
void do_ldd_kernel(uint32_t addr)
{
T1 = ldl_kernel((void *) addr);
T0 = ldl_kernel((void *) (addr + 4));
}
#endif
#endif
void OPPROTO helper_rett()
{
int cwp;
@ -116,7 +137,7 @@ void OPPROTO helper_rett()
env->psrs = env->psrps;
}
void helper_stfsr(void)
void helper_ldfsr(void)
{
switch (env->fsr & FSR_RD_MASK) {
case FSR_RD_NEAREST:

4
target-sparc/op_mem.h
View file

@ -43,8 +43,12 @@ void OPPROTO glue(op_swap, MEMSUFFIX)(void)
void OPPROTO glue(op_ldd, MEMSUFFIX)(void)
{
#if 1
T1 = glue(ldl, MEMSUFFIX)((void *) T0);
T0 = glue(ldl, MEMSUFFIX)((void *) (T0 + 4));
#else
glue(do_ldd, MEMSUFFIX)(T0);
#endif
}
/*** Floating-point store ***/