motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-11 03:24:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/microblaze: Rename mmu structs

Browse source 
Introduce typedefs and follow CODING_STYLE for naming.
Rename struct microblaze_mmu to MicroBlazeMMU.
Rename struct microblaze_mmu_lookup to MicroBlazeMMULookup.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-09-02 23:18:35 -07:00
parent a9f614587b
commit 8ce97bc188
4 changed files with 14 additions and 18 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target/microblaze/cpu.h
View file

@ -278,7 +278,7 @@ struct CPUMBState {
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
/* Unified MMU. */ /* Unified MMU. */
struct microblaze_mmu mmu; MicroBlazeMMU mmu;
#endif #endif
/* Fields up to this point are cleared by a CPU reset */ /* Fields up to this point are cleared by a CPU reset */

4
target/microblaze/helper.c
View file

@ -52,7 +52,7 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
{ {
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
CPUMBState *env = &cpu->env; CPUMBState *env = &cpu->env;
struct microblaze_mmu_lookup lu; MicroBlazeMMULookup lu;
unsigned int hit; unsigned int hit;
int prot; int prot;
@ -235,7 +235,7 @@ hwaddr mb_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
CPUMBState *env = &cpu->env; CPUMBState *env = &cpu->env;
target_ulong vaddr, paddr = 0; target_ulong vaddr, paddr = 0;
struct microblaze_mmu_lookup lu; MicroBlazeMMULookup lu;
int mmu_idx = cpu_mmu_index(env, false); int mmu_idx = cpu_mmu_index(env, false);
unsigned int hit; unsigned int hit;

11
target/microblaze/mmu.c
View file

@ -35,7 +35,7 @@ static unsigned int tlb_decode_size(unsigned int f)
static void mmu_flush_idx(CPUMBState *env, unsigned int idx) static void mmu_flush_idx(CPUMBState *env, unsigned int idx)
{ {
CPUState *cs = env_cpu(env); CPUState *cs = env_cpu(env);
struct microblaze_mmu *mmu = &env->mmu; MicroBlazeMMU *mmu = &env->mmu;
unsigned int tlb_size; unsigned int tlb_size;
uint32_t tlb_tag, end, t; uint32_t tlb_tag, end, t;
@ -55,7 +55,7 @@ static void mmu_flush_idx(CPUMBState *env, unsigned int idx)
static void mmu_change_pid(CPUMBState *env, unsigned int newpid) static void mmu_change_pid(CPUMBState *env, unsigned int newpid)
{ {
struct microblaze_mmu *mmu = &env->mmu; MicroBlazeMMU *mmu = &env->mmu;
unsigned int i; unsigned int i;
uint32_t t; uint32_t t;
@ -73,8 +73,7 @@ static void mmu_change_pid(CPUMBState *env, unsigned int newpid)
} }
/* rw - 0 = read, 1 = write, 2 = fetch. */ /* rw - 0 = read, 1 = write, 2 = fetch. */
unsigned int mmu_translate(struct microblaze_mmu *mmu, unsigned int mmu_translate(MicroBlazeMMU *mmu, MicroBlazeMMULookup *lu,
struct microblaze_mmu_lookup *lu,
target_ulong vaddr, int rw, int mmu_idx) target_ulong vaddr, int rw, int mmu_idx)
{ {
unsigned int i, hit = 0; unsigned int i, hit = 0;
@ -290,7 +289,7 @@ void mmu_write(CPUMBState *env, bool ext, uint32_t rn, uint32_t v)
break; break;
case MMU_R_TLBSX: case MMU_R_TLBSX:
{ {
struct microblaze_mmu_lookup lu; MicroBlazeMMULookup lu;
int hit; int hit;
if (env->mmu.c_mmu_tlb_access <= 1) { if (env->mmu.c_mmu_tlb_access <= 1) {
@ -314,7 +313,7 @@ void mmu_write(CPUMBState *env, bool ext, uint32_t rn, uint32_t v)
} }
} }
void mmu_init(struct microblaze_mmu *mmu) void mmu_init(MicroBlazeMMU *mmu)
{ {
int i; int i;
for (i = 0; i < ARRAY_SIZE(mmu->regs); i++) { for (i = 0; i < ARRAY_SIZE(mmu->regs); i++) {

15
target/microblaze/mmu.h
View file

@ -63,8 +63,7 @@
#define TLB_ENTRIES 64 #define TLB_ENTRIES 64
struct microblaze_mmu typedef struct {
{
/* Data and tag brams. */ /* Data and tag brams. */
uint64_t rams[2][TLB_ENTRIES]; uint64_t rams[2][TLB_ENTRIES];
/* We keep a separate ram for the tids to avoid the 48 bit tag width. */ /* We keep a separate ram for the tids to avoid the 48 bit tag width. */
@ -76,10 +75,9 @@ struct microblaze_mmu
int c_mmu_tlb_access; int c_mmu_tlb_access;
int c_mmu_zones; int c_mmu_zones;
uint64_t c_addr_mask; /* Mask to apply to physical addresses. */ uint64_t c_addr_mask; /* Mask to apply to physical addresses. */
}; } MicroBlazeMMU;
struct microblaze_mmu_lookup typedef struct {
{
uint32_t paddr; uint32_t paddr;
uint32_t vaddr; uint32_t vaddr;
unsigned int size; unsigned int size;
@ -88,13 +86,12 @@ struct microblaze_mmu_lookup
enum { enum {
ERR_PROT, ERR_MISS, ERR_HIT ERR_PROT, ERR_MISS, ERR_HIT
} err; } err;
}; } MicroBlazeMMULookup;
unsigned int mmu_translate(struct microblaze_mmu *mmu, unsigned int mmu_translate(MicroBlazeMMU *mmu, MicroBlazeMMULookup *lu,
struct microblaze_mmu_lookup *lu,
target_ulong vaddr, int rw, int mmu_idx); target_ulong vaddr, int rw, int mmu_idx);
uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn); uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn);
void mmu_write(CPUMBState *env, bool ea, uint32_t rn, uint32_t v); void mmu_write(CPUMBState *env, bool ea, uint32_t rn, uint32_t v);
void mmu_init(struct microblaze_mmu *mmu); void mmu_init(MicroBlazeMMU *mmu);
#endif #endif