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disas: Support the Capstone disassembler library
If configured, prefer this over our rather dated copy of the GPLv2-only binutils. This will be especially apparent with the proposed vector extensions to TCG, as disas/i386.c does not handle AVX. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
1d48474d8e
commit
8ca80760bf
4 changed files with 274 additions and 13 deletions
219
disas.c
219
disas.c
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@ -6,6 +6,7 @@
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#include "cpu.h"
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#include "disas/disas.h"
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#include "disas/capstone.h"
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typedef struct CPUDebug {
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struct disassemble_info info;
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@ -171,6 +172,192 @@ static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
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return print_insn_objdump(pc, info, "OBJD-T");
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}
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#ifdef CONFIG_CAPSTONE
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/* Temporary storage for the capstone library. This will be alloced via
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malloc with a size private to the library; thus there's no reason not
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to share this across calls and across host vs target disassembly. */
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static __thread cs_insn *cap_insn;
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/* Initialize the Capstone library. */
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/* ??? It would be nice to cache this. We would need one handle for the
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host and one for the target. For most targets we can reset specific
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parameters via cs_option(CS_OPT_MODE, new_mode), but we cannot change
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CS_ARCH_* in this way. Thus we would need to be able to close and
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re-open the target handle with a different arch for the target in order
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to handle AArch64 vs AArch32 mode switching. */
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static cs_err cap_disas_start(disassemble_info *info, csh *handle)
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{
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cs_mode cap_mode = info->cap_mode;
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cs_err err;
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cap_mode += (info->endian == BFD_ENDIAN_BIG ? CS_MODE_BIG_ENDIAN
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: CS_MODE_LITTLE_ENDIAN);
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err = cs_open(info->cap_arch, cap_mode, handle);
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if (err != CS_ERR_OK) {
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return err;
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}
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/* ??? There probably ought to be a better place to put this. */
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if (info->cap_arch == CS_ARCH_X86) {
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/* We don't care about errors (if for some reason the library
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is compiled without AT&T syntax); the user will just have
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to deal with the Intel syntax. */
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cs_option(*handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);
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}
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/* "Disassemble" unknown insns as ".byte W,X,Y,Z". */
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cs_option(*handle, CS_OPT_SKIPDATA, CS_OPT_ON);
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/* Allocate temp space for cs_disasm_iter. */
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if (cap_insn == NULL) {
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cap_insn = cs_malloc(*handle);
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if (cap_insn == NULL) {
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cs_close(handle);
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return CS_ERR_MEM;
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}
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}
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return CS_ERR_OK;
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}
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/* Disassemble SIZE bytes at PC for the target. */
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static bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t size)
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{
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uint8_t cap_buf[1024];
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csh handle;
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cs_insn *insn;
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size_t csize = 0;
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if (cap_disas_start(info, &handle) != CS_ERR_OK) {
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return false;
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}
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insn = cap_insn;
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while (1) {
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size_t tsize = MIN(sizeof(cap_buf) - csize, size);
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const uint8_t *cbuf = cap_buf;
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target_read_memory(pc + csize, cap_buf + csize, tsize, info);
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csize += tsize;
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size -= tsize;
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while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {
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(*info->fprintf_func)(info->stream,
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"0x%08" PRIx64 ": %-12s %s\n",
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insn->address, insn->mnemonic,
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insn->op_str);
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}
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/* If the target memory is not consumed, go back for more... */
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if (size != 0) {
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/* ... taking care to move any remaining fractional insn
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to the beginning of the buffer. */
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if (csize != 0) {
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memmove(cap_buf, cbuf, csize);
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}
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continue;
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}
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/* Since the target memory is consumed, we should not have
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a remaining fractional insn. */
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if (csize != 0) {
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(*info->fprintf_func)(info->stream,
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"Disassembler disagrees with translator "
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"over instruction decoding\n"
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"Please report this to qemu-devel@nongnu.org\n");
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}
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break;
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}
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cs_close(&handle);
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return true;
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}
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/* Disassemble SIZE bytes at CODE for the host. */
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static bool cap_disas_host(disassemble_info *info, void *code, size_t size)
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{
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csh handle;
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const uint8_t *cbuf;
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cs_insn *insn;
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uint64_t pc;
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if (cap_disas_start(info, &handle) != CS_ERR_OK) {
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return false;
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}
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insn = cap_insn;
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cbuf = code;
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pc = (uintptr_t)code;
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while (cs_disasm_iter(handle, &cbuf, &size, &pc, insn)) {
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(*info->fprintf_func)(info->stream,
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"0x%08" PRIx64 ": %-12s %s\n",
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insn->address, insn->mnemonic,
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insn->op_str);
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}
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if (size != 0) {
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(*info->fprintf_func)(info->stream,
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"Disassembler disagrees with TCG over instruction encoding\n"
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"Please report this to qemu-devel@nongnu.org\n");
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}
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cs_close(&handle);
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return true;
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}
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#if !defined(CONFIG_USER_ONLY)
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/* Disassemble COUNT insns at PC for the target. */
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static bool cap_disas_monitor(disassemble_info *info, uint64_t pc, int count)
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{
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uint8_t cap_buf[32];
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csh handle;
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cs_insn *insn;
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size_t csize = 0;
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if (cap_disas_start(info, &handle) != CS_ERR_OK) {
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return false;
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}
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insn = cap_insn;
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while (1) {
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/* We want to read memory for one insn, but generically we do not
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know how much memory that is. We have a small buffer which is
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known to be sufficient for all supported targets. Try to not
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read beyond the page, Just In Case. For even more simplicity,
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ignore the actual target page size and use a 1k boundary. If
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that turns out to be insufficient, we'll come back around the
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loop and read more. */
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uint64_t epc = QEMU_ALIGN_UP(pc + csize + 1, 1024);
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size_t tsize = MIN(sizeof(cap_buf) - csize, epc - pc);
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const uint8_t *cbuf = cap_buf;
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/* Make certain that we can make progress. */
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assert(tsize != 0);
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info->read_memory_func(pc, cap_buf + csize, tsize, info);
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csize += tsize;
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if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {
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(*info->fprintf_func)(info->stream,
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"0x%08" PRIx64 ": %-12s %s\n",
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insn->address, insn->mnemonic,
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insn->op_str);
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if (--count <= 0) {
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break;
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}
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}
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memmove(cap_buf, cbuf, csize);
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}
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cs_close(&handle);
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return true;
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}
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#endif /* !CONFIG_USER_ONLY */
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#else
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# define cap_disas_target(i, p, s) false
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# define cap_disas_host(i, p, s) false
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# define cap_disas_monitor(i, p, c) false
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#endif /* CONFIG_CAPSTONE */
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/* Disassemble this for me please... (debugging). */
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void target_disas(FILE *out, CPUState *cpu, target_ulong code,
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target_ulong size)
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@ -187,6 +374,8 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,
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s.info.buffer_vma = code;
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s.info.buffer_length = size;
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s.info.print_address_func = generic_print_address;
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s.info.cap_arch = -1;
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s.info.cap_mode = 0;
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#ifdef TARGET_WORDS_BIGENDIAN
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s.info.endian = BFD_ENDIAN_BIG;
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@ -198,6 +387,10 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,
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cc->disas_set_info(cpu, &s.info);
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}
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if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {
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return;
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}
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if (s.info.print_insn == NULL) {
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s.info.print_insn = print_insn_od_target;
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}
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@ -205,18 +398,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,
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for (pc = code; size > 0; pc += count, size -= count) {
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fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
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count = s.info.print_insn(pc, &s.info);
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#if 0
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{
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int i;
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uint8_t b;
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fprintf(out, " {");
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for(i = 0; i < count; i++) {
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target_read_memory(pc + i, &b, 1, &s.info);
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fprintf(out, " %02x", b);
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}
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fprintf(out, " }");
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}
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#endif
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fprintf(out, "\n");
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if (count < 0)
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break;
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@ -244,6 +425,8 @@ void disas(FILE *out, void *code, unsigned long size)
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s.info.buffer = code;
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s.info.buffer_vma = (uintptr_t)code;
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s.info.buffer_length = size;
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s.info.cap_arch = -1;
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s.info.cap_mode = 0;
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#ifdef HOST_WORDS_BIGENDIAN
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s.info.endian = BFD_ENDIAN_BIG;
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@ -281,6 +464,11 @@ void disas(FILE *out, void *code, unsigned long size)
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#elif defined(__hppa__)
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print_insn = print_insn_hppa;
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#endif
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if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {
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return;
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}
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if (print_insn == NULL) {
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print_insn = print_insn_od_host;
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}
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@ -343,8 +531,9 @@ void monitor_disas(Monitor *mon, CPUState *cpu,
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monitor_disas_is_physical = is_physical;
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s.info.read_memory_func = monitor_read_memory;
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s.info.print_address_func = generic_print_address;
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s.info.buffer_vma = pc;
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s.info.cap_arch = -1;
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s.info.cap_mode = 0;
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#ifdef TARGET_WORDS_BIGENDIAN
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s.info.endian = BFD_ENDIAN_BIG;
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@ -356,6 +545,10 @@ void monitor_disas(Monitor *mon, CPUState *cpu,
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cc->disas_set_info(cpu, &s.info);
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}
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if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) {
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return;
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}
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if (!s.info.print_insn) {
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monitor_printf(mon, "0x" TARGET_FMT_lx
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": Asm output not supported on this arch\n", pc);
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