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target/riscv: rvv-1.0: single-width averaging add and subtract instructions

Browse source 
Add the following instructions:

* vaaddu.vv
* vaaddu.vx
* vasubu.vv
* vasubu.vx

Remove the following instructions:

* vadd.vi

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211210075704.23951-42-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Frank Chang 2021-12-10 15:56:27 +08:00 • committed by Alistair Francis
parent cd01340e75
commit 8b99a110f7
4 changed files with 102 additions and 6 deletions
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13
target/riscv/insn32.decode
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@ -493,11 +493,14 @@ vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm
vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm
vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm
vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm
vaadd_vv 100100 . ..... ..... 000 ..... 1010111 @r_vm
vaadd_vx 100100 . ..... ..... 100 ..... 1010111 @r_vm
vaadd_vi 100100 . ..... ..... 011 ..... 1010111 @r_vm
vasub_vv 100110 . ..... ..... 000 ..... 1010111 @r_vm
vasub_vx 100110 . ..... ..... 100 ..... 1010111 @r_vm
vaadd_vv 001001 . ..... ..... 010 ..... 1010111 @r_vm
vaadd_vx 001001 . ..... ..... 110 ..... 1010111 @r_vm
vaaddu_vv 001000 . ..... ..... 010 ..... 1010111 @r_vm
vaaddu_vx 001000 . ..... ..... 110 ..... 1010111 @r_vm
vasub_vv 001011 . ..... ..... 010 ..... 1010111 @r_vm
vasub_vx 001011 . ..... ..... 110 ..... 1010111 @r_vm
vasubu_vv 001010 . ..... ..... 010 ..... 1010111 @r_vm
vasubu_vx 001010 . ..... ..... 110 ..... 1010111 @r_vm
vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm
vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm
vwsmaccu_vv 111100 . ..... ..... 000 ..... 1010111 @r_vm