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hw/misc/aspeed_hace: Move register size to instance class and dynamically allocate regs

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Dynamically allocate the register array by removing the hardcoded
ASPEED_HACE_NR_REGS macro.

To support different register sizes across SoC variants, introduce a new
"nr_regs" class attribute and replace the static "regs" array with dynamically
allocated memory.

Add a new "aspeed_hace_unrealize" function to properly free the allocated "regs"
memory during device cleanup.

Remove the bounds checking in the MMIO read/write handlers since the
MemoryRegion size now matches the (register array size << 2).

This commit updates the VMState fields accordingly. The VMState version was
already bumped in a previous patch of this series, so no further version change
is needed.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-13-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin 2025-05-15 16:09:44 +08:00 • committed by Cédric Le Goater
parent 7b4e588000
commit 89d2a9f3f7
2 changed files with 22 additions and 19 deletions
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5
include/hw/misc/aspeed_hace.h
View file

@ -22,7 +22,6 @@
OBJECT_DECLARE_TYPE(AspeedHACEState, AspeedHACEClass, ASPEED_HACE)
#define ASPEED_HACE_NR_REGS (0x64 >> 2)
#define ASPEED_HACE_MAX_SG 256 /* max number of entries */
struct AspeedHACEState {
@ -31,7 +30,7 @@ struct AspeedHACEState {
MemoryRegion iomem;
qemu_irq irq;
uint32_t regs[ASPEED_HACE_NR_REGS];
uint32_t *regs;
uint32_t total_req_len;
MemoryRegion *dram_mr;
@ -44,10 +43,12 @@ struct AspeedHACEState {
struct AspeedHACEClass {
SysBusDeviceClass parent_class;
const MemoryRegionOps *reg_ops;
uint32_t src_mask;
uint32_t dest_mask;
uint32_t key_mask;
uint32_t hash_mask;
uint64_t nr_regs;
bool raise_crypt_interrupt_workaround;
};