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compiler.h: replace QEMU_NORETURN with G_NORETURN
G_NORETURN was introduced in glib 2.68, fallback to G_GNUC_NORETURN in glib-compat. Note that this attribute must be placed before the function declaration (bringing a bit of consistency in qemu codebase usage). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20220420132624.2439741-20-marcandre.lureau@redhat.com>
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94ae6b579d
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58 changed files with 214 additions and 191 deletions
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@ -22,7 +22,7 @@
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#include "exec/helper-proto.h"
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#include "helper-tcg.h"
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void QEMU_NORETURN helper_single_step(CPUX86State *env)
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G_NORETURN void helper_single_step(CPUX86State *env)
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{
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#ifndef CONFIG_USER_ONLY
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check_hw_breakpoints(env, true);
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@ -25,13 +25,13 @@
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#include "exec/helper-proto.h"
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#include "helper-tcg.h"
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void QEMU_NORETURN helper_raise_interrupt(CPUX86State *env, int intno,
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G_NORETURN void helper_raise_interrupt(CPUX86State *env, int intno,
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int next_eip_addend)
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{
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raise_interrupt(env, intno, 1, 0, next_eip_addend);
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}
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void QEMU_NORETURN helper_raise_exception(CPUX86State *env, int exception_index)
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G_NORETURN void helper_raise_exception(CPUX86State *env, int exception_index)
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{
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raise_exception(env, exception_index);
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}
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@ -87,10 +87,11 @@ static int check_exception(CPUX86State *env, int intno, int *error_code,
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* env->eip value AFTER the interrupt instruction. It is only relevant if
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* is_int is TRUE.
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*/
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static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno,
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int is_int, int error_code,
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int next_eip_addend,
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uintptr_t retaddr)
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static G_NORETURN
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void raise_interrupt2(CPUX86State *env, int intno,
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int is_int, int error_code,
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int next_eip_addend,
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uintptr_t retaddr)
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{
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CPUState *cs = env_cpu(env);
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@ -111,31 +112,31 @@ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno,
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/* shortcuts to generate exceptions */
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void QEMU_NORETURN raise_interrupt(CPUX86State *env, int intno, int is_int,
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int error_code, int next_eip_addend)
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G_NORETURN void raise_interrupt(CPUX86State *env, int intno, int is_int,
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int error_code, int next_eip_addend)
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{
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raise_interrupt2(env, intno, is_int, error_code, next_eip_addend, 0);
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}
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void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index,
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int error_code)
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G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
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int error_code)
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{
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raise_interrupt2(env, exception_index, 0, error_code, 0, 0);
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}
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void QEMU_NORETURN raise_exception_err_ra(CPUX86State *env, int exception_index,
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int error_code, uintptr_t retaddr)
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G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
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int error_code, uintptr_t retaddr)
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{
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raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr);
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}
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void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index)
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G_NORETURN void raise_exception(CPUX86State *env, int exception_index)
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{
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raise_interrupt2(env, exception_index, 0, 0, 0, 0);
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}
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void QEMU_NORETURN raise_exception_ra(CPUX86State *env, int exception_index,
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uintptr_t retaddr)
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G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index,
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uintptr_t retaddr)
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{
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raise_interrupt2(env, exception_index, 0, 0, 0, retaddr);
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}
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@ -69,27 +69,27 @@ static inline target_long lshift(target_long x, int n)
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void tcg_x86_init(void);
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/* excp_helper.c */
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void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index);
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void QEMU_NORETURN raise_exception_ra(CPUX86State *env, int exception_index,
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uintptr_t retaddr);
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void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index,
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int error_code);
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void QEMU_NORETURN raise_exception_err_ra(CPUX86State *env, int exception_index,
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int error_code, uintptr_t retaddr);
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void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int,
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int error_code, int next_eip_addend);
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G_NORETURN void raise_exception(CPUX86State *env, int exception_index);
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G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index,
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uintptr_t retaddr);
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G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
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int error_code);
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G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
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int error_code, uintptr_t retaddr);
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G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int is_int,
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int error_code, int next_eip_addend);
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/* cc_helper.c */
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extern const uint8_t parity_table[256];
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/* misc_helper.c */
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void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
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void do_pause(CPUX86State *env) QEMU_NORETURN;
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G_NORETURN void do_pause(CPUX86State *env);
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/* sysemu/svm_helper.c */
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#ifndef CONFIG_USER_ONLY
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void QEMU_NORETURN cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
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uint64_t exit_info_1, uintptr_t retaddr);
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G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
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uint64_t exit_info_1, uintptr_t retaddr);
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void do_vmexit(CPUX86State *env);
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#endif
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@ -81,7 +81,7 @@ void helper_rdtscp(CPUX86State *env)
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env->regs[R_ECX] = (uint32_t)(env->tsc_aux);
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}
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void QEMU_NORETURN helper_rdpmc(CPUX86State *env)
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G_NORETURN void helper_rdpmc(CPUX86State *env)
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{
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if (((env->cr[4] & CR4_PCE_MASK) == 0 ) &&
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((env->hflags & HF_CPL_MASK) != 0)) {
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@ -94,7 +94,7 @@ void QEMU_NORETURN helper_rdpmc(CPUX86State *env)
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raise_exception_err(env, EXCP06_ILLOP, 0);
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}
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void QEMU_NORETURN do_pause(CPUX86State *env)
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G_NORETURN void do_pause(CPUX86State *env)
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{
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CPUState *cs = env_cpu(env);
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@ -103,7 +103,7 @@ void QEMU_NORETURN do_pause(CPUX86State *env)
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cpu_loop_exit(cs);
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}
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void QEMU_NORETURN helper_pause(CPUX86State *env, int next_eip_addend)
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G_NORETURN void helper_pause(CPUX86State *env, int next_eip_addend)
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{
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cpu_svm_check_intercept_param(env, SVM_EXIT_PAUSE, 0, GETPC());
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env->eip += next_eip_addend;
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@ -471,7 +471,8 @@ void helper_flush_page(CPUX86State *env, target_ulong addr)
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tlb_flush_page(env_cpu(env), addr);
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}
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static void QEMU_NORETURN do_hlt(CPUX86State *env)
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static G_NORETURN
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void do_hlt(CPUX86State *env)
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{
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CPUState *cs = env_cpu(env);
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@ -481,7 +482,7 @@ static void QEMU_NORETURN do_hlt(CPUX86State *env)
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cpu_loop_exit(cs);
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}
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void QEMU_NORETURN helper_hlt(CPUX86State *env, int next_eip_addend)
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G_NORETURN void helper_hlt(CPUX86State *env, int next_eip_addend)
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{
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cpu_svm_check_intercept_param(env, SVM_EXIT_HLT, 0, GETPC());
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env->eip += next_eip_addend;
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@ -498,7 +499,7 @@ void helper_monitor(CPUX86State *env, target_ulong ptr)
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cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0, GETPC());
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}
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void QEMU_NORETURN helper_mwait(CPUX86State *env, int next_eip_addend)
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G_NORETURN void helper_mwait(CPUX86State *env, int next_eip_addend)
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{
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CPUState *cs = env_cpu(env);
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